From patchwork Tue Jun 23 18:24:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11621365 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6AC4D6C1 for ; Tue, 23 Jun 2020 18:24:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4850A207FF for ; Tue, 23 Jun 2020 18:24:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="mqZMYW9V" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733045AbgFWSYr (ORCPT ); Tue, 23 Jun 2020 14:24:47 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:51528 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732549AbgFWSYr (ORCPT ); Tue, 23 Jun 2020 14:24:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1592936683; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:references; bh=Jo5zwpfouXsdEQg4LUVTZQR1ueuE0Fx3LvAue7M9EQ8=; b=mqZMYW9VYrZe19z9Q+dxIxDGXqv6ddNt52vw1OzNL0gGmFCB08lL40OA3WN/MvKKbNCECI qxGVz1hJX423gZJEdQOFoWmEN+IJGQ4KyaPT0yKU+9RuXeauS/a1J74UL1G386WqR8vYQN +vyVWHGvm/OhQrutUvzOrdQAzc+xYUM= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring Cc: =?utf-8?b?5ZGo55Cw5p2w?= , od@zcrc.me, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 1/7] dt-bindings: vendor-prefixes: Add YLM Date: Tue, 23 Jun 2020 20:24:26 +0200 Message-Id: <20200623182432.187843-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Shenzhen Yangliming Electronic Technology Co., Ltd., abbreviated YLM or YLMChina, and known as Anbernic in the rest of the world, is a Chinese manufacturer of handheld game consoles, some of which are known to be running Linux. Signed-off-by: Paul Cercueil Acked-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 9aeab66be85f..d24ecc7614fa 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1167,6 +1167,8 @@ patternProperties: description: Shenzhen Xunlong Software CO.,Limited "^xylon,.*": description: Xylon + "^ylm,.*": + description: Shenzhen Yangliming Electronic Technology Co., Ltd. "^yna,.*": description: YSH & ATIL "^yones-toptech,.*": From patchwork Tue Jun 23 18:24:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11621367 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E876092A for ; Tue, 23 Jun 2020 18:24:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C595B207E8 for ; Tue, 23 Jun 2020 18:24:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="VM7M9iGf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733184AbgFWSYy (ORCPT ); Tue, 23 Jun 2020 14:24:54 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:51670 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732549AbgFWSYy (ORCPT ); Tue, 23 Jun 2020 14:24:54 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1592936684; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ITvD9mmuKfY68Q7XYzYsHbbyiuTuUxzWr+ANwSKk9sI=; b=VM7M9iGfJTdYAjzAFEyiROauyPDgXKDUjgQ00jl6PWF04mnygkemoVIktVTwvoHKWVi3/J izdx6L8JRIEVjb9XuuMYQAN+E2oh0Mo/udQZ2C9uIWi98Qnu5Mwaa3VvTY1Xply2v1Taws t+M6srN62+LIjEcnb4taCSBZ2vEueGI= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring Cc: =?utf-8?b?5ZGo55Cw5p2w?= , od@zcrc.me, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 2/7] dt-bindings: MIPS: Add entry for the YLM RetroMini Date: Tue, 23 Jun 2020 20:24:27 +0200 Message-Id: <20200623182432.187843-2-paul@crapouillou.net> In-Reply-To: <20200623182432.187843-1-paul@crapouillou.net> References: <20200623182432.187843-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add an entry to ingenic/devices.yaml for the JZ4725B-based YLM "RetroMini" RS-90. Signed-off-by: Paul Cercueil Acked-by: Rob Herring --- Documentation/devicetree/bindings/mips/ingenic/devices.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml index d1175030781a..07d8550a9b49 100644 --- a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml +++ b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml @@ -22,6 +22,11 @@ properties: - const: qi,lb60 - const: ingenic,jz4740 + - description: YLM RetroMini RS-90 + items: + - const: ylm,rs90 + - const: ingenic,jz4725b + - description: Game Consoles Worldwide GCW Zero items: - const: gcw,zero From patchwork Tue Jun 23 18:24:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11621369 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8EFD06C1 for ; Tue, 23 Jun 2020 18:25:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7786C20809 for ; Tue, 23 Jun 2020 18:25:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="UNH02mzo" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733125AbgFWSZC (ORCPT ); Tue, 23 Jun 2020 14:25:02 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:51872 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732549AbgFWSZB (ORCPT ); Tue, 23 Jun 2020 14:25:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1592936685; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=abmRLAwiNoQr6F48QZbrxbR8G+uP7eYeNw6ktpMn+xE=; b=UNH02mzoo311dDHpn5/HLq1d4bSdF2wc7xA6ISYIVMgv3nEqroY9O75VlmYM5IhpPbjT+j z1k+0kJZWglC+RT3ausIllPlj7dPFmksk5NMq7fCZGO8+xK/7Ze78FUmcTeTNSl7/1XUQL Ur2kQUtbBISlv2GtBJO4By+aQmwR+tk= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring Cc: =?utf-8?b?5ZGo55Cw5p2w?= , od@zcrc.me, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 3/7] dt-bindings: timer/ingenic,tcu: Add compatible strings for JZ4725B SoC Date: Tue, 23 Jun 2020 20:24:28 +0200 Message-Id: <20200623182432.187843-3-paul@crapouillou.net> In-Reply-To: <20200623182432.187843-1-paul@crapouillou.net> References: <20200623182432.187843-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add compatible strings for the PWM and watchdog IPs on the Ingenic JZ4725B SoC. Signed-off-by: Paul Cercueil Acked-by: Rob Herring --- Documentation/devicetree/bindings/timer/ingenic,tcu.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml index 03893e6a2f57..371fb02a4351 100644 --- a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml +++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml @@ -116,7 +116,9 @@ patternProperties: - ingenic,jz4740-watchdog - ingenic,jz4780-watchdog - items: - - const: ingenic,jz4770-watchdog + - enum: + - ingenic,jz4770-watchdog + - ingenic,jz4725b-watchdog - const: ingenic,jz4740-watchdog reg: @@ -142,6 +144,7 @@ patternProperties: oneOf: - enum: - ingenic,jz4740-pwm + - ingenic,jz4725b-pwm - items: - enum: - ingenic,jz4770-pwm From patchwork Tue Jun 23 18:24:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11621371 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA16592A for ; Tue, 23 Jun 2020 18:25:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A297020829 for ; Tue, 23 Jun 2020 18:25:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="UmNaVg6g" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733223AbgFWSZJ (ORCPT ); Tue, 23 Jun 2020 14:25:09 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:52044 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732549AbgFWSZJ (ORCPT ); Tue, 23 Jun 2020 14:25:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1592936686; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=K44PD9Lu84ScFUkt/pJ1sEZS/nHBSokcXHkHizWvV6g=; b=UmNaVg6gM3rwrW7fVF+hksjY5nqi26dwIJ9i/5+MsVcb9zXnOgGuwX+nweDqS6kCDweVJv U4CIZjGq70cKulYMyriTjKrXt7WDqAjNWPGTSB4FUv293uD6F7UjMQZEstdXuJghucMLGh I1pd1iIx6EK4E9rwwodgYTmxtgH4/VQ= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring Cc: =?utf-8?b?5ZGo55Cw5p2w?= , od@zcrc.me, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 4/7] MIPS: ingenic: Use enum instead of macros for Ingenic SoCs Date: Tue, 23 Jun 2020 20:24:29 +0200 Message-Id: <20200623182432.187843-4-paul@crapouillou.net> In-Reply-To: <20200623182432.187843-1-paul@crapouillou.net> References: <20200623182432.187843-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Use an enum instead of macros to represent the various versions of the Ingenic SoCs, and add some of the SoC versions that were previously missing. Signed-off-by: Paul Cercueil --- arch/mips/include/asm/bootinfo.h | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/arch/mips/include/asm/bootinfo.h b/arch/mips/include/asm/bootinfo.h index c3bd9b2d66e4..26f267d5649f 100644 --- a/arch/mips/include/asm/bootinfo.h +++ b/arch/mips/include/asm/bootinfo.h @@ -65,12 +65,22 @@ enum loongson2ef_machine_type { /* * Valid machtype for group INGENIC */ -#define MACH_INGENIC_JZ4730 0 /* JZ4730 SOC */ -#define MACH_INGENIC_JZ4740 1 /* JZ4740 SOC */ -#define MACH_INGENIC_JZ4770 2 /* JZ4770 SOC */ -#define MACH_INGENIC_JZ4780 3 /* JZ4780 SOC */ -#define MACH_INGENIC_X1000 4 /* X1000 SOC */ -#define MACH_INGENIC_X1830 5 /* X1830 SOC */ +enum ingenic_machine_type { + MACH_INGENIC_UNKNOWN, + MACH_INGENIC_JZ4720, + MACH_INGENIC_JZ4725, + MACH_INGENIC_JZ4725B, + MACH_INGENIC_JZ4730, + MACH_INGENIC_JZ4740, + MACH_INGENIC_JZ4750, + MACH_INGENIC_JZ4755, + MACH_INGENIC_JZ4760, + MACH_INGENIC_JZ4770, + MACH_INGENIC_JZ4775, + MACH_INGENIC_JZ4780, + MACH_INGENIC_X1000, + MACH_INGENIC_X1830, +}; extern char *system_type; const char *get_system_type(void); From patchwork Tue Jun 23 18:24:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11621373 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A9116C1 for ; Tue, 23 Jun 2020 18:25:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 15313207F9 for ; Tue, 23 Jun 2020 18:25:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="SXtxxLym" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733105AbgFWSZS (ORCPT ); Tue, 23 Jun 2020 14:25:18 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:52110 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732549AbgFWSZS (ORCPT ); Tue, 23 Jun 2020 14:25:18 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1592936687; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FYKfNVd30L/ZHXSNz64Wbq3SIUcXXkgLY/JGnV8rS3o=; b=SXtxxLymCpJiqoKGGUqUgsFf0FrL2HgnjyEXSiBm4czVKcDVofRBCWDNXGbvcAbq1y5Eor yJ2/bJ6tLamOgZLhaEr5CDHRrqHtCxphl+P1WoYCjIcSMBLmp4iLS+lDUCLtYj3aAEWXvA sLutyTpMqT45FWaQqNlE6Q3PaIdU4jg= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring Cc: =?utf-8?b?5ZGo55Cw5p2w?= , od@zcrc.me, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 5/7] MIPS: ingenic: Add support for the JZ4725B SoC Date: Tue, 23 Jun 2020 20:24:30 +0200 Message-Id: <20200623182432.187843-5-paul@crapouillou.net> In-Reply-To: <20200623182432.187843-1-paul@crapouillou.net> References: <20200623182432.187843-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add preliminary support for boards based on the JZ4725B SoC from Ingenic. The JZ4725B SoC is supposed to be older than the JZ4740 SoC, but its internals are much closer to what can be found on the JZ4750 and newer SoCs. It is low-power SoC with a MIPS32r1 SoC running at ~360 MHz, and no FPU. Signed-off-by: Paul Cercueil --- arch/mips/boot/dts/ingenic/jz4725b.dtsi | 334 ++++++++++++++++++++++++ arch/mips/jz4740/Kconfig | 4 + arch/mips/jz4740/setup.c | 4 + 3 files changed, 342 insertions(+) create mode 100644 arch/mips/boot/dts/ingenic/jz4725b.dtsi diff --git a/arch/mips/boot/dts/ingenic/jz4725b.dtsi b/arch/mips/boot/dts/ingenic/jz4725b.dtsi new file mode 100644 index 000000000000..89402a15f049 --- /dev/null +++ b/arch/mips/boot/dts/ingenic/jz4725b.dtsi @@ -0,0 +1,334 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ingenic,jz4725b"; + + cpuintc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + intc: interrupt-controller@10001000 { + compatible = "ingenic,jz4725b-intc", "ingenic,jz4740-intc"; + reg = <0x10001000 0x14>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; + }; + + ext: ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + osc32k: osc32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + cgu: clock-controller@10000000 { + compatible = "ingenic,jz4725b-cgu"; + reg = <0x10000000 0x100>; + + clocks = <&ext>, <&osc32k>; + clock-names = "ext", "osc32k"; + + #clock-cells = <1>; + }; + + tcu: timer@10002000 { + compatible = "ingenic,jz4725b-tcu", "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4725B_CLK_RTC>, + <&cgu JZ4725B_CLK_EXT>, + <&cgu JZ4725B_CLK_PCLK>, + <&cgu JZ4725B_CLK_TCU>; + clock-names = "rtc", "ext", "pclk", "tcu"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <23>, <22>, <21>; + + watchdog: watchdog@0 { + compatible = "ingenic,jz4725b-watchdog", "ingenic,jz4740-watchdog"; + reg = <0x0 0xc>; + + clocks = <&tcu TCU_CLK_WDT>; + clock-names = "wdt"; + }; + + pwm: pwm@60 { + compatible = "ingenic,jz4725b-pwm"; + reg = <0x60 0x40>; + + #pwm-cells = <3>; + + clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, + <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>, + <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>; + clock-names = "timer0", "timer1", "timer2", + "timer3", "timer4", "timer5"; + }; + + ost: timer@e0 { + compatible = "ingenic,jz4725b-ost"; + reg = <0xe0 0x20>; + + clocks = <&tcu TCU_CLK_OST>; + clock-names = "ost"; + + interrupts = <15>; + }; + }; + + rtc_dev: rtc@10003000 { + compatible = "ingenic,jz4725b-rtc", "ingenic,jz4740-rtc"; + reg = <0x10003000 0x40>; + + interrupt-parent = <&intc>; + interrupts = <6>; + + clocks = <&cgu JZ4725B_CLK_RTC>; + clock-names = "rtc"; + }; + + pinctrl: pinctrl@10010000 { + compatible = "ingenic,jz4725b-pinctrl"; + reg = <0x10010000 0x400>; + + #address-cells = <1>; + #size-cells = <0>; + + gpa: gpio@0 { + compatible = "ingenic,jz4725b-gpio"; + reg = <0>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <16>; + }; + + gpb: gpio@1 { + compatible = "ingenic,jz4725b-gpio"; + reg = <1>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <15>; + }; + + gpc: gpio@2 { + compatible = "ingenic,jz4725b-gpio"; + reg = <2>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <14>; + }; + + gpd: gpio@3 { + compatible = "ingenic,jz4725b-gpio"; + reg = <3>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <13>; + }; + }; + + aic: audio-controller@10020000 { + compatible = "ingenic,jz4725b-i2s", "ingenic,jz4740-i2s"; + reg = <0x10020000 0x38>; + + #sound-dai-cells = <0>; + + clocks = <&cgu JZ4725B_CLK_AIC>, + <&cgu JZ4725B_CLK_I2S>, + <&cgu JZ4725B_CLK_EXT>, + <&cgu JZ4725B_CLK_PLL_HALF>; + clock-names = "aic", "i2s", "ext", "pll half"; + + interrupt-parent = <&intc>; + interrupts = <10>; + + dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>; + dma-names = "rx", "tx"; + }; + + codec: audio-codec@100200a4 { + compatible = "ingenic,jz4725b-codec"; + reg = <0x100200a4 0x8>; + + #sound-dai-cells = <0>; + + clocks = <&cgu JZ4725B_CLK_AIC>; + clock-names = "aic"; + }; + + mmc0: mmc@10021000 { + compatible = "ingenic,jz4725b-mmc"; + reg = <0x10021000 0x1000>; + + clocks = <&cgu JZ4725B_CLK_MMC0>; + clock-names = "mmc"; + + interrupt-parent = <&intc>; + interrupts = <25>; + + dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>; + dma-names = "rx", "tx"; + + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + }; + + mmc1: mmc@10022000 { + compatible = "ingenic,jz4725b-mmc"; + reg = <0x10022000 0x1000>; + + clocks = <&cgu JZ4725B_CLK_MMC1>; + clock-names = "mmc"; + + interrupt-parent = <&intc>; + interrupts = <24>; + + dmas = <&dmac 31 0xffffffff>, <&dmac 30 0xffffffff>; + dma-names = "rx", "tx"; + + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + }; + + uart: serial@10030000 { + compatible = "ingenic,jz4725b-uart", "ingenic,jz4740-uart"; + reg = <0x10030000 0x100>; + + interrupt-parent = <&intc>; + interrupts = <9>; + + clocks = <&ext>, <&cgu JZ4725B_CLK_UART>; + clock-names = "baud", "module"; + }; + + adc: adc@10070000 { + compatible = "ingenic,jz4725b-adc"; + #io-channel-cells = <1>; + + reg = <0x10070000 0x30>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10070000 0x30>; + + clocks = <&cgu JZ4725B_CLK_ADC>; + clock-names = "adc"; + + interrupt-parent = <&intc>; + interrupts = <18>; + }; + + nemc: memory-controller@13010000 { + compatible = "ingenic,jz4725b-nemc", "ingenic,jz4740-nemc"; + reg = <0x13010000 0x10000>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <1 0 0x18000000 0x4000000>, <2 0 0x14000000 0x4000000>, + <3 0 0x0c000000 0x4000000>, <4 0 0x08000000 0x4000000>; + + clocks = <&cgu JZ4725B_CLK_MCLK>; + }; + + dmac: dma-controller@13020000 { + compatible = "ingenic,jz4725b-dma"; + reg = <0x13020000 0xd8>, <0x13020300 0x14>; + + #dma-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <29>; + + clocks = <&cgu JZ4725B_CLK_DMA>; + }; + + udc: usb@13040000 { + compatible = "ingenic,jz4725b-musb", "ingenic,jz4740-musb"; + reg = <0x13040000 0x10000>; + + interrupt-parent = <&intc>; + interrupts = <27>; + interrupt-names = "mc"; + + clocks = <&cgu JZ4725B_CLK_UDC>; + clock-names = "udc"; + }; + + lcd: lcd-controller@13050000 { + compatible = "ingenic,jz4725b-lcd"; + reg = <0x13050000 0x1000>; + + interrupt-parent = <&intc>; + interrupts = <31>; + + clocks = <&cgu JZ4725B_CLK_LCD>; + clock-names = "lcd_pclk"; + }; + + bch: ecc-controller@130d0000 { + compatible = "ingenic,jz4725b-bch"; + reg = <0x130d0000 0x44>; + + clocks = <&cgu JZ4725B_CLK_BCH>; + }; + + rom: memory@1fc00000 { + compatible = "mtd-rom"; + probe-type = "map_rom"; + reg = <0x1fc00000 0x2000>; + + bank-width = <4>; + device-width = <1>; + }; +}; diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig index 9c2e8c15bb97..0325153efbd4 100644 --- a/arch/mips/jz4740/Kconfig +++ b/arch/mips/jz4740/Kconfig @@ -29,6 +29,10 @@ config X1000_CU1000_NEO endchoice +config MACH_JZ4725B + bool + select SYS_HAS_CPU_MIPS32_R1 + config MACH_JZ4740 bool select SYS_HAS_CPU_MIPS32_R1 diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c index 61468a87775c..83f343abf13e 100644 --- a/arch/mips/jz4740/setup.c +++ b/arch/mips/jz4740/setup.c @@ -57,6 +57,8 @@ static unsigned long __init get_board_mach_type(const void *fdt) return MACH_INGENIC_JZ4780; if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4770")) return MACH_INGENIC_JZ4770; + if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4725b")) + return MACH_INGENIC_JZ4725B; return MACH_INGENIC_JZ4740; } @@ -99,6 +101,8 @@ const char *get_system_type(void) return "JZ4780"; case MACH_INGENIC_JZ4770: return "JZ4770"; + case MACH_INGENIC_JZ4725B: + return "JZ4725B"; default: return "JZ4740"; } From patchwork Tue Jun 23 18:24:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11621375 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E574592A for ; Tue, 23 Jun 2020 18:25:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C7F3B20809 for ; Tue, 23 Jun 2020 18:25:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="s2UcFamX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733261AbgFWSZ1 (ORCPT ); Tue, 23 Jun 2020 14:25:27 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:52152 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732549AbgFWSZ0 (ORCPT ); Tue, 23 Jun 2020 14:25:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1592936688; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XghSCXLoXnDYRQ/6JmcfdRYpTnLy4dP9MGr2AOJEaqM=; b=s2UcFamXFjhJBChZ5WsBn+lzWyPdYLxhZchfzUi7VJqmlt1mLRc5TCDBmLMi/3nXKvxEBt JaqPjJrOiFi8PA72g2b44USOY4bwP/PCfqs3FMkaInX84hBAao47545U8uM+AGjZb07RPk zBGZzBNqEXXQbQrSOXMjRlqwHMhWNvE= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring Cc: =?utf-8?b?5ZGo55Cw5p2w?= , od@zcrc.me, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 6/7] MIPS: ingenic: Add support for the RS90 board Date: Tue, 23 Jun 2020 20:24:31 +0200 Message-Id: <20200623182432.187843-6-paul@crapouillou.net> In-Reply-To: <20200623182432.187843-1-paul@crapouillou.net> References: <20200623182432.187843-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The RS-90, better known as RetroMini, is a small and pocketable handheld gaming console from YLMChina. It has little more than a JZ4725B SoC, a NAND, a screen, some buttons and a speaker. Signed-off-by: Paul Cercueil --- arch/mips/boot/dts/ingenic/Makefile | 1 + arch/mips/boot/dts/ingenic/rs90.dts | 311 ++++++++++++++++++++++++++++ arch/mips/jz4740/Kconfig | 4 + 3 files changed, 316 insertions(+) create mode 100644 arch/mips/boot/dts/ingenic/rs90.dts diff --git a/arch/mips/boot/dts/ingenic/Makefile b/arch/mips/boot/dts/ingenic/Makefile index e1654291a7b0..f23ff5109e5b 100644 --- a/arch/mips/boot/dts/ingenic/Makefile +++ b/arch/mips/boot/dts/ingenic/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_JZ4740_QI_LB60) += qi_lb60.dtb +dtb-$(CONFIG_JZ4740_RS90) += rs90.dtb dtb-$(CONFIG_JZ4770_GCW0) += gcw0.dtb dtb-$(CONFIG_JZ4780_CI20) += ci20.dtb dtb-$(CONFIG_X1000_CU1000_NEO) += cu1000-neo.dtb diff --git a/arch/mips/boot/dts/ingenic/rs90.dts b/arch/mips/boot/dts/ingenic/rs90.dts new file mode 100644 index 000000000000..246f97efe5ef --- /dev/null +++ b/arch/mips/boot/dts/ingenic/rs90.dts @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "jz4725b.dtsi" + +#include +#include +#include + +/ { + compatible = "ylm,rs90", "ingenic,jz4725b"; + model = "RS-90"; + + memory { + device_type = "memory"; + reg = <0x0 0x2000000>; + }; + + vcc: regulator { + compatible = "regulator-fixed"; + + regulator-name = "vcc"; + regulaor-min-microvolt = <3300000>; + regulaor-max-microvolt = <3300000>; + regulator-always-on; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 3 40000 0>; + + brightness-levels = <0 16 32 48 64 80 112 144 192 255>; + default-brightness-level = <8>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_pwm3>; + + power-supply = <&vcc>; + }; + + keys@0 { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + key@0 { + label = "D-pad up"; + linux,code = ; + gpios = <&gpc 10 GPIO_ACTIVE_LOW>; + }; + + key@1 { + label = "D-pad down"; + linux,code = ; + gpios = <&gpc 11 GPIO_ACTIVE_LOW>; + }; + + key@2 { + label = "D-pad left"; + linux,code = ; + gpios = <&gpb 31 GPIO_ACTIVE_LOW>; + }; + + key@3 { + label = "D-pad right"; + linux,code = ; + gpios = <&gpd 21 GPIO_ACTIVE_LOW>; + }; + + key@4 { + label = "Button A"; + linux,code = ; + gpios = <&gpc 31 GPIO_ACTIVE_LOW>; + }; + + key@5 { + label = "Button B"; + linux,code = ; + gpios = <&gpc 30 GPIO_ACTIVE_LOW>; + }; + + key@6 { + label = "Right shoulder button"; + linux,code = ; + gpios = <&gpc 12 GPIO_ACTIVE_LOW>; + debounce-interval = <10>; + }; + + key@7 { + label = "Start button"; + linux,code = ; + gpios = <&gpd 17 GPIO_ACTIVE_LOW>; + }; + }; + + keys@1 { + compatible = "adc-keys"; + io-channels = <&adc INGENIC_ADC_AUX>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1400000>; + poll-interval = <30>; + + key@0 { + label = "Left shoulder button"; + linux,code = ; + press-threshold-microvolt = <800000>; + }; + + key@1 { + label = "Select button"; + linux,code = ; + press-threshold-microvolt = <1100000>; + }; + }; + + amp: analog-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpc 15 GPIO_ACTIVE_HIGH>; + + VCC-supply = <&vcc>; + }; + + sound { + compatible = "simple-audio-card"; + + simple-audio-card,name = "rs90-audio"; + simple-audio-card,format = "i2s"; + + simple-audio-card,widgets = + "Speaker", "Speaker", + "Headphone", "Headphones"; + simple-audio-card,routing = + "INL", "LHPOUT", + "INR", "RHPOUT", + "Headphones", "LHPOUT", + "Headphones", "RHPOUT", + "Speaker", "OUTL", + "Speaker", "OUTR"; + simple-audio-card,pin-switches = "Speaker"; + + simple-audio-card,hp-det-gpio = <&gpd 16 GPIO_ACTIVE_LOW>; + simple-audio-card,aux-devs = <&>; + + simple-audio-card,bitclock-master = <&dai_codec>; + simple-audio-card,frame-master = <&dai_codec>; + + dai_cpu: simple-audio-card,cpu { + sound-dai = <&aic>; + }; + + dai_codec: simple-audio-card,codec { + sound-dai = <&codec>; + }; + + }; + + usb_phy: usb-phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + + clocks = <&cgu JZ4725B_CLK_UDC_PHY>; + clock-names = "main_clk"; + vcc-supply = <&vcc>; + }; + + panel { + compatible = "sharp,ls020b1dd01d"; + + backlight = <&backlight>; + power-supply = <&vcc>; + + port { + panel_input: endpoint { + remote-endpoint = <&panel_output>; + }; + }; + }; +}; + +&ext { + clock-frequency = <12000000>; +}; + +&rtc_dev { + system-power-controller; +}; + +&udc { + phys = <&usb_phy>; +}; + +&pinctrl { + pins_mmc1: mmc1 { + function = "mmc1"; + groups = "mmc1-1bit"; + }; + + pins_nemc: nemc { + function = "nand"; + groups = "nand-cs1", "nand-cle-ale", "nand-fre-fwe"; + }; + + pins_pwm3: pwm3 { + function = "pwm3"; + groups = "pwm3"; + bias-disable; + }; + + pins_lcd: lcd { + function = "lcd"; + groups = "lcd-8bit", "lcd-16bit", "lcd-special"; + }; +}; + +&mmc0 { + status = "disabled"; +}; + +&mmc1 { + bus-width = <1>; + max-frequency = <48000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_mmc1>; + + cd-gpios = <&gpc 20 GPIO_ACTIVE_LOW>; +}; + +&uart { + /* + * The pins for RX/TX are used for the right shoulder button and + * backlight PWM. + */ + status = "disabled"; +}; + +&nemc { + nandc: nand-controller@1 { + compatible = "ingenic,jz4725b-nand"; + reg = <1 0 0x4000000>; + + #address-cells = <1>; + #size-cells = <0>; + + ecc-engine = <&bch>; + + ingenic,nemc-tAS = <10>; + ingenic,nemc-tAH = <5>; + ingenic,nemc-tBP = <10>; + ingenic,nemc-tAW = <15>; + ingenic,nemc-tSTRV = <100>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_nemc>; + + rb-gpios = <&gpc 27 GPIO_ACTIVE_HIGH>; + + nand@1 { + reg = <1>; + + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + nand-ecc-mode = "hw"; + nand-is-boot-medium; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x0 0x20000>; + }; + + partition@20000 { + label = "system"; + reg = <0x20000 0x0>; + }; + }; + }; + }; +}; + +&cgu { + /* Use 32kHz oscillator as the parent of the RTC clock */ + assigned-clocks = <&cgu JZ4725B_CLK_RTC>; + assigned-clock-parents = <&cgu JZ4725B_CLK_OSC32K>; +}; + +&tcu { + /* + * 750 kHz for the system timer and clocksource, and use RTC as the + * parent for the watchdog clock. + */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, <&tcu TCU_CLK_WDT>; + assigned-clock-parents = <0>, <0>, <&cgu JZ4725B_CLK_RTC>; + assigned-clock-rates = <750000>, <750000>; +}; + +&lcd { + pinctrl-names = "default"; + pinctrl-0 = <&pins_lcd>; + + port { + panel_output: endpoint { + remote-endpoint = <&panel_input>; + }; + }; +}; diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig index 0325153efbd4..baa315c8183a 100644 --- a/arch/mips/jz4740/Kconfig +++ b/arch/mips/jz4740/Kconfig @@ -15,6 +15,10 @@ config JZ4740_QI_LB60 bool "Qi Hardware Ben NanoNote" select MACH_JZ4740 +config JZ4740_RS90 + bool "YLM RetroMini (RS-90)" + select MACH_JZ4725B + config JZ4770_GCW0 bool "Game Consoles Worldwide GCW Zero" select MACH_JZ4770 From patchwork Tue Jun 23 18:24:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11621377 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BCB566C1 for ; Tue, 23 Jun 2020 18:25:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9ECD720809 for ; Tue, 23 Jun 2020 18:25:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="EL3fcqKk" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732549AbgFWSZf (ORCPT ); Tue, 23 Jun 2020 14:25:35 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:52196 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733075AbgFWSZf (ORCPT ); Tue, 23 Jun 2020 14:25:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1592936689; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EPdm0Yhn/83KdV9iPjfd0sOIgIxMXCsj5QXkNwC1Uwo=; b=EL3fcqKkyd6KqdKZRIqAwoXlabo1AeUTWKWHITV+xL00oaeGYbvHD4bX151bVTror+sazA dM9WoBAslVZFiEn5nuMcy7qvURD65zZT9GEeJs4Qu9YKeAxfLG+gCGAoOw1D5WUFXl4yUQ 82dW1WXP7cuZ4bj917s42u/3VVe9vHg= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring Cc: =?utf-8?b?5ZGo55Cw5p2w?= , od@zcrc.me, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 7/7] MIPS: ingenic: RS90: Added defconfig Date: Tue, 23 Jun 2020 20:24:32 +0200 Message-Id: <20200623182432.187843-7-paul@crapouillou.net> In-Reply-To: <20200623182432.187843-1-paul@crapouillou.net> References: <20200623182432.187843-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add a basic default config for the RS-90 RetroMini board. Signed-off-by: Paul Cercueil --- arch/mips/configs/rs90_defconfig | 182 +++++++++++++++++++++++++++++++ 1 file changed, 182 insertions(+) create mode 100644 arch/mips/configs/rs90_defconfig diff --git a/arch/mips/configs/rs90_defconfig b/arch/mips/configs/rs90_defconfig new file mode 100644 index 000000000000..433ac5c0266a --- /dev/null +++ b/arch/mips/configs/rs90_defconfig @@ -0,0 +1,182 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_DEFAULT_HOSTNAME="rs90" +# CONFIG_CROSS_MEMORY_ATTACH is not set +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y +# CONFIG_SGETMASK_SYSCALL is not set +# CONFIG_SYSFS_SYSCALL is not set +# CONFIG_ELF_CORE is not set +# CONFIG_BASE_FULL is not set +# CONFIG_TIMERFD is not set +# CONFIG_AIO is not set +# CONFIG_IO_URING is not set +# CONFIG_ADVISE_SYSCALLS is not set +# CONFIG_KALLSYMS is not set +CONFIG_EMBEDDED=y +# CONFIG_PERF_EVENTS is not set +CONFIG_SLAB=y +CONFIG_PROFILING=y +CONFIG_MACH_INGENIC=y +CONFIG_JZ4740_RS90=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +CONFIG_MIPS_CMDLINE_DTB_EXTEND=y +# CONFIG_SUSPEND is not set +CONFIG_PM=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +CONFIG_CPUFREQ_DT=y +CONFIG_OPROFILE=y +CONFIG_JUMP_LABEL=y +# CONFIG_STACKPROTECTOR is not set +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +# CONFIG_EFI_PARTITION is not set +# CONFIG_MQ_IOSCHED_DEADLINE is not set +# CONFIG_MQ_IOSCHED_KYBER is not set +CONFIG_FRONTSWAP=y +CONFIG_CMA=y +CONFIG_ZSMALLOC=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +# CONFIG_INET_DIAG is not set +CONFIG_TCP_CONG_ADVANCED=y +# CONFIG_TCP_CONG_BIC is not set +# CONFIG_TCP_CONG_CUBIC is not set +# CONFIG_TCP_CONG_HTCP is not set +# CONFIG_IPV6 is not set +# CONFIG_WIRELESS is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_NAND_JZ4780=y +CONFIG_MTD_NAND_JZ4725B_BCH=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_ZRAM=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 +CONFIG_NETDEVICES=y +# CONFIG_ETHERNET is not set +# CONFIG_WLAN is not set +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_ADC=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_LEGACY_PTY_COUNT=2 +# CONFIG_DEVMEM is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_I2C_COMPAT is not set +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_INGENIC=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is not set +CONFIG_JZ4740_WDT=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_DRM=y +CONFIG_DRM_FBDEV_OVERALLOC=300 +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_INGENIC=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_VGA_CONSOLE is not set +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_PCM_TIMER is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_PROC_FS is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_MIPS is not set +CONFIG_SND_SOC=y +CONFIG_SND_JZ4740_SOC_I2S=y +CONFIG_SND_SOC_JZ4725B_CODEC=y +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_HID is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_JZ4740=y +CONFIG_USB_INVENTRA_DMA=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_MMC=y +# CONFIG_PWRSEQ_EMMC is not set +# CONFIG_PWRSEQ_SIMPLE is not set +CONFIG_MMC_JZ4740=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_SYSTOHC is not set +# CONFIG_RTC_NVMEM is not set +# CONFIG_RTC_INTF_PROC is not set +CONFIG_RTC_DRV_JZ4740=y +CONFIG_DMADEVICES=y +CONFIG_DMA_JZ4780=y +# CONFIG_VIRTIO_MENU is not set +# CONFIG_MIPS_PLATFORM_DEVICES is not set +CONFIG_INGENIC_OST=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_MEMORY=y +CONFIG_IIO=y +CONFIG_INGENIC_ADC=y +CONFIG_IIO_RESCALE=y +CONFIG_PWM=y +CONFIG_PWM_JZ4740=y +# CONFIG_NVMEM is not set +CONFIG_EXT4_FS=y +# CONFIG_DNOTIFY is not set +CONFIG_VFAT_FS=y +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +# CONFIG_UBIFS_FS_ZSTD is not set +# CONFIG_UBIFS_FS_XATTR is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_DECOMP_MULTI=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +# CONFIG_CRYPTO_HW is not set +CONFIG_FONTS=y +CONFIG_FONT_6x10=y +# CONFIG_SYMBOLIC_ERRNAME is not set +CONFIG_STRIP_ASM_SYMS=y +# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set +# CONFIG_DEBUG_MISC is not set +CONFIG_PANIC_ON_OOPS=y +# CONFIG_FTRACE is not set +# CONFIG_RUNTIME_TESTING_MENU is not set