From patchwork Wed Jun 24 22:39:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean V Kelley X-Patchwork-Id: 11624431 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BBBA090 for ; Wed, 24 Jun 2020 22:44:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9E8F52100A for ; Wed, 24 Jun 2020 22:44:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388739AbgFXWor (ORCPT ); Wed, 24 Jun 2020 18:44:47 -0400 Received: from mga11.intel.com ([192.55.52.93]:29770 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732832AbgFXWoq (ORCPT ); Wed, 24 Jun 2020 18:44:46 -0400 IronPort-SDR: RaRPYBsvr9ALeTIoTG9p9O2D2DadTlF6cq+jqVTQ35TxumowOvff0jRj6Jel4fZI4oTi5TIktB OXhu5hy52+gg== X-IronPort-AV: E=McAfee;i="6000,8403,9662"; a="142883970" X-IronPort-AV: E=Sophos;i="5.75,276,1589266800"; d="scan'208";a="142883970" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2020 15:39:44 -0700 IronPort-SDR: cNps1jy7qZoYsPpoYPWBRq3Nl4rMJIpfBIk2GRYOJR8bXB6LNn2w7D6xjak6KlLwbrGRBHwZiU W6RsexAkXZeg== X-IronPort-AV: E=Sophos;i="5.75,276,1589266800"; d="scan'208";a="479435927" Received: from arpeshla-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.254.43.136]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2020 15:39:42 -0700 From: Sean V Kelley To: mj@ucw.cz, bhelgaas@google.com Cc: linux-pci@vger.kernel.org, Sean V Kelley Subject: [PATCH v3] pciutils: Add decode support for RCECs Date: Wed, 24 Jun 2020 15:39:40 -0700 Message-Id: <20200624223940.240463-1-sean.v.kelley@linux.intel.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Root Complex Event Collectors provide support for terminating error and PME messages from RCiEPs. This patch provides basic decoding for the lspci RCEC Endpoint Association Extended Capability. See PCIe 5.0-1, sec 7.9.10 for further details. Suggested-by: Bjorn Helgaas Signed-off-by: Sean V Kelley --- Changes since v2 [1]: - Incorporated suggested improvement to RCiEP bitmap generation. - Extended to support hyphenating adjacent devices in bitmap. - Added verbose granularity on "none" cases for bitmap and BUSN reporting. - Corrected use of "first" with "next" as found in the Spec. - Reported "AssociatedBusNumbers" as a single hyphenated field. - Regenerated test output with new formatting. i.e., "-vvv" case Capabilities: [160 v2] Root Complex Event Collector Endpoint Association RCiEPBitmap: 00000000 [none] AssociatedBusNumbers: ff-00 [none] "-vv" case Capabilities: [160 v2] Root Complex Event Collector Endpoint Association RCiEPBitmap: [none] AssociatedBusNumbers: [none] (Bjorn Helgaas) [1] https://lore.kernel.org/linux-pci/20200624040024.895996-1-sean.v.kelley@linux.intel.com/ Thanks, Sean --- lib/header.h | 8 +- ls-ecaps.c | 59 +++++++++- setpci.c | 2 +- tests/cap-rcec | 299 +++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 364 insertions(+), 4 deletions(-) create mode 100644 tests/cap-rcec -- 2.27.0 diff --git a/lib/header.h b/lib/header.h index 472816e..57a9343 100644 --- a/lib/header.h +++ b/lib/header.h @@ -219,7 +219,7 @@ #define PCI_EXT_CAP_ID_PB 0x04 /* Power Budgeting */ #define PCI_EXT_CAP_ID_RCLINK 0x05 /* Root Complex Link Declaration */ #define PCI_EXT_CAP_ID_RCILINK 0x06 /* Root Complex Internal Link Declaration */ -#define PCI_EXT_CAP_ID_RCECOLL 0x07 /* Root Complex Event Collector */ +#define PCI_EXT_CAP_ID_RCEC 0x07 /* Root Complex Event Collector */ #define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function Virtual Channel */ #define PCI_EXT_CAP_ID_VC2 0x09 /* Virtual Channel (2nd ID) */ #define PCI_EXT_CAP_ID_RCRB 0x0a /* Root Complex Register Block */ @@ -1048,6 +1048,12 @@ #define PCI_RCLINK_LINK_ADDR 8 /* Link Entry: Address (64-bit) */ #define PCI_RCLINK_LINK_SIZE 16 /* Link Entry: sizeof */ +/* Root Complex Event Collector Endpoint Association */ +#define PCI_RCEC_EP_CAP_VER(reg) (((reg) >> 16) & 0xf) +#define PCI_RCEC_BUSN_REG_VER 0x02 /* as per PCIe sec 7.9.10.1 */ +#define PCI_RCEC_RCIEP_BMAP 0x0004 /* as per PCIe sec 7.9.10.2 */ +#define PCI_RCEC_BUSN_REG 0x0008 /* as per PCIe sec 7.9.10.3 */ + /* PCIe Vendor-Specific Capability */ #define PCI_EVNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_EVNDR_REGISTERS 8 /* Vendor-Specific Registers */ diff --git a/ls-ecaps.c b/ls-ecaps.c index e71209e..99c55ff 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -634,6 +634,61 @@ cap_rclink(struct device *d, int where) } } +static void +cap_rcec(struct device *d, int where) +{ + printf("Root Complex Event Collector Endpoint Association\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where, 12)) + return; + + u32 hdr = get_conf_long(d, where); + byte cap_ver = PCI_RCEC_EP_CAP_VER(hdr); + u32 bmap = get_conf_long(d, where + PCI_RCEC_RCIEP_BMAP); + printf("\t\tRCiEPBitmap: "); + if (bmap) + { + int prevmatched=0; + int adjcount=0; + int prevdev=0; + printf("RCiEP at Device(s):"); + for (int dev=0; dev < 32; dev++) + { + if (BITS(bmap, dev, 1)) + { + if (!adjcount) + printf("%s %u", (prevmatched) ? "," : "", dev); + adjcount++; + prevdev=dev; + prevmatched=1; + } + else + { + if (adjcount > 1) + printf("-%u", prevdev); + adjcount=0; + } + } + } + else + printf("%s", (verbose > 2) ? "00000000 [none]" : "[none]"); + printf("\n"); + + if (cap_ver < PCI_RCEC_BUSN_REG_VER) + return; + + u32 busn = get_conf_long(d, where + PCI_RCEC_BUSN_REG); + u8 lastbusn = BITS(busn, 16, 8); + u8 nextbusn = BITS(busn, 8, 8); + + if ((lastbusn == 0x00) && (nextbusn == 0xff)) + printf("\t\tAssociatedBusNumbers: %s\n", (verbose > 2) ? "ff-00 [none]" : "[none]"); + else + printf("\t\tAssociatedBusNumbers: %02x-%02x\n", nextbusn, lastbusn ); +} + static void cap_dvsec_cxl(struct device *d, int where) { @@ -991,8 +1046,8 @@ show_ext_caps(struct device *d, int type) case PCI_EXT_CAP_ID_RCILINK: printf("Root Complex Internal Link \n"); break; - case PCI_EXT_CAP_ID_RCECOLL: - printf("Root Complex Event Collector \n"); + case PCI_EXT_CAP_ID_RCEC: + cap_rcec(d, where); break; case PCI_EXT_CAP_ID_MFVC: printf("Multi-Function Virtual Channel \n"); diff --git a/setpci.c b/setpci.c index 90ca726..2cb70fa 100644 --- a/setpci.c +++ b/setpci.c @@ -350,7 +350,7 @@ static const struct reg_name pci_reg_names[] = { { 0x20004, 0, 0, "ECAP_PB" }, { 0x20005, 0, 0, "ECAP_RCLINK" }, { 0x20006, 0, 0, "ECAP_RCILINK" }, - { 0x20007, 0, 0, "ECAP_RCECOLL" }, + { 0x20007, 0, 0, "ECAP_RCEC" }, { 0x20008, 0, 0, "ECAP_MFVC" }, { 0x20009, 0, 0, "ECAP_VC2" }, { 0x2000a, 0, 0, "ECAP_RBCB" }, diff --git a/tests/cap-rcec b/tests/cap-rcec new file mode 100644 index 0000000..836d9a1 --- /dev/null +++ b/tests/cap-rcec @@ -0,0 +1,299 @@ +6a:00.4 Generic system peripheral [0807]: Intel Corporation Device 0b23 + Subsystem: Intel Corporation Device 0000 + Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR-