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X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [192.185.51.139 listed in wl.mailspike.net] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [192.185.51.139 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Matheus Castello , linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Change the enable-method to fix the failed to boot errors: [ 0.040330] smp: Bringing up secondary CPUs ... [ 0.040683] psci: failed to boot CPU1 (-22) [ 0.040691] CPU1: failed to boot: -22 [ 0.041062] psci: failed to boot CPU2 (-22) [ 0.041071] CPU2: failed to boot: -22 [ 0.041408] psci: failed to boot CPU3 (-22) [ 0.041417] CPU3: failed to boot: -22 [ 0.041443] smp: Brought up 1 node, 1 CPU [ 0.041451] SMP: Total of 1 processors activated. Tested on Caninos Labrador v3 based on Actions Semi S700. Signed-off-by: Matheus Castello Tested-by: Helen Koike --- arch/arm64/boot/dts/actions/s700.dtsi | 33 +++++++++++++++++++-------- 1 file changed, 23 insertions(+), 10 deletions(-) -- 2.27.0 diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index 2006ad5424fa..b28dbbcad27b 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -14,37 +14,50 @@ / { #size-cells = <2>; cpus { - #address-cells = <2>; + #address-cells = <1>; #size-cells = <0>; - + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - enable-method = "psci"; + reg = <0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x1f000020>; + next-level-cache = <&L2>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53"; - reg = <0x0 0x1>; - enable-method = "psci"; + reg = <0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x1f000020>; + next-level-cache = <&L2>; }; cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53"; - reg = <0x0 0x2>; - enable-method = "psci"; + reg = <0x2>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x1f000020>; + next-level-cache = <&L2>; }; cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53"; - reg = <0x0 0x3>; - enable-method = "psci"; + reg = <0x3>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x1f000020>; + next-level-cache = <&L2>; }; }; + + L2: l2-cache { + compatible = "cache"; + cache-level = <2>; + }; reserved-memory { #address-cells = <2>;