From patchwork Wed Jul 8 11:07:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 11651355 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 47A1113B4 for ; Wed, 8 Jul 2020 11:07:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2EBBA20739 for ; Wed, 8 Jul 2020 11:07:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728507AbgGHLHd (ORCPT ); Wed, 8 Jul 2020 07:07:33 -0400 Received: from foss.arm.com ([217.140.110.172]:60930 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728466AbgGHLHc (ORCPT ); Wed, 8 Jul 2020 07:07:32 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1909431B; Wed, 8 Jul 2020 04:07:32 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 173033F68F; Wed, 8 Jul 2020 04:07:30 -0700 (PDT) From: Sudeep Holla To: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Stephen Boyd Cc: Sudeep Holla , linux-kernel@vger.kernel.org, Michael Turquette , Dien Pham Subject: [PATCH 1/2] firmware: arm_scmi: Keep the discrete clock rates sorted Date: Wed, 8 Jul 2020 12:07:24 +0100 Message-Id: <20200708110725.18017-1-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Instead of relying on the firmware to keep the clock rates sorted, let us sort the list. This is not essential for clock layer but it helps to find the min and max rates easily from the list. Fixes: 5f6c6430e904 ("firmware: arm_scmi: add initial support for clock protocol") Reported-by: Dien Pham Signed-off-by: Sudeep Holla --- drivers/firmware/arm_scmi/clock.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) Hi Dien-san, If you could review/test these patches, I can queue them ASAP. I am planning to send the PR for ARM SoC later this week, so I need your tested-by. Regards, Sudeep -- 2.17.1 diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c index 4c2227662b26..2dd119cdebf6 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -5,6 +5,8 @@ * Copyright (C) 2018 ARM Ltd. */ +#include + #include "common.h" enum scmi_clock_protocol_cmd { @@ -121,6 +123,13 @@ static int scmi_clock_attributes_get(const struct scmi_handle *handle, return ret; } +static int rate_cmp_func(const void *_r1, const void *_r2) +{ + u64 *r1 = _r1, *r2 = _r2; + + return r1 - r2; +} + static int scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id, struct scmi_clock_info *clk) @@ -184,8 +193,10 @@ scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id, */ } while (num_returned && num_remaining); - if (rate_discrete) + if (rate_discrete) { clk->list.num_rates = tot_rate_cnt; + sort(rate, tot_rate_cnt, sizeof(*rate), rate_cmp_func, NULL); + } clk->rate_discrete = rate_discrete; From patchwork Wed Jul 8 11:07:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 11651357 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A10FF13B4 for ; Wed, 8 Jul 2020 11:07:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 90B072078A for ; Wed, 8 Jul 2020 11:07:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728660AbgGHLHf (ORCPT ); Wed, 8 Jul 2020 07:07:35 -0400 Received: from foss.arm.com ([217.140.110.172]:60944 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728466AbgGHLHe (ORCPT ); Wed, 8 Jul 2020 07:07:34 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4C9791045; Wed, 8 Jul 2020 04:07:33 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4C1383F68F; Wed, 8 Jul 2020 04:07:32 -0700 (PDT) From: Sudeep Holla To: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Stephen Boyd Cc: Sudeep Holla , linux-kernel@vger.kernel.org, Michael Turquette , Dien Pham Subject: [PATCH 2/2] clk: scmi: Fix min and max rate when registering clocks with discrete rates Date: Wed, 8 Jul 2020 12:07:25 +0100 Message-Id: <20200708110725.18017-2-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200708110725.18017-1-sudeep.holla@arm.com> References: <20200708110725.18017-1-sudeep.holla@arm.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Currently we are not initializing the scmi clock with discrete rates correctly. We fetch the min_rate and max_rate value only for clocks with ranges and ignore the ones with discrete rates. This will lead to wrong initialization of rate range when clock supports discrete rate. Fix this by using the first and the last rate in the sorted list of the discrete clock rates while registering the clock. Fixes: 6d6a1d82eaef7 ("clk: add support for clocks provided by SCMI") Reported-by: Dien Pham Signed-off-by: Sudeep Holla --- drivers/clk/clk-scmi.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) Hi Stephen, If you fine, I can take this via ARM SoC along with the change in firmware driver. But it is fine if you want to merge this independently as it should be fine. Let me know either way. Regards, Sudeep -- 2.17.1 diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index c491f5de0f3f..ea65b7bf1408 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -103,6 +103,8 @@ static const struct clk_ops scmi_clk_ops = { static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk) { int ret; + unsigned long min_rate, max_rate; + struct clk_init_data init = { .flags = CLK_GET_RATE_NOCACHE, .num_parents = 0, @@ -112,9 +114,23 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk) sclk->hw.init = &init; ret = devm_clk_hw_register(dev, &sclk->hw); - if (!ret) - clk_hw_set_rate_range(&sclk->hw, sclk->info->range.min_rate, - sclk->info->range.max_rate); + if (ret) + return ret; + + if (sclk->info->rate_discrete) { + int num_rates = sclk->info->list.num_rates; + + if (num_rates <= 0) + return -EINVAL; + + min_rate = sclk->info->list.rates[0] + max_rate = sclk->info->list.rates[num_rates - 1]; + } else { + min_rate = sclk->info->range.min_rate; + max_rate = sclk->info->range.max_rate; + } + + clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate); return ret; }