From patchwork Wed Oct 17 09:23:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Hao X-Patchwork-Id: 10644481 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 530F9109C for ; Wed, 17 Oct 2018 01:12:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 39C962A2CB for ; Wed, 17 Oct 2018 01:12:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A5092A2DB; Wed, 17 Oct 2018 01:12:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=2.0 tests=BAYES_00,DATE_IN_FUTURE_06_12, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8C7582A2CB for ; Wed, 17 Oct 2018 01:12:57 +0000 (UTC) Received: from localhost ([::1]:33222 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCaOO-0000J2-Pn for patchwork-qemu-devel@patchwork.kernel.org; Tue, 16 Oct 2018 21:12:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38842) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gCaNj-00083z-Du for qemu-devel@nongnu.org; Tue, 16 Oct 2018 21:12:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gCaNf-0001s3-Lw for qemu-devel@nongnu.org; Tue, 16 Oct 2018 21:12:14 -0400 Received: from mxhk.zte.com.cn ([63.217.80.70]:41628) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gCaNZ-0001kS-Ls; Tue, 16 Oct 2018 21:12:06 -0400 Received: from mse01.zte.com.cn (unknown [10.30.3.20]) by Forcepoint Email with ESMTPS id CF977B601CEFEB91874E; Wed, 17 Oct 2018 09:12:01 +0800 (CST) Received: from notes_smtp.zte.com.cn ([10.30.1.239]) by mse01.zte.com.cn with ESMTP id w9H1BuHQ025161; Wed, 17 Oct 2018 09:11:56 +0800 (GMT-8) (envelope-from peng.hao2@zte.com.cn) Received: from localhost.localdomain.localdomain ([10.74.120.59]) by szsmtp06.zte.com.cn (Lotus Domino Release 8.5.3FP6) with ESMTP id 2018101709121548-4968574 ; Wed, 17 Oct 2018 09:12:15 +0800 From: Peng Hao To: peter.maydell@linaro.org Date: Wed, 17 Oct 2018 17:23:27 +0800 Message-Id: <1539768207-18209-1-git-send-email-peng.hao2@zte.com.cn> X-Mailer: git-send-email 1.8.3.1 X-MIMETrack: Itemize by SMTP Server on SZSMTP06/server/zte_ltd(Release 8.5.3FP6|November 21, 2013) at 2018-10-17 09:12:15, Serialize by Router on notes_smtp/zte_ltd(Release 9.0.1FP7|August 17, 2016) at 2018-10-17 09:11:48, Serialize complete at 2018-10-17 09:11:48 X-MAIL: mse01.zte.com.cn w9H1BuHQ025161 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 63.217.80.70 Subject: [Qemu-devel] [PATCH] target/arm : add pvpanic mmio device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peng Hao , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add pvpanic mmio device that is similar to x86's pvpanic device. Signed-off-by: Peng Hao --- default-configs/arm-softmmu.mak | 2 +- hw/arm/virt.c | 21 ++++++++++++ hw/misc/Makefile.objs | 1 + hw/misc/pvpanic-mmio.c | 76 +++++++++++++++++++++++++++++++++++++++++ include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic-mmio.h | 12 +++++++ 6 files changed, 112 insertions(+), 1 deletion(-) create mode 100644 hw/misc/pvpanic-mmio.c create mode 100644 include/hw/misc/pvpanic-mmio.h diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 2420491..4713c92 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -43,7 +43,7 @@ CONFIG_USB_MUSB=y CONFIG_USB_EHCI_SYSBUS=y CONFIG_PLATFORM_BUS=y CONFIG_VIRTIO_MMIO=y - +CONFIG_PVPANIC_MMIO=y CONFIG_ARM11MPCORE=y CONFIG_A9MPCORE=y CONFIG_A15MPCORE=y diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a472566..ab41128 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -140,6 +140,7 @@ static const MemMapEntry a15memmap[] = { [VIRT_UART] = { 0x09000000, 0x00001000 }, [VIRT_RTC] = { 0x09010000, 0x00001000 }, [VIRT_FW_CFG] = { 0x09020000, 0x00000018 }, + [VIRT_PVPANIC_MMIO] = { 0x09020018, 0x00000002 }, [VIRT_GPIO] = { 0x09030000, 0x00001000 }, [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 }, [VIRT_SMMU] = { 0x09050000, 0x00020000 }, @@ -798,6 +799,24 @@ static void create_gpio(const VirtMachineState *vms, qemu_irq *pic) g_free(nodename); } +static void create_pvpanic_device(const VirtMachineState *vms) +{ + char *nodename; + hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base; + hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size; + + sysbus_create_simple("pvpanic-mmio", base, NULL); + + nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base); + qemu_fdt_add_subnode(vms->fdt, nodename); + qemu_fdt_setprop_string(vms->fdt, nodename, + "compatible", "pvpanic,mmio"); + qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + 2, base, 2, size); + g_free(nodename); + +} + static void create_virtio_devices(const VirtMachineState *vms, qemu_irq *pic) { int i; @@ -1544,6 +1563,8 @@ static void machvirt_init(MachineState *machine) create_pcie(vms, pic); + create_pvpanic_device(vms); + create_gpio(vms, pic); /* Create mmio transports, so the user can create virtio backends diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 6d50b03..6326260 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -71,6 +71,7 @@ obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o obj-$(CONFIG_PVPANIC) += pvpanic.o +obj-$(CONFIG_PVPANIC_MMIO) += pvpanic-mmio.o obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o diff --git a/hw/misc/pvpanic-mmio.c b/hw/misc/pvpanic-mmio.c new file mode 100644 index 0000000..c7f373e --- /dev/null +++ b/hw/misc/pvpanic-mmio.c @@ -0,0 +1,76 @@ +#include "qemu/osdep.h" +#include "sysemu/sysemu.h" +#include "qemu/log.h" +#include "hw/misc/pvpanic-mmio.h" + +#define PVPANIC_MMIO_FEAT_CRASHED 0 + +#define PVPANIC_MMIO_CRASHED (1 << PVPANIC_MMIO_FEAT_CRASHED) + +static void handle_mmio_event(int event) +{ + static bool logged; + + if (event & ~PVPANIC_MMIO_CRASHED && !logged) { + qemu_log_mask(LOG_GUEST_ERROR, "pvpanic-mmio: unknown event %#x.\n", event); + logged = true; + } + + if (event & PVPANIC_MMIO_CRASHED) { + qemu_system_guest_panicked(NULL); + return; + } +} + +static uint64_t pvpanic_mmio_read(void *opaque, hwaddr addr, unsigned size) +{ + return -1; +} + +static void pvpanic_mmio_write(void *opaque, hwaddr addr, uint64_t value, + unsigned size) +{ + handle_mmio_event(value); +} + +static const MemoryRegionOps pvpanic_mmio_ops = { + .read = pvpanic_mmio_read, + .write = pvpanic_mmio_write, + .impl = { + .min_access_size = 1, + .max_access_size = 2, + }, +}; + + +static void pvpanic_mmio_initfn(Object *obj) +{ + PVPanicState *s = PVPANIC_MMIO_DEVICE(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->mmio, OBJECT(s), &pvpanic_mmio_ops, s, + "pvpanic-mmio", 2); + sysbus_init_mmio(sbd, &s->mmio); +} + +static void pvpanic_mmio_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + set_bit(DEVICE_CATEGORY_MISC, dc->categories); +} + +static TypeInfo pvpanic_mmio_info = { + .name = TYPE_PVPANIC_MMIO, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(PVPanicState), + .instance_init = pvpanic_mmio_initfn, + .class_init = pvpanic_mmio_class_init, +}; + +static void pvpanic_mmio_register_types(void) +{ + type_register_static(&pvpanic_mmio_info); +} + +type_init(pvpanic_mmio_register_types) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 4cc57a7..61cc310 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -70,6 +70,7 @@ enum { VIRT_MMIO, VIRT_RTC, VIRT_FW_CFG, + VIRT_PVPANIC_MMIO, VIRT_PCIE, VIRT_PCIE_MMIO, VIRT_PCIE_PIO, diff --git a/include/hw/misc/pvpanic-mmio.h b/include/hw/misc/pvpanic-mmio.h new file mode 100644 index 0000000..2e6bec3 --- /dev/null +++ b/include/hw/misc/pvpanic-mmio.h @@ -0,0 +1,12 @@ +#ifndef HW_MISC_PVPANIC_H +#define HW_MISC_PVPANIC_H +#include "hw/sysbus.h" +#define TYPE_PVPANIC_MMIO "pvpanic-mmio" +#define PVPANIC_MMIO_DEVICE(obj) \ + OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC_MMIO) +#endif + +typedef struct PVPanicState { + SysBusDevice parent_obj; + MemoryRegion mmio; +} PVPanicState;