From patchwork Mon Jul 13 13:29:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 11659773 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 594C1618 for ; Mon, 13 Jul 2020 13:31:53 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3249C206F0 for ; Mon, 13 Jul 2020 13:31:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="N17hdafA"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="PrmHEa5F" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3249C206F0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=n3BwqASVJWWITaM0GWCa8ibxxEW0U/EDHPXNuF0vJIg=; b=N17hdafAbUs0vCy8buUVz0P7G COmhqRPHA9kx4qOhULg6XQFBxRoGyiMK4ua+GpjIVrvS9e1b6CaMqR7TLib/JSfay584gwSqnvZeW 2RLiHuPDCFWsf4+JWwWPbyisU9UtBV8aS4kxBjLWs5Sa8lk8tneeFJj4yYA2vH3vJNIT9/T+tGJRO ueApzY/w5M4q8LQ+TPIzIJfjq4veYMzQBw5IrshVgPmIW1GBVhmlywvMRS6A7vU3szDbRDRMfDi1E dCjOKcF3dDb9QIn8zGXynBJ/R9Y0M/Lghk2iNCi3jYvV/wy7VWuTNPN0FlMO/VPgjBy876Iif0haO 1LcBuejCA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1juyXH-0000At-Hf; Mon, 13 Jul 2020 13:30:23 +0000 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1juyWd-0008Il-Fk for linux-arm-kernel@lists.infradead.org; Mon, 13 Jul 2020 13:29:47 +0000 Received: by mail-wr1-x443.google.com with SMTP id z2so16570452wrp.2 for ; Mon, 13 Jul 2020 06:29:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ku9aM1vtf8T+FGw4lj5ZIPzjxBiChVO0/pPdJg2fBGw=; b=PrmHEa5FPW0LpbYElEyKRcYnhJi5XmlC36lx5TSUk0I4eKD5oBsz61WrgLwaHWBGIX Ut63kpeIUoPgm/Iugy6CdW2TIR25zGavB/guDK5USe1uzqHhQIzZmP4SybSuqPzcYscF EpwVxFYP4NgYDzzlW7/wtUOdb6KvFamYq/rsjAhy7Pv/QfGSzORPzVUZLWXXKh3oBHXM kmLBRJzeMfEs2EaHJlYuyMfD0K6LX8k2KCDF1nSPRFMgYE8kZN4eCxgtwF15LSmpbSGc lpjY8R1Mjpf7JpeZjWoq/AMQ4feht55IcICbLW8Zw9qNxbusSYWa6dd9BuiEWOSp9Q0t n3hA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ku9aM1vtf8T+FGw4lj5ZIPzjxBiChVO0/pPdJg2fBGw=; b=fEYTvjaxTStYwVgxGQMhzbzGdwPJfD7i+b1ncXpAOFkP7LpETAfF2UvPu4wLISC2z3 WLmMvAX5U4tg/irbbh52ItAtBofnH0gg2Sxjtvu5NwfGLrGUgaSItJFd5cP97j+E1Mr4 10kPTDdBVhNroYgoMksvY5dXbcjzBh31O4hw7zdjRIk5IgoVknD4jBgBblDzHNTqrWCZ 3NQc0bYNWMrFdTaPoTP7wv9pgEcp31n0FkRZBem0PzJW6w0l/HRgBrTyi4tHgm63/Ofq 4G4JGYDTg1PuzN+bfJoAWmwCIMVnnbnoPbCMv+/D023qo9347+fBEEKK9RU1yDiMhzej 2KgQ== X-Gm-Message-State: AOAM533V17AQqZUa8jODBBWp0Ushx+G7f3pfTZysU7ZRPEsFQLvFo8av kOk+eIfxXX12gcZ63BGvu7s9vw== X-Google-Smtp-Source: ABdhPJw27IwpFadhq+5bRv4bzXdsWZ8YmL639ivQFIAbVn7c+uDln0qheLOT9j1ytM6vhX/7UJNMeg== X-Received: by 2002:adf:de12:: with SMTP id b18mr85726204wrm.390.1594646980907; Mon, 13 Jul 2020 06:29:40 -0700 (PDT) Received: from linux.local (laubervilliers-658-1-213-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id j14sm23896642wrs.75.2020.07.13.06.29.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:29:40 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com Subject: [PATCH 1/6] dt bindings: remoteproc: Add bindings for MT8183 APU Date: Mon, 13 Jul 2020 15:29:22 +0200 Message-Id: <20200713132927.24925-2-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com> References: <20200713132927.24925-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_092943_619301_0A130ED3 X-CRM114-Status: GOOD ( 15.02 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:443 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds dt bindings for the APU present in the MT8183. Signed-off-by: Alexandre Bailon --- .../bindings/remoteproc/mtk,apu.yaml | 121 ++++++++++++++++++ 1 file changed, 121 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml new file mode 100644 index 000000000000..1d5fcc135617 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 + +--- +$id: "http://devicetree.org/schemas/remoteproc/mtk,apu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MT8183 Vision Processor Unit (VPU) devices + +description: + This document defines the binding for the APU, a co-processor that could + offload the CPU for machine learning and neural network. + +maintainers: + - Alexandre Bailon + +properties: + compatible: + const: mediatek,mt8183-apu + + reg: + description: + Address ranges of the APU MMIO. + maxItems: 1 + + interrupts: + description: + The interrupt number used to receive the interrupts from the DSP. + maxItems: 1 + + clocks: + description: + "Clocks for co-processor (See: ../clock/clock-bindings.txt) + Three clocks are expected for AXI, IPU and JTAG. + The JTAG clock seems to be required to run the DSP, + even when JTAG is not in use." + maxItems: 3 + clock-names: + description: + The name of clocks, must be ipu, axi and jtag + items: + - const: ipu + - const: axi + - const: jtag + + iommu: + description: "IOMMU (See: ../iommu/iommu.txt)" + maxItems: 3 + + memory-region: + description: "Reserved memory (See: ../reserved-memory/reserved-memory.txt)" + maxItems: 1 + + power-domains: + description: "Power domain (see: ../power/power_domain.txt)" + maxItems: 1 + + pinctrl: + description: pinctrl handles, required to configure pins for JTAG. + maxItems: 2 + + pinctrl-names: + description: + pinctrl name, must be "default", "jtag". + "default" must configure the pins when JTAG is disabled. + "jtag" must configure the pins for JTAG operations. + items: + - const: default + - const: jtag + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - iommu + - memory-region + - power-domains + +examples: + - | + #include + #include + #include + #include + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vpu_ram: vpu_ram@0x60000000 { + compatible = "shared-dma-pool"; + reg = <0 0x60000000 0 0x040000000>; + no-map; + linux,cma-default; + }; + }; + + vpu0: vpu@0x19100000 { + compatible = "mediatek,mt8183-apu"; + reg = <0 0x19180000 0 0x14000>; + reg-names = "mmio"; + interrupts = ; + + iommus = <&iommu M4U_PORT_IMG_IPUO>, + <&iommu M4U_PORT_IMG_IPU3O>, + <&iommu M4U_PORT_IMG_IPUI>; + + clocks = <&ipu_core0 CLK_IPU_CORE0_AXI>, + <&ipu_core0 CLK_IPU_CORE0_IPU>, + <&ipu_core0 CLK_IPU_CORE0_JTAG>; + + clock-names = "axi", "ipu", "jtag"; + + power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>; + memory-region = <&vpu_ram>; + }; +... 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id j14sm23896642wrs.75.2020.07.13.06.29.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:29:41 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com Subject: [PATCH 2/6] remoteproc: Add a remoteproc driver for the MT8183's APU Date: Mon, 13 Jul 2020 15:29:23 +0200 Message-Id: <20200713132927.24925-3-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com> References: <20200713132927.24925-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_092943_263090_D2B3D947 X-CRM114-Status: GOOD ( 22.72 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:442 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds a driver to control the APU present in the MT8183. This loads the firmware and start the DSP. Signed-off-by: Alexandre Bailon --- drivers/remoteproc/Kconfig | 10 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/mtk_apu_rproc.c | 308 +++++++++++++++++++++++++++++ 3 files changed, 319 insertions(+) create mode 100644 drivers/remoteproc/mtk_apu_rproc.c diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index c4d1731295eb..e116d4a12ac3 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -42,6 +42,16 @@ config MTK_SCP It's safe to say N here. +config MTK_APU + tristate "Mediatek APU remoteproc support" + depends on ARCH_MEDIATEK + depends on MTK_IOMMU + help + Say y to support the Mediatek's Accelerated Processing Unit (APU) via + the remote processor framework. + + It's safe to say N here. + config OMAP_REMOTEPROC tristate "OMAP remoteproc support" depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index e8b886e511f0..2ea231b75fa6 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -12,6 +12,7 @@ remoteproc-y += remoteproc_elf_loader.o obj-$(CONFIG_IMX_REMOTEPROC) += imx_rproc.o obj-$(CONFIG_INGENIC_VPU_RPROC) += ingenic_rproc.o obj-$(CONFIG_MTK_SCP) += mtk_scp.o mtk_scp_ipi.o +obj-$(CONFIG_MTK_APU) += mtk_apu_rproc.o obj-$(CONFIG_OMAP_REMOTEPROC) += omap_remoteproc.o obj-$(CONFIG_WKUP_M3_RPROC) += wkup_m3_rproc.o obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o diff --git a/drivers/remoteproc/mtk_apu_rproc.c b/drivers/remoteproc/mtk_apu_rproc.c new file mode 100644 index 000000000000..fb416a817ef3 --- /dev/null +++ b/drivers/remoteproc/mtk_apu_rproc.c @@ -0,0 +1,308 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 BayLibre SAS + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "remoteproc_internal.h" + +/* From MT8183 4.5 Vision Processor Unit (VPU).pdf datasheet */ +#define SW_RST (0x0000000C) +#define SW_RST_OCD_HALT_ON_RST BIT(12) +#define SW_RST_IPU_D_RST BIT(8) +#define SW_RST_IPU_B_RST BIT(4) +#define CORE_CTRL (0x00000110) +#define CORE_CTRL_PDEBUG_ENABLE BIT(31) +#define CORE_CTRL_SRAM_64K_iMEM (0x00 << 27) +#define CORE_CTRL_SRAM_96K_iMEM (0x01 << 27) +#define CORE_CTRL_SRAM_128K_iMEM (0x02 << 27) +#define CORE_CTRL_SRAM_192K_iMEM (0x03 << 27) +#define CORE_CTRL_SRAM_256K_iMEM (0x04 << 27) +#define CORE_CTRL_PBCLK_ENABLE BIT(26) +#define CORE_CTRL_RUN_STALL BIT(23) +#define CORE_CTRL_STATE_VECTOR_SELECT BIT(19) +#define CORE_CTRL_PIF_GATED BIT(17) +#define CORE_CTRL_NMI BIT(0) +#define CORE_XTENSA_INT (0x00000114) +#define CORE_CTL_XTENSA_INT (0x00000118) +#define CORE_DEFAULT0 (0x0000013C) +#define CORE_DEFAULT0_QOS_SWAP_0 (0x00 << 28) +#define CORE_DEFAULT0_QOS_SWAP_1 (0x01 << 28) +#define CORE_DEFAULT0_QOS_SWAP_2 (0x02 << 28) +#define CORE_DEFAULT0_QOS_SWAP_3 (0x03 << 28) +#define CORE_DEFAULT0_ARUSER_USE_IOMMU (0x10 << 23) +#define CORE_DEFAULT0_AWUSER_USE_IOMMU (0x10 << 18) +#define CORE_DEFAULT1 (0x00000140) +#define CORE_DEFAULT0_ARUSER_IDMA_USE_IOMMU (0x10 << 0) +#define CORE_DEFAULT0_AWUSER_IDMA_USE_IOMMU (0x10 << 5) +#define CORE_XTENSA_ALTRESETVEC (0x000001F8) + +struct mtk_vpu_rproc { + struct device *dev; + struct rproc *rproc; + + void __iomem *base; + int irq; + struct clk *axi; + struct clk *ipu; + struct clk *jtag; +}; + +static u32 vpu_read32(struct mtk_vpu_rproc *vpu_rproc, u32 off) +{ + return readl(vpu_rproc->base + off); +} + +static void vpu_write32(struct mtk_vpu_rproc *vpu_rproc, u32 off, u32 value) +{ + writel(value, vpu_rproc->base + off); +} + +static int mtk_vpu_rproc_start(struct rproc *rproc) +{ + struct mtk_vpu_rproc *vpu_rproc = rproc->priv; + u32 core_ctrl; + + vpu_write32(vpu_rproc, CORE_XTENSA_ALTRESETVEC, rproc->bootaddr); + + core_ctrl = vpu_read32(vpu_rproc, CORE_CTRL); + core_ctrl |= CORE_CTRL_PDEBUG_ENABLE | CORE_CTRL_PBCLK_ENABLE | + CORE_CTRL_STATE_VECTOR_SELECT | CORE_CTRL_RUN_STALL | + CORE_CTRL_PIF_GATED; + vpu_write32(vpu_rproc, CORE_CTRL, core_ctrl); + + vpu_write32(vpu_rproc, SW_RST, SW_RST_OCD_HALT_ON_RST | + SW_RST_IPU_B_RST | SW_RST_IPU_D_RST); + ndelay(27); + vpu_write32(vpu_rproc, SW_RST, 0); + + core_ctrl &= ~CORE_CTRL_PIF_GATED; + vpu_write32(vpu_rproc, CORE_CTRL, core_ctrl); + + vpu_write32(vpu_rproc, CORE_DEFAULT0, CORE_DEFAULT0_AWUSER_USE_IOMMU | + CORE_DEFAULT0_ARUSER_USE_IOMMU | + CORE_DEFAULT0_QOS_SWAP_1); + vpu_write32(vpu_rproc, CORE_DEFAULT1, + CORE_DEFAULT0_AWUSER_IDMA_USE_IOMMU | + CORE_DEFAULT0_ARUSER_IDMA_USE_IOMMU); + + core_ctrl &= ~CORE_CTRL_RUN_STALL; + vpu_write32(vpu_rproc, CORE_CTRL, core_ctrl); + + return 0; +} + +static int mtk_vpu_rproc_stop(struct rproc *rproc) +{ + struct mtk_vpu_rproc *vpu_rproc = rproc->priv; + u32 core_ctrl; + + core_ctrl = vpu_read32(vpu_rproc, CORE_CTRL); + vpu_write32(vpu_rproc, CORE_CTRL, core_ctrl | CORE_CTRL_RUN_STALL); + + return 0; +} + +static void mtk_vpu_rproc_kick(struct rproc *rproc, int vqid) +{ + struct mtk_vpu_rproc *vpu_rproc = rproc->priv; + + vpu_write32(vpu_rproc, CORE_CTL_XTENSA_INT, 1 << vqid); +} + +static const struct rproc_ops mtk_vpu_rproc_ops = { + .start = mtk_vpu_rproc_start, + .stop = mtk_vpu_rproc_stop, + .kick = mtk_vpu_rproc_kick, +}; + +static irqreturn_t mtk_vpu_rproc_callback(int irq, void *data) +{ + struct rproc *rproc = (struct rproc *)data; + struct mtk_vpu_rproc *vpu_rproc = (struct mtk_vpu_rproc *)rproc->priv; + + vpu_write32(vpu_rproc, CORE_XTENSA_INT, 1); + + return IRQ_WAKE_THREAD; +} + +static irqreturn_t handle_event(int irq, void *data) +{ + struct rproc *rproc = (struct rproc *)data; + + rproc_vq_interrupt(rproc, 0); + rproc_vq_interrupt(rproc, 1); + + return IRQ_HANDLED; +} + +static int mtk_vpu_rproc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mtk_vpu_rproc *vpu_rproc; + struct rproc *rproc; + struct resource *res; + int ret; + + rproc = rproc_alloc(dev, "apu", &mtk_vpu_rproc_ops, NULL, + sizeof(*vpu_rproc)); + if (!rproc) + return -ENOMEM; + + rproc->recovery_disabled = true; + rproc->has_iommu = false; + + vpu_rproc = rproc->priv; + vpu_rproc->rproc = rproc; + vpu_rproc->dev = dev; + + platform_set_drvdata(pdev, rproc); + + rproc->domain = iommu_get_domain_for_dev(dev); + if (!rproc->domain) { + dev_err(dev, "Failed to get the IOMMU domain\n"); + ret = -EINVAL; + goto free_rproc; + } + + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + vpu_rproc->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(vpu_rproc->base)) { + dev_err(&pdev->dev, "Failed to map mmio\n"); + ret = PTR_ERR(vpu_rproc->base); + goto free_rproc; + } + + vpu_rproc->irq = platform_get_irq(pdev, 0); + if (vpu_rproc->irq < 0) { + ret = vpu_rproc->irq; + goto free_rproc; + } + + ret = devm_request_threaded_irq(dev, vpu_rproc->irq, + mtk_vpu_rproc_callback, handle_event, + IRQF_SHARED | IRQF_ONESHOT, + "mtk_vpu-remoteproc", rproc); + if (ret) { + dev_err(dev, "devm_request_threaded_irq error: %d\n", ret); + goto free_rproc; + } + + vpu_rproc->ipu = devm_clk_get(dev, "ipu"); + if (IS_ERR(vpu_rproc->ipu)) { + dev_err(dev, "Failed to get ipu clock\n"); + ret = PTR_ERR(vpu_rproc->ipu); + goto free_rproc; + } + + ret = clk_prepare_enable(vpu_rproc->ipu); + if (ret) { + dev_err(dev, "Failed to enable ipu clock\n"); + goto free_rproc; + } + + vpu_rproc->axi = devm_clk_get(dev, "axi"); + if (IS_ERR(vpu_rproc->axi)) { + dev_err(dev, "Failed to get axi clock\n"); + ret = PTR_ERR(vpu_rproc->axi); + goto clk_disable_ipu; + } + + ret = clk_prepare_enable(vpu_rproc->axi); + if (ret) { + dev_err(dev, "Failed to enable axi clock\n"); + goto clk_disable_ipu; + } + + vpu_rproc->jtag = devm_clk_get_optional(dev, "jtag"); + if (IS_ERR(vpu_rproc->jtag)) { + dev_err(dev, "Failed to enable jtag clock\n"); + ret = PTR_ERR(vpu_rproc->jtag); + goto clk_disable_axi; + } + + ret = clk_prepare_enable(vpu_rproc->jtag); + if (ret) { + dev_err(dev, "Failed to enable jtag clock\n"); + goto clk_disable_axi; + } + + ret = of_reserved_mem_device_init(dev); + if (ret) { + dev_err(dev, "device does not have specific CMA pool\n"); + goto clk_disable_jtag; + } + + ret = rproc_add(rproc); + if (ret) { + dev_err(dev, "rproc_add failed: %d\n", ret); + goto free_mem; + } + + return 0; + +free_mem: + of_reserved_mem_device_release(dev); +clk_disable_jtag: + clk_disable_unprepare(vpu_rproc->jtag); +clk_disable_axi: + clk_disable_unprepare(vpu_rproc->axi); +clk_disable_ipu: + clk_disable_unprepare(vpu_rproc->ipu); +free_rproc: + rproc_free(rproc); + + return ret; +} + +static int mtk_vpu_rproc_remove(struct platform_device *pdev) +{ + struct rproc *rproc = platform_get_drvdata(pdev); + struct mtk_vpu_rproc *vpu_rproc = (struct mtk_vpu_rproc *)rproc->priv; + struct device *dev = &pdev->dev; + + disable_irq(vpu_rproc->irq); + + rproc_del(rproc); + of_reserved_mem_device_release(dev); + clk_disable_unprepare(vpu_rproc->jtag); + clk_disable_unprepare(vpu_rproc->axi); + clk_disable_unprepare(vpu_rproc->ipu); + rproc_free(rproc); + + return 0; +} + +static const struct of_device_id mtk_vpu_rproc_of_match[] __maybe_unused = { + { .compatible = "mediatek,mt8183-apu", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, mtk_vpu_rproc_of_match); + +static struct platform_driver mtk_vpu_rproc_driver = { + .probe = mtk_vpu_rproc_probe, + .remove = mtk_vpu_rproc_remove, + .driver = { + .name = "mtk_vpu-rproc", + .of_match_table = of_match_ptr(mtk_vpu_rproc_of_match), + }, +}; +module_platform_driver(mtk_vpu_rproc_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Alexandre Bailon"); +MODULE_DESCRIPTION("Mt8183 VPU Remote Processor control driver"); From patchwork Mon Jul 13 13:29:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 11659777 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4AAAF618 for ; Mon, 13 Jul 2020 13:32:10 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D47B206F0 for ; Mon, 13 Jul 2020 13:32:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="XoJmyqVk"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="a174UpCz" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1D47B206F0 Authentication-Results: mail.kernel.org; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id j14sm23896642wrs.75.2020.07.13.06.29.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:29:42 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com Subject: [PATCH 3/6] remoteproc: mtk_vpu_rproc: Add support of JTAG Date: Mon, 13 Jul 2020 15:29:24 +0200 Message-Id: <20200713132927.24925-4-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com> References: <20200713132927.24925-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_092944_522362_5C310D7D X-CRM114-Status: GOOD ( 21.95 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:443 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The DSP could be debugged using JTAG. The support of JTAG could enabled at build time and it could be enabled using debugfs. Signed-off-by: Alexandre Bailon --- drivers/remoteproc/Kconfig | 9 ++ drivers/remoteproc/mtk_apu_rproc.c | 156 ++++++++++++++++++++++++++++- 2 files changed, 162 insertions(+), 3 deletions(-) diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index e116d4a12ac3..e1158563e2e8 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -52,6 +52,15 @@ config MTK_APU It's safe to say N here. +config MTK_APU_JTAG + bool "Enable support of JTAG" + depends on MTK_APU + help + Say y to enable support of JTAG. + By default, JTAG will remain disabled until it is enabled using + debugfs: remoteproc/remoteproc0/jtag. Write 1 to enable it and + 0 to disable it. + config OMAP_REMOTEPROC tristate "OMAP remoteproc support" depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX diff --git a/drivers/remoteproc/mtk_apu_rproc.c b/drivers/remoteproc/mtk_apu_rproc.c index fb416a817ef3..f2342b747a35 100644 --- a/drivers/remoteproc/mtk_apu_rproc.c +++ b/drivers/remoteproc/mtk_apu_rproc.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -14,6 +15,7 @@ #include #include #include +#include #include #include @@ -48,6 +50,11 @@ #define CORE_DEFAULT1 (0x00000140) #define CORE_DEFAULT0_ARUSER_IDMA_USE_IOMMU (0x10 << 0) #define CORE_DEFAULT0_AWUSER_IDMA_USE_IOMMU (0x10 << 5) +#define CORE_DEFAULT2 (0x00000144) +#define CORE_DEFAULT2_DBG_EN BIT(3) +#define CORE_DEFAULT2_NIDEN BIT(2) +#define CORE_DEFAULT2_SPNIDEN BIT(1) +#define CORE_DEFAULT2_SPIDEN BIT(0) #define CORE_XTENSA_ALTRESETVEC (0x000001F8) struct mtk_vpu_rproc { @@ -59,6 +66,13 @@ struct mtk_vpu_rproc { struct clk *axi; struct clk *ipu; struct clk *jtag; + +#ifdef CONFIG_MTK_APU_JTAG + struct pinctrl *pinctrl; + struct pinctrl_state *pinctrl_default; + struct pinctrl_state *pinctrl_jtag; + bool jtag_enabled; +#endif }; static u32 vpu_read32(struct mtk_vpu_rproc *vpu_rproc, u32 off) @@ -149,6 +163,133 @@ static irqreturn_t handle_event(int irq, void *data) return IRQ_HANDLED; } +#ifdef CONFIG_MTK_APU_JTAG + +static int vpu_enable_jtag(struct mtk_vpu_rproc *vpu_rproc) +{ + int ret = 0; + + if (vpu_rproc->jtag_enabled) + return -EINVAL; + + ret = pinctrl_select_state(vpu_rproc->pinctrl, + vpu_rproc->pinctrl_jtag); + if (ret < 0) { + dev_err(vpu_rproc->dev, "Failed to configure pins for JTAG\n"); + return ret; + } + + vpu_write32(vpu_rproc, CORE_DEFAULT2, + CORE_DEFAULT2_SPNIDEN | CORE_DEFAULT2_SPIDEN | + CORE_DEFAULT2_NIDEN | CORE_DEFAULT2_DBG_EN); + + vpu_rproc->jtag_enabled = 1; + + return ret; +} + +static int vpu_disable_jtag(struct mtk_vpu_rproc *vpu_rproc) +{ + int ret = 0; + + if (!vpu_rproc->jtag_enabled) + return -EINVAL; + + vpu_write32(vpu_rproc, CORE_DEFAULT2, 0); + + ret = pinctrl_select_state(vpu_rproc->pinctrl, + vpu_rproc->pinctrl_default); + if (ret < 0) { + dev_err(vpu_rproc->dev, + "Failed to configure pins to default\n"); + return ret; + } + + vpu_rproc->jtag_enabled = 0; + + return ret; +} + +static ssize_t rproc_jtag_read(struct file *filp, char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct rproc *rproc = filp->private_data; + struct mtk_vpu_rproc *vpu_rproc = (struct mtk_vpu_rproc *)rproc->priv; + char *buf = vpu_rproc->jtag_enabled ? "enabled\n" : "disabled\n"; + + return simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf)); +} + +static ssize_t rproc_jtag_write(struct file *filp, const char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct rproc *rproc = filp->private_data; + struct mtk_vpu_rproc *vpu_rproc = (struct mtk_vpu_rproc *)rproc->priv; + char buf[10]; + int ret; + + if (count < 1 || count > sizeof(buf)) + return -EINVAL; + + ret = copy_from_user(buf, user_buf, count); + if (ret) + return -EFAULT; + + /* remove end of line */ + if (buf[count - 1] == '\n') + buf[count - 1] = '\0'; + + if (!strncmp(buf, "1", count) || !strncmp(buf, "enabled", count)) + ret = vpu_enable_jtag(vpu_rproc); + else if (!strncmp(buf, "0", count) || !strncmp(buf, "disabled", count)) + ret = vpu_disable_jtag(vpu_rproc); + else + return -EINVAL; + + return ret ? ret : count; +} + +static const struct file_operations rproc_jtag_ops = { + .read = rproc_jtag_read, + .write = rproc_jtag_write, + .open = simple_open, +}; + +static int vpu_jtag_probe(struct mtk_vpu_rproc *vpu_rproc) +{ + int ret; + + if (!vpu_rproc->rproc->dbg_dir) + return -ENODEV; + + vpu_rproc->pinctrl = devm_pinctrl_get(vpu_rproc->dev); + if (IS_ERR(vpu_rproc->pinctrl)) { + dev_warn(vpu_rproc->dev, "Failed to find JTAG pinctrl\n"); + return PTR_ERR(vpu_rproc->pinctrl); + } + + vpu_rproc->pinctrl_default = pinctrl_lookup_state(vpu_rproc->pinctrl, + PINCTRL_STATE_DEFAULT); + if (IS_ERR(vpu_rproc->pinctrl_default)) + return PTR_ERR(vpu_rproc->pinctrl_default); + + vpu_rproc->pinctrl_jtag = pinctrl_lookup_state(vpu_rproc->pinctrl, + "jtag"); + if (IS_ERR(vpu_rproc->pinctrl_jtag)) + return PTR_ERR(vpu_rproc->pinctrl_jtag); + + ret = pinctrl_select_state(vpu_rproc->pinctrl, + vpu_rproc->pinctrl_default); + if (ret < 0) + return ret; + + debugfs_create_file("jtag", 0600, vpu_rproc->rproc->dbg_dir, + vpu_rproc->rproc, &rproc_jtag_ops); + + return 0; +} +#endif /* CONFIG_MTK_APU_JTAG */ + static int mtk_vpu_rproc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -228,16 +369,16 @@ static int mtk_vpu_rproc_probe(struct platform_device *pdev) goto clk_disable_ipu; } - vpu_rproc->jtag = devm_clk_get_optional(dev, "jtag"); + vpu_rproc->jtag = devm_clk_get(vpu_rproc->dev, "jtag"); if (IS_ERR(vpu_rproc->jtag)) { - dev_err(dev, "Failed to enable jtag clock\n"); + dev_err(vpu_rproc->dev, "Failed to get jtag clock\n"); ret = PTR_ERR(vpu_rproc->jtag); goto clk_disable_axi; } ret = clk_prepare_enable(vpu_rproc->jtag); if (ret) { - dev_err(dev, "Failed to enable jtag clock\n"); + dev_err(vpu_rproc->dev, "Failed to enable jtag clock\n"); goto clk_disable_axi; } @@ -253,6 +394,12 @@ static int mtk_vpu_rproc_probe(struct platform_device *pdev) goto free_mem; } +#ifdef CONFIG_MTK_APU_JTAG + ret = vpu_jtag_probe(vpu_rproc); + if (ret) + dev_warn(dev, "Failed to configure jtag\n"); +#endif + return 0; free_mem: @@ -277,6 +424,9 @@ static int mtk_vpu_rproc_remove(struct platform_device *pdev) disable_irq(vpu_rproc->irq); +#ifdef CONFIG_MTK_APU_JTAG + vpu_disable_jtag(vpu_rproc); +#endif rproc_del(rproc); of_reserved_mem_device_release(dev); clk_disable_unprepare(vpu_rproc->jtag); From patchwork Mon Jul 13 13:29:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 11659775 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B2B22618 for ; Mon, 13 Jul 2020 13:32:07 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8B1F0206F0 for ; Mon, 13 Jul 2020 13:32:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="V+S0psXY"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="j0V0viTo" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8B1F0206F0 Authentication-Results: mail.kernel.org; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id j14sm23896642wrs.75.2020.07.13.06.29.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:29:43 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com Subject: [PATCH 4/6] remoteproc: mtk_vpu_rproc: Don't try to load empty PT_LOAD segment Date: Mon, 13 Jul 2020 15:29:25 +0200 Message-Id: <20200713132927.24925-5-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com> References: <20200713132927.24925-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_092945_523043_AE095354 X-CRM114-Status: GOOD ( 14.53 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:443 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The firmware generated by our toolchain contains many empty PT_LOAD segments. The elf loader don't manage it and will raise an error: "bad phdr da 0x0 mem 0x0". To workaround it, implement the sanity_check callback to detect the empty PT_LOAD segment and change it to PT_NULL. In that way, the elf load won't try to load the segment. Signed-off-by: Alexandre Bailon Reviewed-by: Mathieu Poirier --- drivers/remoteproc/mtk_apu_rproc.c | 35 +++++++++++++++++++++++++++--- 1 file changed, 32 insertions(+), 3 deletions(-) diff --git a/drivers/remoteproc/mtk_apu_rproc.c b/drivers/remoteproc/mtk_apu_rproc.c index f2342b747a35..565b3adca5de 100644 --- a/drivers/remoteproc/mtk_apu_rproc.c +++ b/drivers/remoteproc/mtk_apu_rproc.c @@ -137,10 +137,39 @@ static void mtk_vpu_rproc_kick(struct rproc *rproc, int vqid) vpu_write32(vpu_rproc, CORE_CTL_XTENSA_INT, 1 << vqid); } +int mtk_vpu_elf_sanity_check(struct rproc *rproc, const struct firmware *fw) +{ + const u8 *elf_data = fw->data; + struct elf32_hdr *ehdr; + struct elf32_phdr *phdr; + int ret; + int i; + + ret = rproc_elf_sanity_check(rproc, fw); + if (ret) + return ret; + + ehdr = (struct elf32_hdr *)elf_data; + phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff); + + for (i = 0; i < ehdr->e_phnum; i++, phdr++) { + /* Remove empty PT_LOAD section */ + if (phdr->p_type == PT_LOAD && !phdr->p_paddr) + phdr->p_type = PT_NULL; + } + + return 0; +} + static const struct rproc_ops mtk_vpu_rproc_ops = { - .start = mtk_vpu_rproc_start, - .stop = mtk_vpu_rproc_stop, - .kick = mtk_vpu_rproc_kick, + .start = mtk_vpu_rproc_start, + .stop = mtk_vpu_rproc_stop, + .kick = mtk_vpu_rproc_kick, + .load = rproc_elf_load_segments, + .parse_fw = rproc_elf_load_rsc_table, + .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table, + .sanity_check = mtk_vpu_elf_sanity_check, + .get_boot_addr = rproc_elf_get_boot_addr, }; static irqreturn_t mtk_vpu_rproc_callback(int irq, void *data) From patchwork Mon Jul 13 13:29:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 11659779 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF224618 for ; Mon, 13 Jul 2020 13:32:15 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7EF5A206F0 for ; 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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id j14sm23896642wrs.75.2020.07.13.06.29.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:29:45 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com Subject: [PATCH 5/6] remoteproc: mtk_apu: Don't try to use the APU local RAM Date: Mon, 13 Jul 2020 15:29:26 +0200 Message-Id: <20200713132927.24925-6-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com> References: <20200713132927.24925-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_092946_759118_FE03A5DF X-CRM114-Status: GOOD ( 15.68 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:342 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Currently, this local RAM is not accessible from the CPU. If the CPU tries to access it, then the CPU will hang. Remoteproc may try to use it when it load a firmware that has some sections in the local RAM. This workarounds the issue by skiping this section. Signed-off-by: Alexandre Bailon --- drivers/remoteproc/mtk_apu_rproc.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/remoteproc/mtk_apu_rproc.c b/drivers/remoteproc/mtk_apu_rproc.c index 565b3adca5de..e16d3258a785 100644 --- a/drivers/remoteproc/mtk_apu_rproc.c +++ b/drivers/remoteproc/mtk_apu_rproc.c @@ -57,6 +57,9 @@ #define CORE_DEFAULT2_SPIDEN BIT(0) #define CORE_XTENSA_ALTRESETVEC (0x000001F8) +#define DRAM0_START (0x7ff00000) +#define IRAM0_END (0x7ff80000) + struct mtk_vpu_rproc { struct device *dev; struct rproc *rproc; @@ -139,6 +142,7 @@ static void mtk_vpu_rproc_kick(struct rproc *rproc, int vqid) int mtk_vpu_elf_sanity_check(struct rproc *rproc, const struct firmware *fw) { + struct mtk_vpu_rproc *vpu_rproc = rproc->priv; const u8 *elf_data = fw->data; struct elf32_hdr *ehdr; struct elf32_phdr *phdr; @@ -156,6 +160,16 @@ int mtk_vpu_elf_sanity_check(struct rproc *rproc, const struct firmware *fw) /* Remove empty PT_LOAD section */ if (phdr->p_type == PT_LOAD && !phdr->p_paddr) phdr->p_type = PT_NULL; + /* + * Workaround: Currently, the CPU can't access to the APU + * local RAM. This removes the local RAM section from the + * firmware. Please note that may cause some issues. + */ + if (phdr->p_paddr >= DRAM0_START && phdr->p_paddr < IRAM0_END) { + dev_warn_once(vpu_rproc->dev, + "Skipping the APU local RAM section\n"); + phdr->p_type = PT_NULL; + } } return 0; From patchwork Mon Jul 13 13:29:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 11659781 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 74801618 for ; Mon, 13 Jul 2020 13:32:30 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4CAA6206F0 for ; Mon, 13 Jul 2020 13:32:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ByJ7/B0D"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="Mm7n4KSQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4CAA6206F0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=4og23BpjN03FDlY7dbRex9IrEZZpZ9rE3qbOniM5rwE=; b=ByJ7/B0DvMzpdPJA1ZlyJZDMo X/3F7IJh8fT09b7wDA8ftID4t4XFt7mqvSdCE8CdvGnQ7AZuLbgHNzVrAqf4QmYvjnWPIALZxp9xR rBDBG5M3Jn5fH/8yjZNTADWij8EvXiZze9rdQvKkhbzb8iAU3VUNpQ06XOuOsI2pQsk+XqXE1CUxh wbXwBA7mCc4qFAyF2fNz+g+RqBgaxcjk+oBd3kE4jovxiEBaWTL86gs/x8tUJqtzYaHx2T2ABBFjH 88fa1CA13M6M+kHvzYPQCLF1hVHmP3epPDLvDmXeVJ46FEnFrLW+lGoHShcCOT8EHJ3ukk3e1OzD8 IIEYYly5g==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1juyXn-0000Zc-2z; Mon, 13 Jul 2020 13:30:55 +0000 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1juyWj-0008Ni-0Y for linux-arm-kernel@lists.infradead.org; Mon, 13 Jul 2020 13:29:56 +0000 Received: by mail-wr1-x441.google.com with SMTP id j4so16547924wrp.10 for ; Mon, 13 Jul 2020 06:29:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1L4Fd0ydGXB1tLJq49wHyxg/8oVp3tIdrwadCHK6MBc=; b=Mm7n4KSQrzuIzL5V5oAkygyQJZK8zxZPRPWSKVqHAT9JGioQsWMBEhYVvUKCdvZ5qk nLEktNB+4PQs+YC1AYQ40rQPY1h/mssBV76kXxTD9eS2QLXV4HhBsMuTNBI1KaNCq3nH ElPJHUjYX36UTba60MYN5rdXsYfuPYcBEzH5Zw+374d1AZ5YlG0ZqAawK1AgYum1b4e1 XwIfBVLmSLzPzyGRur2HJh8m9v4Ri3z1GoUxesRy0e73/rvpIXw7LyWY/N8mif+ZuscX ypm/lS84F5l4VhYEeo49NcBQJ2dealR6xBuOF3ezU1P1edoaMRebYsEhc6eJldWcsEdS Kdbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1L4Fd0ydGXB1tLJq49wHyxg/8oVp3tIdrwadCHK6MBc=; b=A/xKwnD6rk/AUqtbbAFwp1JG6j/PZFo1ffNE4D1vKQ9vniayvidfhORA2y+6nSHj/x 4/AJqRpgVJ8SqGof5oZJ/df3xCrmu3Vyka8FuqCvo2nSsxqlNmjlyh5aF82BduxwzVSM ahpT9Q2FEE2zXH/2i9La6hHskwGRsee/PvENlPY7LSLbk03xNs/HdeB+J+jUdZTo8Iwy idvtNeK4E0KXeB94DBpcH3zyGq+JIKf20wvBIKGbt6S4IrOYMBo6c+hzweFEQgyNo805 AMxcm6RP65oXiWDhGxF2e0MMldwGE5/gYS3paa0sll3Th4hnlElIl0vUEvWfNwrWgi0h KsaA== X-Gm-Message-State: AOAM531IKSXeLN22he4+uQmwgqEOAMNG/mAKyKj8TAzZDs1kNCFO1nrF 2aAXlA3MilhQYTYy2XnbGmL5dw== X-Google-Smtp-Source: ABdhPJwzZlcUKbMf7yvv/ipKPBNj0GCeAedKQcrzHWzFJjvtRWFrPMYVOGGBdMWDjOPRwHglztjNig== X-Received: by 2002:adf:e90d:: with SMTP id f13mr75056890wrm.146.1594646986821; Mon, 13 Jul 2020 06:29:46 -0700 (PDT) Received: from linux.local (laubervilliers-658-1-213-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id j14sm23896642wrs.75.2020.07.13.06.29.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 06:29:46 -0700 (PDT) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, matthias.bgg@gmail.com Subject: [PATCH 6/6] ARM64: mt8183: Add support of APU to mt8183 Date: Mon, 13 Jul 2020 15:29:27 +0200 Message-Id: <20200713132927.24925-7-abailon@baylibre.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200713132927.24925-1-abailon@baylibre.com> References: <20200713132927.24925-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_092949_284221_2805FEFC X-CRM114-Status: GOOD ( 10.35 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:441 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Bailon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds the support of APU to mt8183. Signed-off-by: Alexandre Bailon Reported-by: kernel test robot --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 42 ++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 1e03c849dc5d..6a2e9ee0b566 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -720,12 +720,54 @@ ipu_adl: syscon@19010000 { #clock-cells = <1>; }; + vpu0: vpu@0x19100000 { + compatible = "mediatek,mt8183-apu"; + reg = <0 0x19180000 0 0x14000>; + reg-names = "mmio"; + interrupts = ; + + iommus = <&iommu M4U_PORT_IMG_IPUO>, + <&iommu M4U_PORT_IMG_IPU3O>, + <&iommu M4U_PORT_IMG_IPUI>; + + clocks = <&ipu_core0 CLK_IPU_CORE0_AXI>, + <&ipu_core0 CLK_IPU_CORE0_IPU>, + <&ipu_core0 CLK_IPU_CORE0_JTAG>; + + clock-names = "axi", "ipu", "jtag"; + + power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>; + memory-region = <&vpu_ram>; + }; + ipu_core0: syscon@19180000 { compatible = "mediatek,mt8183-ipu_core0", "syscon"; reg = <0 0x19180000 0 0x1000>; #clock-cells = <1>; }; + vpu1: vpu@0x19200000 { + compatible = "mediatek,mt8183-apu"; + reg = <0 0x19280000 0 0x14000>; + reg-names = "mmio"; + interrupts = ; + + iommus = <&iommu M4U_PORT_IMG_IPUO>, + <&iommu M4U_PORT_IMG_IPU2O>, + <&iommu M4U_PORT_IMG_IPU3O>, + <&iommu M4U_PORT_IMG_IPUI>, + <&iommu M4U_PORT_IMG_IPU2I>; + + clocks = <&ipu_core0 CLK_IPU_CORE1_AXI>, + <&ipu_core0 CLK_IPU_CORE1_IPU>, + <&ipu_core0 CLK_IPU_CORE1_JTAG>; + + clock-names = "axi", "ipu", "jtag"; + + power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE1>; + memory-region = <&vpu_ram>; + }; + ipu_core1: syscon@19280000 { compatible = "mediatek,mt8183-ipu_core1", "syscon"; reg = <0 0x19280000 0 0x1000>;