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Wed, 17 Oct 2018 12:37:52 +0000 From: Leonard Crestez To: Shawn Guo , Fabio Estevam Subject: [PATCH v4 1/4] dt-bindings: crypto: Mention clocks for mxs-dcp Thread-Topic: [PATCH v4 1/4] dt-bindings: crypto: Mention clocks for mxs-dcp Thread-Index: AQHUZhY4IVTqhgCkI0qTk0dC2eDS/Q== Date: Wed, 17 Oct 2018 12:37:51 +0000 Message-ID: <4536b5b5b101ab6a4197fb4891f775ddeb519847.1539779579.git.leonard.crestez@nxp.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [95.76.156.53] x-mailer: git-send-email 2.17.1 x-clientproxiedby: AM6P191CA0098.EURP191.PROD.OUTLOOK.COM (2603:10a6:209:8a::39) To AM0PR04MB4290.eurprd04.prod.outlook.com (2603:10a6:208:67::17) x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; AM0PR04MB4212; 6:pptVK0R7Foh92pURpOZYTcFrIwePjpk/peg0+vpY8OxWeHW3Q+MhkJ8ArKYRiA6U1vMQfNos4vJwARlp2GnVRwt1WZoOogkvLvaupYdQXuEepbT4T/gFrJ54erNxenqZNIzk10n7qruiluddcBQv1FiHQEsURo4kYpbkHghcZu696UMSAllSQW2zdW1AcvIZK1EQd8Cp4mRF3gZfImFTJaPQ666R8D//Bp6WHUEBLWsBFyZ/B67McAW0/7CdNzT7hj754D9gukRHuiqEOJt0himy8mn8h8mSrLKQTAygulrkYAQ3xvbkSG2nOUNcP67lojlJf0/LxGvtDKuBsJihwjDvjylX1JquWEDYMq3yhGvEpfUFqqvStuZ5Y8FOWJZkeF2VGx/R4g1r2FoAKtF31WfIr0Rj6TE1y0vHrsCa5U+sZ1g3w3RC95qYr2kqsfpEPVf6kJRIKa0MZD+Mn86ubA==; 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Miller " , "linux-arm-kernel@lists.infradead.org" , dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Explicit clock enabling is required on 6sll and 6ull so mention that standard clock bindings are used. Signed-off-by: Leonard Crestez Reviewed-by: Fabio Estevam Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/crypto/fsl-dcp.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt index 76a0b4e80e83..4e4d387e38a5 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt @@ -4,10 +4,12 @@ Required properties: - compatible : Should be "fsl,-dcp" - reg : Should contain MXS DCP registers location and length - interrupts : Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ must be supplied, optionally Secure IRQ can be present, but is currently not implemented and not used. +- clocks : Clock reference (only required on some SOCs: 6ull and 6sll). +- clock-names : Must be "dcp". Example: dcp@80028000 { compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; From patchwork Wed Oct 17 12:37:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10645449 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 892A417D4 for ; Wed, 17 Oct 2018 12:42:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 803622AF90 for ; Wed, 17 Oct 2018 12:42:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 71BA02AF9F; Wed, 17 Oct 2018 12:42:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CAB5B2AF90 for ; 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Wed, 17 Oct 2018 12:37:53 +0000 From: Leonard Crestez To: Shawn Guo , Fabio Estevam Subject: [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk Thread-Topic: [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk Thread-Index: AQHUZhY4HefM3c9m50qn78KSFJ8+NA== Date: Wed, 17 Oct 2018 12:37:53 +0000 Message-ID: <95dce7010676581691b1ac9906e9298470e0aa1a.1539779579.git.leonard.crestez@nxp.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [95.76.156.53] x-mailer: git-send-email 2.17.1 x-clientproxiedby: AM6P191CA0098.EURP191.PROD.OUTLOOK.COM (2603:10a6:209:8a::39) To AM0PR04MB4290.eurprd04.prod.outlook.com (2603:10a6:208:67::17) x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; AM0PR04MB4212; 6:4L5EVe8HIPMLs3VxJ3B0lWCzLUev1du1VX+6/eNjxqhoiBShYoq1C2KLC4ImoAJfcqA74lldlioFfTaQVGYVLUL4oo32r2JMYDtKIezmqb7GgIsZdZxzmqQuKKtqIsqL+Kme96sUQhKy15bmQ29C7d0JfvWOkvHgqBphG5Az1JzXNyehmAiJ3PAKfqfu3FctJpsOTNTqbW8LtlFOCU1wPPQ8mU4Ghaz5mTeH5b/9obqXuKunEpe6kfzqVx/ty9Zhhh2PSQAfHZdmQzpXJ3NRFGm+AHCQs+j8SW79Vsrxqgmle5tQHBa+ERhPXBoKtQZXzxWZopERmjZizW+vr57PsKdZuXu1pBnzHLczh7yQpqAmbk/5/k2juqOFOASFHdIHiyO0poaGlRehL0qSLQlCk2Sx6U+UWvd2ak4HYub8V5GgnUV9PLfT3TnyGp+n3l4h1Y5My03xm5EXiJERhcx1Vg==; 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Miller " , "linux-arm-kernel@lists.infradead.org" , dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On 6ull and 6sll the DCP block has a clock which needs to be explicitly enabled. Add minimal handling for this at probe/remove time. Signed-off-by: Leonard Crestez Reviewed-by: Fabio Estevam --- drivers/crypto/mxs-dcp.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c index 4e6ff32f8a7e..a2105cf33abb 100644 --- a/drivers/crypto/mxs-dcp.c +++ b/drivers/crypto/mxs-dcp.c @@ -18,10 +18,11 @@ #include #include #include #include #include +#include #include #include #include #include @@ -80,10 +81,11 @@ struct dcp { struct completion completion[DCP_MAX_CHANS]; spinlock_t lock[DCP_MAX_CHANS]; struct task_struct *thread[DCP_MAX_CHANS]; struct crypto_queue queue[DCP_MAX_CHANS]; + struct clk *dcp_clk; }; enum dcp_chan { DCP_CHAN_HASH_SHA = 0, DCP_CHAN_CRYPTO = 2, @@ -1051,15 +1053,28 @@ static int mxs_dcp_probe(struct platform_device *pdev) return -ENOMEM; /* Re-align the structure so it fits the DCP constraints. */ sdcp->coh = PTR_ALIGN(sdcp->coh, DCP_ALIGNMENT); - /* Restart the DCP block. */ - ret = stmp_reset_block(sdcp->base); + /* DCP clock is optional, only used on some SOCs */ + sdcp->dcp_clk = devm_clk_get(dev, "dcp"); + if (IS_ERR(sdcp->dcp_clk)) { + if (sdcp->dcp_clk != ERR_PTR(-ENOENT)) + return PTR_ERR(sdcp->dcp_clk); + sdcp->dcp_clk = NULL; + } + ret = clk_prepare_enable(sdcp->dcp_clk); if (ret) return ret; + /* Restart the DCP block. */ + ret = stmp_reset_block(sdcp->base); + if (ret) { + dev_err(dev, "Failed reset\n"); + goto err_disable_unprepare_clk; + } + /* Initialize control register. */ writel(MXS_DCP_CTRL_GATHER_RESIDUAL_WRITES | MXS_DCP_CTRL_ENABLE_CONTEXT_CACHING | 0xf, sdcp->base + MXS_DCP_CTRL); @@ -1092,11 +1107,12 @@ static int mxs_dcp_probe(struct platform_device *pdev) /* Create the SHA and AES handler threads. */ sdcp->thread[DCP_CHAN_HASH_SHA] = kthread_run(dcp_chan_thread_sha, NULL, "mxs_dcp_chan/sha"); if (IS_ERR(sdcp->thread[DCP_CHAN_HASH_SHA])) { dev_err(dev, "Error starting SHA thread!\n"); - return PTR_ERR(sdcp->thread[DCP_CHAN_HASH_SHA]); + ret = PTR_ERR(sdcp->thread[DCP_CHAN_HASH_SHA]); + goto err_disable_unprepare_clk; } sdcp->thread[DCP_CHAN_CRYPTO] = kthread_run(dcp_chan_thread_aes, NULL, "mxs_dcp_chan/aes"); if (IS_ERR(sdcp->thread[DCP_CHAN_CRYPTO])) { @@ -1149,10 +1165,14 @@ static int mxs_dcp_probe(struct platform_device *pdev) err_destroy_aes_thread: kthread_stop(sdcp->thread[DCP_CHAN_CRYPTO]); err_destroy_sha_thread: kthread_stop(sdcp->thread[DCP_CHAN_HASH_SHA]); + +err_disable_unprepare_clk: + clk_disable_unprepare(sdcp->dcp_clk); + return ret; } static int mxs_dcp_remove(struct platform_device *pdev) { @@ -1168,10 +1188,12 @@ static int mxs_dcp_remove(struct platform_device *pdev) crypto_unregister_algs(dcp_aes_algs, ARRAY_SIZE(dcp_aes_algs)); kthread_stop(sdcp->thread[DCP_CHAN_HASH_SHA]); kthread_stop(sdcp->thread[DCP_CHAN_CRYPTO]); + clk_disable_unprepare(sdcp->dcp_clk); + platform_set_drvdata(pdev, NULL); global_sdcp = NULL; return 0; From patchwork Wed Oct 17 12:37:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10645435 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7AF5112B for ; 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Miller " , "linux-arm-kernel@lists.infradead.org" , dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The DCP block on 6ull has no major differences other than requiring explicit clock enabling. Signed-off-by: Leonard Crestez Reviewed-by: Fabio Estevam --- arch/arm/boot/dts/imx6ull.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index 796ed35d4ac9..f3668fe69eac 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -37,10 +37,20 @@ #address-cells = <1>; #size-cells = <1>; reg = <0x02200000 0x100000>; ranges; + dcp: crypto@2280000 { + compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp"; + reg = <0x02280000 0x4000>; + interrupts = , + , + ; + clocks = <&clks IMX6ULL_CLK_DCP_CLK>; + clock-names = "dcp"; + }; + iomuxc_snvs: iomuxc-snvs@2290000 { compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; From patchwork Wed Oct 17 12:37:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10645445 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5915A15E2 for ; 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Miller " , "linux-arm-kernel@lists.infradead.org" , dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This block is present in 6sl, 6sll and 6ull so it should be enabled in the default imx kernel config. Signed-off-by: Leonard Crestez Reviewed-by: Fabio Estevam --- arch/arm/configs/imx_v6_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 1ad5736c8fa6..57928dff9bce 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -428,10 +428,11 @@ CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_15=m CONFIG_NLS_UTF8=y CONFIG_SECURITYFS=y CONFIG_CRYPTO_DEV_FSL_CAAM=y CONFIG_CRYPTO_DEV_SAHARA=y +CONFIG_CRYPTO_DEV_MXS_DCP=y CONFIG_CRC_CCITT=m CONFIG_CRC_T10DIF=y CONFIG_CRC7=m CONFIG_LIBCRC32C=m CONFIG_FONTS=y