From patchwork Thu Jul 16 21:58:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668499 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9908560D for ; Thu, 16 Jul 2020 21:58:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7AA97207E8 for ; Thu, 16 Jul 2020 21:58:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="Omr4gQqN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726550AbgGPV6j (ORCPT ); Thu, 16 Jul 2020 17:58:39 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:45384 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726007AbgGPV6j (ORCPT ); Thu, 16 Jul 2020 17:58:39 -0400 Received: from mailhost.synopsys.com (sv2-mailhost2.synopsys.com [10.205.2.134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 538CCC0446; Thu, 16 Jul 2020 21:58:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936718; bh=dnHNiYs8zH+83BgaxZg3b1MKrwJcrshVY5E2h79a9ng=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=Omr4gQqNalA0UpROew8T2m9ED9rC/s+jXiGIbdHHB4dGuD+GPXPZroZzt8fPmo/oi zpdLOseybQorwCbQw+7bbxv0GgNSIl9AW1AE7OJybrBdsfjdy4SgPh32nn/gw0lgrG 2WLayr+62Osd3x72Tnt+y/+XmO2F7k1eY8ak/c+lTjT/l4Hc7AJwwTa/cBzfSSyptS FQuAwHSvYQYaSdX3Q4vUv6X+9GWgAb2TPy9A3KoYpxBs41p1spVluYjag3OzG8/1Br qF2gvepx3i5/Us1Q/5qRaM65oVkO/NGqrwgtrkgZ5FGYvTnQaAPCaqtaa8dP0gqj4E w6A/XoDEXonVg== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 908D2A00A9; Thu, 16 Jul 2020 21:58:36 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:58:36 -0700 Date: Thu, 16 Jul 2020 14:58:36 -0700 Message-Id: <90961eec3e1ed3c27e41e7169353cc295c551604.1594935978.git.thinhn@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 01/11] usb: ch9: Add sublink speed struct To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org USB 3.2 specification supports dual-lane for super-speed-plus. USB devices may operate at different sublink speeds. To avoid using magic numbers and capture the sublink speed better, introduce the usb_sublink_speed structure and various sublink speed attribute enum. See SSP BOS descriptor in USB 3.2 specification section 9.6.2.5 Signed-off-by: Thinh Nguyen Reported-by: kernel test robot Reported-by: kernel test robot --- include/uapi/linux/usb/ch9.h | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/include/uapi/linux/usb/ch9.h b/include/uapi/linux/usb/ch9.h index 2b623f36af6b..d4fd403a3664 100644 --- a/include/uapi/linux/usb/ch9.h +++ b/include/uapi/linux/usb/ch9.h @@ -1145,6 +1145,48 @@ enum usb_device_speed { USB_SPEED_SUPER_PLUS, /* usb 3.1 */ }; +/* USB 3.2 sublink speed attributes */ + +enum usb_lane_speed_exponent { + USB_LSE_BPS = 0, + USB_LSE_KBPS = 1, + USB_LSE_MBPS = 2, + USB_LSE_GBPS = 3, +}; + +enum usb_sublink_type { + USB_ST_SYMMETRIC_RX = 0, + USB_ST_ASYMMETRIC_RX = 1, + USB_ST_SYMMETRIC_TX = 2, + USB_ST_ASYMMETRIC_TX = 3, +}; + +enum usb_link_protocol { + USB_LP_SS = 0, + USB_LP_SSP = 1, +}; + +/** + * struct usb_sublink_speed - sublink speed attribute + * @id: sublink speed attribute ID (SSID) + * @mantissa: lane speed mantissa + * @exponent: lane speed exponent + * @sublink type: sublink type + * @protocol: sublink protocol + * + * Super-speed-plus supports multiple lanes. Use the sublink speed attributes to + * describe the sublink speed. + * + * See USB 3.2 spec section 9.6.2.6 for super-speed-plus capability for more + * information. + */ +struct usb_sublink_speed { + u8 id; + u16 mantissa; + enum usb_lane_speed_exponent exponent; + enum usb_sublink_type type; + enum usb_link_protocol protocol; +}; enum usb_device_state { /* NOTATTACHED isn't in the USB spec, and this state acts From patchwork Thu Jul 16 21:58:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668501 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2E77360D for ; Thu, 16 Jul 2020 21:58:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1196C207E8 for ; Thu, 16 Jul 2020 21:58:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="KuWR8+Ws" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726113AbgGPV6p (ORCPT ); Thu, 16 Jul 2020 17:58:45 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:46070 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726002AbgGPV6p (ORCPT ); Thu, 16 Jul 2020 17:58:45 -0400 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id A815E40391; Thu, 16 Jul 2020 21:58:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936724; bh=ghRdz9kYQI/CLwAkMlWYylnCNFhmwOvmxjtii0ZP2gA=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=KuWR8+WspumnO5LTesSsPZaDU5g8DQatm85EWXAvc4i66SgFcQzmEAcrIJb1ln14C ytOyEw3fABfprYpKURnD11aedl2OVJ8DwqoCjHxzkyyZGMX6+F+kwuTF10xIOTgXZh By/URearChoLbWAwBKZ2yKTWMu6ofs7NkmUofLQdO7/YkDa231VFx4p+W9G5oREhAm gFpmwe1nRfpNyi/bofbpzdW11+LmZ0UPvnfDQurc4hBnfjf7OIIeF4r2RFZI7hNuFq FXrMwD9GHFY0UkvXgkmWIGurfUMF/w2ZM9iJtQ9F5Mi5nAl2HtD5eUa9mUjL3NcSfq pDYSIGSmCAEgQ== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 364C6A022C; Thu, 16 Jul 2020 21:58:42 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:58:42 -0700 Date: Thu, 16 Jul 2020 14:58:42 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 02/11] usb: gadget: composite: Avoid using magic numbers To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Magic numbers are difficult to read. Use macros for super-speed-plus BOS descriptor attributes in the composite driver. They're self-documented. So there's no need to provide comments as we did previously for the magic numbers. Signed-off-by: Thinh Nguyen --- drivers/usb/gadget/composite.c | 41 ++++++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index 5c1eb96a5c57..a231ae382ac3 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -743,32 +744,30 @@ static int bos_desc(struct usb_composite_dev *cdev) ssp_cap->bReserved = 0; ssp_cap->wReserved = 0; - /* SSAC = 1 (2 attributes) */ - ssp_cap->bmAttributes = cpu_to_le32(1); + ssp_cap->bmAttributes = + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, 1) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, 0)); - /* Min RX/TX Lane Count = 1 */ ssp_cap->wFunctionalitySupport = - cpu_to_le16((1 << 8) | (1 << 12)); + cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID, 0) | + FIELD_PREP(USB_SSP_MIN_RX_LANE_COUNT, 1) | + FIELD_PREP(USB_SSP_MIN_TX_LANE_COUNT, 1)); - /* - * bmSublinkSpeedAttr[0]: - * ST = Symmetric, RX - * LSE = 3 (Gbps) - * LP = 1 (SuperSpeedPlus) - * LSM = 10 (10 Gbps) - */ ssp_cap->bmSublinkSpeedAttr[0] = - cpu_to_le32((3 << 4) | (1 << 14) | (0xa << 16)); - /* - * bmSublinkSpeedAttr[1] = - * ST = Symmetric, TX - * LSE = 3 (Gbps) - * LP = 1 (SuperSpeedPlus) - * LSM = 10 (10 Gbps) - */ + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, + USB_ST_SYMMETRIC_RX) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); + ssp_cap->bmSublinkSpeedAttr[1] = - cpu_to_le32((3 << 4) | (1 << 14) | - (0xa << 16) | (1 << 7)); + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, + USB_ST_SYMMETRIC_TX) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); } return le16_to_cpu(bos->wTotalLength); From patchwork Thu Jul 16 21:58:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 65B4260D for ; Thu, 16 Jul 2020 21:58:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 496B02076D for ; Thu, 16 Jul 2020 21:58:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="B7DIpUyr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726780AbgGPV6v (ORCPT ); Thu, 16 Jul 2020 17:58:51 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:45396 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726201AbgGPV6v (ORCPT ); Thu, 16 Jul 2020 17:58:51 -0400 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id D63EEC03D2; Thu, 16 Jul 2020 21:58:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936730; bh=JhVSUI4P0dPupPmwf9vt8wUoXqVGCGOuYZTTZ1bRYDk=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=B7DIpUyrJppxpUvSm2mhmJpond27g8pbE54LlMQGEZ1uF6LE/KHdW5AfcDd/j1ZTE hJf5gpd+a1frEOMbyg6tBeAE6GDTwd7ARn0JRNU/ibPB8RiWfCbVYddEnyrdhRtbwy A5SSFEqrjYm48MO2WnSfXybAbbthhbUsXFzRChZe0h8GCq8Qbg0X8YBeWfkWpIhp7b iYveq4cHDHZBHMKSVasThw5KoaH4bt7gVusGSWNaJNIhZzGrL+lNrtmQavs8H0J5EY On6vAKhNr7FsQqBcQj+F4m5TsIkVr310QPbcmTuZpfOUFk3KK9OD/lAl/kiNHdaRUp PYcl49rE62Hgg== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id A5B65A022C; Thu, 16 Jul 2020 21:58:49 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:58:49 -0700 Date: Thu, 16 Jul 2020 14:58:49 -0700 Message-Id: <7cb319578d430c35783d8d3f64ae1c1fa883ddb4.1594935978.git.thinhn@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 03/11] usb: gadget: Expose sublink speed attributes To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The USB 3.2 specification supports dual-lane and different transfer rates for super-speed-plus. Devices operating in super-speed-plus can be gen2x1, gen1x2, or gen2x2. A gadget driver may need to know the gadget's sublink speeds to properly setup its transfer requests and describe its capability in its descriptors. To describe the transfer rate in super-speed-plus fully, let's expose the lane count and sublink speed attributes when operating in super-speed-plus. Signed-off-by: Thinh Nguyen --- include/linux/usb/gadget.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index 6a178177e4c9..2ab929eed928 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -338,6 +338,15 @@ struct usb_gadget_ops { * @speed: Speed of current connection to USB host. * @max_speed: Maximal speed the UDC can handle. UDC must support this * and all slower speeds. + * @num_lanes: Number of lanes in use. + * @max_num_lanes: Maximum number of lanes the UDC supports. + * @ssac: Sublink speed attribute count. The number of sublink speed + * attributes is ssac + 1. + * @sublink_speed: Array of sublink speed attributes the UDC supports. Sublink + * speed attributes are paired, and an RX followed by a TX attribute. + * @speed_ssid: Current sublink speed attribute ID in use. + * @min_speed_ssid: Sublink speed attribute ID with the minimum speed. + * @max_speed_ssid: Sublink speed attribute ID with the maximum speed. * @state: the state we are now (attached, suspended, configured, etc) * @name: Identifies the controller hardware type. Used in diagnostics * and sometimes configuration. @@ -405,6 +414,17 @@ struct usb_gadget { struct list_head ep_list; /* of usb_ep */ enum usb_device_speed speed; enum usb_device_speed max_speed; + + /* SSP only */ + unsigned num_lanes; + unsigned max_num_lanes; + unsigned ssac; +#define USB_GADGET_MAX_SSAC 3 + struct usb_sublink_speed sublink_speed[USB_GADGET_MAX_SSAC + 1]; + unsigned speed_ssid; + unsigned min_speed_ssid; + unsigned max_speed_ssid; + enum usb_device_state state; const char *name; struct device dev; From patchwork Thu Jul 16 21:58:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668505 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3CC9660D for ; Thu, 16 Jul 2020 21:58:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 22F152076D for ; Thu, 16 Jul 2020 21:58:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="WlXhaqDf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726852AbgGPV66 (ORCPT ); Thu, 16 Jul 2020 17:58:58 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:45404 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726201AbgGPV66 (ORCPT ); Thu, 16 Jul 2020 17:58:58 -0400 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 48D18C03D2; Thu, 16 Jul 2020 21:58:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936737; bh=4+YAjCQBeKFdrlVajc/fPuGvpK7dEUGHfe+2ncOcBs0=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=WlXhaqDflhwLRAIi97XKWFLQGc8c6Lgt3G/SMIZAFTKHh29rNOkDK3G8oiGji4LfK zlkvCQA2eYhQd8368pSa2oh+/yW6XgdyeVlCLG2Qvhmcn2X+SWuS1m8CQWYN4EB1ap 6aUv19ISaN/Pv+nJfWEM3jyOs3mzleiBVh+oM7A5ZBm25a2sdcch/KRRLJrdHW2pIj c86B27X4c+mqZ5j4pP7OkuM/+wmCikfNlqe3QboaFuxViEBwwyLtMgBElMOLO4bdVo FM6WqbKpbs8PPcUx2r6cVYp3+zORdCdsYPQThsMbmvGYDsmu8H53VUWztpY9R/+9+P +Mqnkw4Gt+xvA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id B9F9DA022C; Thu, 16 Jul 2020 21:58:55 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:58:55 -0700 Date: Thu, 16 Jul 2020 14:58:55 -0700 Message-Id: <9df612e56f3f67c570eca02ab171a3f45510553b.1594935978.git.thinhn@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 04/11] usb: gadget: Set max speed for SSP devices To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org, Peter Chen , Alan Stern , Dejin Zheng , Roger Quadros , Jun Li Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org A super-speed-plus device may operate at different sublink speeds (e.g. gen2x2, gen1x2, or gen2x1). If the USB device supports different sublink speeds at super-speed-plus, set the device to operate at the maximum number of lanes and sublink speed possible. Introduce gadget ops udc_set_num_lanes_and_speed to set the lane count and sublink speed for super-speed-plus capable devices. Signed-off-by: Thinh Nguyen --- drivers/usb/gadget/udc/core.c | 24 +++++++++++++++++++----- include/linux/usb/gadget.h | 3 +++ 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c index 2e28dde8376f..1e916b3943fe 100644 --- a/drivers/usb/gadget/udc/core.c +++ b/drivers/usb/gadget/udc/core.c @@ -1112,12 +1112,26 @@ static inline void usb_gadget_udc_stop(struct usb_udc *udc) static inline void usb_gadget_udc_set_speed(struct usb_udc *udc, enum usb_device_speed speed) { - if (udc->gadget->ops->udc_set_speed) { - enum usb_device_speed s; + struct usb_gadget *gadget = udc->gadget; + enum usb_device_speed s; - s = min(speed, udc->gadget->max_speed); - udc->gadget->ops->udc_set_speed(udc->gadget, s); - } + if (speed == USB_SPEED_UNKNOWN) + s = gadget->max_speed; + else + s = min(speed, gadget->max_speed); + + /* + * If the UDC supports super-speed-plus and different sublink speeds, + * then set the gadget to the max possible sublink speed for + * super-speed-plus symmetric lanes. + */ + if (s == USB_SPEED_SUPER_PLUS && + gadget->ops->udc_set_num_lanes_and_speed) + gadget->ops->udc_set_num_lanes_and_speed(gadget, + gadget->max_num_lanes, + gadget->max_speed_ssid); + else if (gadget->ops->udc_set_speed) + gadget->ops->udc_set_speed(gadget, s); } /** diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index 2ab929eed928..ec4ed17e7bf5 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -322,6 +322,9 @@ struct usb_gadget_ops { struct usb_gadget_driver *); int (*udc_stop)(struct usb_gadget *); void (*udc_set_speed)(struct usb_gadget *, enum usb_device_speed); + void (*udc_set_num_lanes_and_speed)(struct usb_gadget *, + unsigned int num_lanes, + unsigned int ssid); struct usb_ep *(*match_ep)(struct usb_gadget *, struct usb_endpoint_descriptor *, struct usb_ss_ep_comp_descriptor *); From patchwork Thu Jul 16 21:59:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668507 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3EF59913 for ; Thu, 16 Jul 2020 21:59:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 256A6207DD for ; Thu, 16 Jul 2020 21:59:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="gjwzH8o8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726890AbgGPV7E (ORCPT ); Thu, 16 Jul 2020 17:59:04 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:45416 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726201AbgGPV7E (ORCPT ); Thu, 16 Jul 2020 17:59:04 -0400 Received: from mailhost.synopsys.com (sv2-mailhost2.synopsys.com [10.205.2.134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 5D090C0446; Thu, 16 Jul 2020 21:59:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936743; bh=aFNIB/IC6N0/eu1Z9gX6AGMdWgqrIIMMxbEP1HANpUA=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=gjwzH8o8+xD/rtNPkBlHFE0IWAHHjtYS3J4lmXwywBJAt9J56V+vGe8IxVUHfJ2Ap dKhwBtUitvR7hD2/N+pTPrHjFsPeOLWeahv5p4xX8z/zMPxbieOjV5BXbbdXbT4uJg QE1a1AeCDHDs2vVbnI5y/k1vjDAZ3sOEhHMqs+t532tXsSaoO+zscVwTvdrMou0sE4 KMiQTOQbZQctM9Xz5x7XrZVcS1sK56CaOvpfG+KB6xJuDKncx29/m8/47BK/AvqxvJ jHUwejQoiQhi7p3EpERZf3W1MVJpJ8PZ9rtEECGIHDmDUUHqfENwz1ZoQj6sL1wefk VXaWh5qyI7uOA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 2C2ADA024E; Thu, 16 Jul 2020 21:59:02 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:59:02 -0700 Date: Thu, 16 Jul 2020 14:59:02 -0700 Message-Id: <38e120eb5568d5d0c3438f18d3e31e866b68e992.1594935978.git.thinhn@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 05/11] usb: composite: Properly report sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Use the max sublink speed attributes reported in the gadget structure to write to the super-speed-plus BOS descriptor if available. Signed-off-by: Thinh Nguyen --- drivers/usb/gadget/composite.c | 76 +++++++++++++++++++++++++++++------------- 1 file changed, 52 insertions(+), 24 deletions(-) diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index a231ae382ac3..d9fb29a72f94 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -729,45 +729,73 @@ static int bos_desc(struct usb_composite_dev *cdev) /* The SuperSpeedPlus USB Device Capability descriptor */ if (gadget_is_superspeed_plus(cdev->gadget)) { struct usb_ssp_cap_descriptor *ssp_cap; + unsigned int ssac = 1; + unsigned int ssic = 0; + unsigned int min_ssid = 0; + int i; + + if (cdev->gadget->ssac) { + ssac = cdev->gadget->ssac; + + /* + * Paired RX and TX sublink speed attributes share + * the same SSID. + */ + ssic = (ssac + 1) / 2 - 1; + min_ssid = cdev->gadget->min_speed_ssid; + } ssp_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength); bos->bNumDeviceCaps++; - /* - * Report typical values. - */ - - le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SSP_CAP_SIZE(1)); - ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(1); + le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SSP_CAP_SIZE(ssac)); + ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(ssac); ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE; ssp_cap->bReserved = 0; ssp_cap->wReserved = 0; ssp_cap->bmAttributes = - cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, 1) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, 0)); + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, ssac) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, ssic)); ssp_cap->wFunctionalitySupport = - cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID, 0) | + cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID, min_ssid) | FIELD_PREP(USB_SSP_MIN_RX_LANE_COUNT, 1) | FIELD_PREP(USB_SSP_MIN_TX_LANE_COUNT, 1)); - ssp_cap->bmSublinkSpeedAttr[0] = - cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, - USB_ST_SYMMETRIC_RX) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); - - ssp_cap->bmSublinkSpeedAttr[1] = - cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, - USB_ST_SYMMETRIC_TX) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); + /* + * If the sublink speed attributes are not specified, then the + * default will be a pair symmetric RX/TX sublink speed + * attributes of 10 Gbps. + */ + for (i = 0; i < ssac + 1; i++) { + struct usb_sublink_speed default_ssa; + struct usb_sublink_speed *ptr; + + if (cdev->gadget->ssac) { + ptr = &cdev->gadget->sublink_speed[i]; + } else { + default_ssa.id = i / 2; + default_ssa.protocol = USB_LP_SSP; + default_ssa.exponent = USB_LSE_GBPS; + default_ssa.mantissa = 10; + + if (i % 2) + default_ssa.type = USB_ST_SYMMETRIC_TX; + else + default_ssa.type = USB_ST_SYMMETRIC_RX; + + ptr = &default_ssa; + } + + ssp_cap->bmSublinkSpeedAttr[i] = + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, ptr->id) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, ptr->exponent) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, ptr->type) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, ptr->protocol) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, ptr->mantissa)); + } } return le16_to_cpu(bos->wTotalLength); From patchwork Thu Jul 16 21:59:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668509 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AE60C913 for ; Thu, 16 Jul 2020 21:59:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9386720809 for ; Thu, 16 Jul 2020 21:59:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="ZN48ZdOw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726784AbgGPV7L (ORCPT ); Thu, 16 Jul 2020 17:59:11 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:45422 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726201AbgGPV7K (ORCPT ); Thu, 16 Jul 2020 17:59:10 -0400 Received: from mailhost.synopsys.com (sv2-mailhost2.synopsys.com [10.205.2.134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 71F56C0446; Thu, 16 Jul 2020 21:59:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936749; bh=muaPNu/htkt6sGQWxd+AKBohPBJCmux5yNpHy170w10=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=ZN48ZdOw/aH+6xoSEujD3p3XK5t2fYMvo9Rp1DUs3M40y9fZp0vrd/1OzXD+6O6KJ JOLGUejJFdm/ZbkZ5RSRpzc3jLXKL50ARrM8JP2agsASr4UN+4jZHTKo2V1ViOhOfy l2KTId0PoBgI8wJ7Lk0lAl3+i8h6Cj3ltkipV1tyx677mK3CSws8EQsGPuvKxXT83N cHL5Aq5S7mLUucNyV6qnkWYLqIv3OJFyqI0L1aXM0C07mK/iRX4ZWQFOGWvlFjR6na GgNiCknmllIuYbbOyVOLY4bOll87rx45pvbMbBttsKw82P84r/Zr8JZugZzxfqAlX5 X9Nwh5Qknm/iw== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 3F7F6A00A9; Thu, 16 Jul 2020 21:59:08 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:59:08 -0700 Date: Thu, 16 Jul 2020 14:59:08 -0700 Message-Id: <9684a2b2adb01b6b1a8c513928ea49b4a6436184.1594935978.git.thinhn@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 06/11] usb: devicetree: dwc3: Introduce num-lanes and lsm To: Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Introduce num-lanes and lane-speed-mantissa-gbps for devices operating in super-speed-plus. DWC_usb32 IP supports multiple lanes and can operate in different sublink speeds. Currently the device controller does not have the information of the phy's number of lanes supported. As a result, the user can specify them through these properties if they are different than the default setting. Signed-off-by: Thinh Nguyen --- Documentation/devicetree/bindings/usb/dwc3.txt | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index d03edf9d3935..4eba0615562f 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -86,6 +86,15 @@ Optional properties: - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame length adjustment when the fladj_30mhz_sdbnd signal is invalid or incorrect. + - snps,num-lanes: set to specify the number of lanes to use. Valid inputs are + 1 or 2. Apply if the maximum-speed is super-speed-plus + only. Default value is 2 for DWC_usb32. For DWC_usb31, + it is always 1 at super-speed-plus. + - snps,lane-speed-mantissa-gbps: set to specify the symmetric lane speed + mantissa in Gbps. Valid inputs are 5 or 10. Apply if + the maximum-speed is super-speed-plus only. Default + value is 10. For DWC_usb31, it's always 10 at + super-speed-plus. - snps,rx-thr-num-pkt-prd: periodic ESS RX packet threshold count - host mode only. Set this and rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide From patchwork Thu Jul 16 21:59:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668511 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02B5760D for ; Thu, 16 Jul 2020 21:59:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D7BA22076D for ; Thu, 16 Jul 2020 21:59:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="bIQsmAwQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726599AbgGPV7Q (ORCPT ); Thu, 16 Jul 2020 17:59:16 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:46094 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726189AbgGPV7P (ORCPT ); Thu, 16 Jul 2020 17:59:15 -0400 Received: from mailhost.synopsys.com (sv2-mailhost1.synopsys.com [10.205.2.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 6A8994010A; Thu, 16 Jul 2020 21:59:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936755; bh=YpKeXV3yQFIhIfekl9+7l0TTx5FMBa/hJmOK3FLzkxo=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=bIQsmAwQibG+7Hyy4jw0UR/7vDF+Iu9L5JvbQqXm5SbEy8DgYZKIIgwJTYP+pCPLH 7Mk1wIkAHYE2F8defXu6TFL203oBKlViuzNzQytmq8zjb+fXFGA2Rnthui1yoncQA5 r5KGsqRTpBqkZ2qLVupdJJXnH5wac05uTEDFb1e6jalh0n91ymEK7K+HQP4qOizpU1 vv5OheM9oPojHt+ACXH3X0hSNF16gbgPR3AVvRsTAMA/xPLxj8dxe8DKIyCA+FwPww lyWve+XSD76m16UngH7xhNc/nGpcLeI2Ef/4ZpUfSOy1yNI6t3hb9VQ/nLNexbESfE uiZQ491gNhsPA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 538CAA0258; Thu, 16 Jul 2020 21:59:14 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:59:14 -0700 Date: Thu, 16 Jul 2020 14:59:14 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 07/11] usb: dwc3: Initialize lane count and sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org DWC_usb32 supports dual-lane operating at different sublink speeds. Initialize and validate the maximum number of lanes and speed the controller supports captured from the dwc3 device properties. Currently the controller has no visibility into the HW parameter to determine the maximum number of lanes the phy supports. If the number of lanes is not specified, then set the default to 2 for DWC_usb32 and 1 for DWC_usb31 if operate in SSP. Signed-off-by: Thinh Nguyen --- drivers/usb/dwc3/core.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 10 ++++++++ 2 files changed, 74 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 25c686a752b0..dcc76705862f 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1299,6 +1299,10 @@ static void dwc3_get_properties(struct dwc3 *dwc) "snps,usb3_lpm_capable"); dwc->usb2_lpm_disable = device_property_read_bool(dev, "snps,usb2-lpm-disable"); + device_property_read_u8(dev, "snps,num-lanes", + &dwc->maximum_num_lanes); + device_property_read_u8(dev, "snps,lane-speed-mantissa-gbps", + &dwc->maximum_lsm); device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", &rx_thr_num_pkt_prd); device_property_read_u8(dev, "snps,rx-max-burst-prd", @@ -1426,6 +1430,66 @@ static void dwc3_check_params(struct dwc3 *dwc) break; } + + /* + * If it's not DWC_usb32 IP or speed is less than SSP, no need to + * validate the number of lanes or lane speed mantissa. + * + * Currently the controller does not have visibility into the HW + * parameter to determine the maximum number of lanes the phy supports. + * If the number of lanes is not specified in the device property, then + * set the default to 2 for DWC_usb32 and 1 for DWC_usb31 if the device + * is capable of super-speed-plus. + */ + if (!DWC3_IP_IS(DWC32) || + dwc->maximum_speed < USB_SPEED_SUPER_PLUS) { + if (dwc->maximum_lsm || dwc->maximum_num_lanes) + dev_warn(dev, "Ignore num_lanes and LSM properties\n"); + + if (DWC3_IP_IS(DWC31) && + dwc->maximum_speed == USB_SPEED_SUPER_PLUS) { + dwc->maximum_lsm = DWC3_LSM_10_GBPS; + dwc->maximum_num_lanes = 1; + } else { + dwc->maximum_lsm = DWC3_LSM_UNSPECIFIED; + dwc->maximum_num_lanes = 0; + } + + return; + } + + switch (dwc->maximum_lsm) { + case DWC3_LSM_10_GBPS: + case DWC3_LSM_5_GBPS: + break; + default: + dev_err(dev, "Invalid LSM (%dGbps)\n", dwc->maximum_lsm); + fallthrough; + case DWC3_LSM_UNSPECIFIED: + dwc->maximum_lsm = DWC3_LSM_10_GBPS; + break; + } + + switch (dwc->maximum_num_lanes) { + case 2: + break; + case 1: + if (dwc->maximum_lsm == DWC3_LSM_5_GBPS) { + dev_err(dev, "Invalid num_lanes (%d) and LSM (%dGbps) for %s\n", + dwc->maximum_num_lanes, + dwc->maximum_lsm, + usb_speed_string(dwc->maximum_speed)); + dwc->maximum_lsm = DWC3_LSM_10_GBPS; + } + break; + default: + dev_err(dev, "Invalid number of lanes (%d)\n", + dwc->maximum_num_lanes); + fallthrough; + case 0: + dwc->maximum_num_lanes = 2; + break; + } } static int dwc3_probe(struct platform_device *pdev) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 013f42a2b5dc..33cfd7f4a7e0 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -40,6 +40,10 @@ #define DWC3_XHCI_RESOURCES_NUM 2 #define DWC3_ISOC_MAX_RETRIES 5 +#define DWC3_LSM_UNSPECIFIED 0 +#define DWC3_LSM_5_GBPS 5 +#define DWC3_LSM_10_GBPS 10 + #define DWC3_SCRATCHBUF_SIZE 4096 /* each buffer is assumed to be 4KiB */ #define DWC3_EVENT_BUFFERS_SIZE 4096 #define DWC3_EVENT_TYPE_MASK 0xfe @@ -958,6 +962,8 @@ struct dwc3_scratchpad_array { * @nr_scratch: number of scratch buffers * @u1u2: only used on revisions <1.83a for workaround * @maximum_speed: maximum speed requested (mainly for testing purposes) + * @maximum_lsm: maximum lane speed mantissa in Gbps + * @maximum_num_lanes: maximum number of lanes * @ip: controller's ID * @revision: controller's version of an IP * @version_type: VERSIONTYPE register contents, a sub release of a revision @@ -988,6 +994,7 @@ struct dwc3_scratchpad_array { * @ep0state: state of endpoint zero * @link_state: link state * @speed: device speed (super, high, full, low) + * @num_lanes: number of connected lanes * @hwparams: copy of hwparams registers * @root: debugfs root folder pointer * @regset: debugfs pointer to regdump file @@ -1119,6 +1126,8 @@ struct dwc3 { u32 nr_scratch; u32 u1u2; u32 maximum_speed; + u8 maximum_lsm; + u8 maximum_num_lanes; u32 ip; @@ -1184,6 +1193,7 @@ struct dwc3 { u8 u1pel; u8 speed; + u8 num_lanes; u8 num_eps; From patchwork Thu Jul 16 21:59:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668513 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5FCE460D for ; Thu, 16 Jul 2020 21:59:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 411BB2076D for ; Thu, 16 Jul 2020 21:59:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="jTlBRRAp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726893AbgGPV7W (ORCPT ); Thu, 16 Jul 2020 17:59:22 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:45436 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726189AbgGPV7W (ORCPT ); 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Thu, 16 Jul 2020 21:59:20 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:59:20 -0700 Date: Thu, 16 Jul 2020 14:59:20 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 08/11] usb: dwc3: gadget: Report sublink speed capability To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Report the sublink speed attributes to the usb_gadget structure based on the dwc3 device capability maximum_lsm and maximum_num_lanes, Only DWC_usb32 supports 2 sublink speeds if it can operate with 2 lanes. (i.e. at SSP, it can operate as gen1x2) Note: the SSID DWC3_SSP_SSID_GEN2 and DWC3_SSP_SSID_GEN1 are arbitrary. There's no standard according to the USB 3.2 spec as long as they are unique and within 0-15. Signed-off-by: Thinh Nguyen --- drivers/usb/dwc3/core.h | 4 ++++ drivers/usb/dwc3/gadget.c | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 33cfd7f4a7e0..e346ae12e69e 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -44,6 +44,10 @@ #define DWC3_LSM_5_GBPS 5 #define DWC3_LSM_10_GBPS 10 +/* Sublink Speed Attribute ID */ +#define DWC3_SSP_SSID_GEN2 2 +#define DWC3_SSP_SSID_GEN1 1 + #define DWC3_SCRATCHBUF_SIZE 4096 /* each buffer is assumed to be 4KiB */ #define DWC3_EVENT_BUFFERS_SIZE 4096 #define DWC3_EVENT_TYPE_MASK 0xfe diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 80c3ef134e41..1ca57af23994 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -3662,6 +3662,47 @@ int dwc3_gadget_init(struct dwc3 *dwc) dwc->revision); dwc->gadget.max_speed = dwc->maximum_speed; + dwc->gadget.max_num_lanes = dwc->maximum_num_lanes; + + if (dwc->maximum_speed == USB_SPEED_SUPER_PLUS) { + struct usb_sublink_speed *ssa; + int i; + + /* + * Multiple sublink speeds are only available to DWC_usb32 + * devices that can operate at gen2x2 max. + */ + if (dwc->maximum_lsm == DWC3_LSM_10_GBPS && + dwc->maximum_num_lanes == 2) { + dwc->gadget.ssac = 3; + dwc->gadget.min_speed_ssid = DWC3_SSP_SSID_GEN1; + dwc->gadget.max_speed_ssid = DWC3_SSP_SSID_GEN2; + } else { + dwc->gadget.ssac = 1; + dwc->gadget.min_speed_ssid = DWC3_SSP_SSID_GEN2; + dwc->gadget.max_speed_ssid = DWC3_SSP_SSID_GEN2; + } + + for (i = 0; i < dwc->gadget.ssac + 1; i++) { + ssa = &dwc->gadget.sublink_speed[i]; + + if (i > 1) { + ssa->id = DWC3_SSP_SSID_GEN1; + ssa->mantissa = DWC3_LSM_5_GBPS; + } else { + ssa->id = DWC3_SSP_SSID_GEN2; + ssa->mantissa = DWC3_LSM_10_GBPS; + } + + if (i % 2) + ssa->type = USB_ST_SYMMETRIC_TX; + else + ssa->type = USB_ST_SYMMETRIC_RX; + + ssa->exponent = USB_LSE_GBPS; + ssa->protocol = USB_LP_SSP; + } + } /* * REVISIT: Here we should clear all pending IRQs to be From patchwork Thu Jul 16 21:59:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668515 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0DE4760D for ; Thu, 16 Jul 2020 21:59:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E65972076D for ; Thu, 16 Jul 2020 21:59:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="hlGy5uyO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726907AbgGPV72 (ORCPT ); Thu, 16 Jul 2020 17:59:28 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:46110 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726002AbgGPV72 (ORCPT ); Thu, 16 Jul 2020 17:59:28 -0400 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 9188A4010A; Thu, 16 Jul 2020 21:59:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936767; bh=l2UeK9ZgGVTX4kMyT5/V6rLMh32+q2Ul8pP+EngZcK4=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=hlGy5uyOKAX/6ofQl2CrHr+iRrZ/hfXsDFArXrBLB4jYf/XlJjerXS0Kcgp7slX47 CRIp1o9UKYcZKO+7Uj3V5iwySpL1jdDTcJlArdRUXLGAHsaevAArhioWUv7IytwTMS 6ubwZ4GY5kzBk5rMe/OpMIQ1T7zLo459w7auWDNkWB6KemuAJIxjfwsTA0nmsrAbmF MNYUgGfhTe5sSZlSlEa/MJIV+dNvfiutFZExhB5+KFYs0Jt3DGgR734HESFXzwK0iW h2KG+8gx8WZpoFGVtMpmz29OpQQIwOCbRv9R6hdzNQ7hnO6BE4PyjN9fWMEEljjQCy Siy/RKQ5TWO/w== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 7BB35A022D; Thu, 16 Jul 2020 21:59:26 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:59:26 -0700 Date: Thu, 16 Jul 2020 14:59:26 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 09/11] usb: dwc3: gadget: Implement setting of sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Implement gadget ops udc_set_num_lanes_and_speed. This allows the gadget/core driver to select number of lanes to use and the sublink speed the controller supports. Signed-off-by: Thinh Nguyen --- drivers/usb/dwc3/core.h | 2 ++ drivers/usb/dwc3/gadget.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index e346ae12e69e..92ab65a46771 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -389,6 +389,8 @@ #define DWC3_GUCTL2_RST_ACTBITLATER BIT(14) /* Device Configuration Register */ +#define DWC3_DCFG_NUMLANES(n) (((n) & 0x3) << 30) /* DWC_usb32 only */ + #define DWC3_DCFG_DEVADDR(addr) ((addr) << 3) #define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 1ca57af23994..01bdd51f6b47 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2311,6 +2311,62 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, spin_unlock_irqrestore(&dwc->lock, flags); } +static void dwc3_gadget_set_num_lanes_and_speed(struct usb_gadget *g, + unsigned int num_lanes, + unsigned int ssid) +{ + struct dwc3 *dwc = gadget_to_dwc(g); + struct usb_sublink_speed *ssa = NULL; + unsigned int lanes; + unsigned long flags; + u32 reg; + int i; + + spin_lock_irqsave(&dwc->lock, flags); + if (dwc->maximum_speed < USB_SPEED_SUPER_PLUS) + goto done; + + for (i = 0; i < g->ssac + 1; i++) { + if (g->sublink_speed[i].id == ssid) { + ssa = &g->sublink_speed[i]; + break; + } + } + + if (!ssa) { + dev_err(dwc->dev, "SSID not found (%d)\n", ssid); + goto done; + } + + reg = dwc3_readl(dwc->regs, DWC3_DCFG); + reg &= ~DWC3_DCFG_SPEED_MASK; + + switch (ssa->mantissa) { + case DWC3_LSM_5_GBPS: + reg |= DWC3_DCFG_SUPERSPEED; + break; + case DWC3_LSM_10_GBPS: + reg |= DWC3_DCFG_SUPERSPEED_PLUS; + break; + default: + dev_err(dwc->dev, "invalid lane speed mantissa (%d)\n", + ssa->mantissa); + goto done; + } + + /* Lane configuration is only available to DWC_usb32 */ + if (DWC3_IP_IS(DWC32)) { + lanes = clamp_t(unsigned int, num_lanes, 1, + dwc->maximum_num_lanes); + reg &= ~DWC3_DCFG_NUMLANES(~0); + reg |= DWC3_DCFG_NUMLANES(lanes - 1); + } + + dwc3_writel(dwc->regs, DWC3_DCFG, reg); +done: + spin_unlock_irqrestore(&dwc->lock, flags); +} + static const struct usb_gadget_ops dwc3_gadget_ops = { .get_frame = dwc3_gadget_get_frame, .wakeup = dwc3_gadget_wakeup, @@ -2319,6 +2375,7 @@ static const struct usb_gadget_ops dwc3_gadget_ops = { .udc_start = dwc3_gadget_start, .udc_stop = dwc3_gadget_stop, .udc_set_speed = dwc3_gadget_set_speed, + .udc_set_num_lanes_and_speed = dwc3_gadget_set_num_lanes_and_speed, .get_config_params = dwc3_gadget_config_params, }; @@ -3719,7 +3776,12 @@ int dwc3_gadget_init(struct dwc3 *dwc) goto err4; } - dwc3_gadget_set_speed(&dwc->gadget, dwc->maximum_speed); + if (DWC3_IP_IS(DWC32) && dwc->maximum_speed == USB_SPEED_SUPER_PLUS) + dwc3_gadget_set_num_lanes_and_speed(&dwc->gadget, + dwc->maximum_num_lanes, + dwc->gadget.max_speed_ssid); + else + dwc3_gadget_set_speed(&dwc->gadget, dwc->maximum_speed); return 0; From patchwork Thu Jul 16 21:59:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11668517 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3573460D for ; Thu, 16 Jul 2020 21:59:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 164B920760 for ; Thu, 16 Jul 2020 21:59:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="l21V+Kh0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726932AbgGPV7e (ORCPT ); Thu, 16 Jul 2020 17:59:34 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:46118 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726002AbgGPV7e (ORCPT ); Thu, 16 Jul 2020 17:59:34 -0400 Received: from mailhost.synopsys.com (sv2-mailhost1.synopsys.com [10.205.2.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id A615A4010A; Thu, 16 Jul 2020 21:59:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1594936773; bh=X1aNhzrA8/gpcPGlqubujRxScJg0ddfdcsD+KFUmCJg=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=l21V+Kh0PEiIf3JxhXnogYWjrhaiOj/MJ2oCkG2tBgaZQD+Ut57MiX7kCHxt2npIr 4kTeFvvncEXoiHdl6b0HmSjSKQk7q9Vki+mbONUYf4XefeVnV2KZbKLNYFgR4qmZ5A dNOTPspT28eBFqgp+q8kb+4hl/+GNB+CWqe7czIXVEAjx/6FZh1S9gV+zkkTnG/YUq /H34Z8NzEDvoVkUgdig6oCBH19ID3Fg00pTQnmbKHKzOLpIcWtdjuCkD0EZfh7A7U9 ZFv++5D7MY69lxR5nlDyRyinMtLSAQ0eqLBE9feR6kx5JcuWuB2jNeXRkCJGM/H+wP 9WkbLpiJOLP9w== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 8ECCCA0258; Thu, 16 Jul 2020 21:59:32 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:59:32 -0700 Date: Thu, 16 Jul 2020 14:59:32 -0700 Message-Id: <634bc730b3209698bdb6057513e409889fb0e98e.1594935978.git.thinhn@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 10/11] usb: dwc3: gadget: Track connected lane and sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Track the number of lanes connected in gadget->num_lanes and track the current sublink speed attribute ID for super-speed-plus operations. Note: if the device is running in gen1x2, set the gadget->speed to USB_SPEED_SUPER_PLUS. Signed-off-by: Thinh Nguyen --- drivers/usb/dwc3/core.h | 2 ++ drivers/usb/dwc3/gadget.c | 21 ++++++++++++++++++++- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 92ab65a46771..63178549428d 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -464,6 +464,8 @@ #define DWC3_DEVTEN_USBRSTEN BIT(1) #define DWC3_DEVTEN_DISCONNEVTEN BIT(0) +#define DWC3_DSTS_CONNLANES(n) (((n) >> 30) & 0x3) /* DWC_usb32 only */ + /* Device Status Register */ #define DWC3_DSTS_DCNRD BIT(29) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 01bdd51f6b47..87a69a096b57 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2306,6 +2306,10 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, reg |= DWC3_DCFG_SUPERSPEED_PLUS; } } + + if (DWC3_IP_IS(DWC32) && speed < USB_SPEED_SUPER_PLUS) + reg &= ~DWC3_DCFG_NUMLANES(~0); + dwc3_writel(dwc->regs, DWC3_DCFG, reg); spin_unlock_irqrestore(&dwc->lock, flags); @@ -3175,12 +3179,19 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) struct dwc3_ep *dep; int ret; u32 reg; + u8 lanes = 1; u8 speed; reg = dwc3_readl(dwc->regs, DWC3_DSTS); speed = reg & DWC3_DSTS_CONNECTSPD; dwc->speed = speed; + if (DWC3_IP_IS(DWC32)) + lanes = DWC3_DSTS_CONNLANES(reg) + 1; + + dwc->gadget.num_lanes = lanes; + dwc->gadget.speed_ssid = 0; + /* * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed * each time on Connect Done. @@ -3195,6 +3206,7 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); dwc->gadget.ep0->maxpacket = 512; dwc->gadget.speed = USB_SPEED_SUPER_PLUS; + dwc->gadget.speed_ssid = DWC3_SSP_SSID_GEN2; break; case DWC3_DSTS_SUPERSPEED: /* @@ -3215,7 +3227,13 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); dwc->gadget.ep0->maxpacket = 512; - dwc->gadget.speed = USB_SPEED_SUPER; + + if (lanes > 1) { + dwc->gadget.speed = USB_SPEED_SUPER_PLUS; + dwc->gadget.speed_ssid = DWC3_SSP_SSID_GEN1; + } else { + dwc->gadget.speed = USB_SPEED_SUPER; + } break; case DWC3_DSTS_HIGHSPEED: dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64); @@ -3696,6 +3714,7 @@ int dwc3_gadget_init(struct dwc3 *dwc) dwc->gadget.sg_supported = true; dwc->gadget.name = "dwc3-gadget"; dwc->gadget.lpm_capable = true; + dwc->gadget.num_lanes = 1; /* * FIXME We might be setting max_speed to X-Patchwork-Id: 11668519 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 70AC2913 for ; Thu, 16 Jul 2020 21:59:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 569982076D for ; Thu, 16 Jul 2020 21:59:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="R1p8pTQx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726954AbgGPV7k (ORCPT ); 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Thu, 16 Jul 2020 21:59:38 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 16 Jul 2020 14:59:38 -0700 Date: Thu, 16 Jul 2020 14:59:38 -0700 Message-Id: <8717065db3097cc0beedb0f6cf7e8fff52b1ba91.1594935978.git.thinhn@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH 11/11] usb: dwc3: gadget: Set speed only up to the max supported To: Felipe Balbi , Greg Kroah-Hartman , Thinh Nguyen , linux-usb@vger.kernel.org Cc: John Youn Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The setting of device speed should be limited by the device's maximum_speed. This patch adds a check and prevent the driver from attempting to configure higher than the maximum_speed. Signed-off-by: Thinh Nguyen --- drivers/usb/dwc3/gadget.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 87a69a096b57..155251d67b4d 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2254,6 +2254,7 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, enum usb_device_speed speed) { struct dwc3 *dwc = gadget_to_dwc(g); + enum usb_device_speed selected_speed = speed; unsigned long flags; u32 reg; @@ -2278,7 +2279,10 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, !dwc->dis_metastability_quirk) { reg |= DWC3_DCFG_SUPERSPEED; } else { - switch (speed) { + if (speed > dwc->maximum_speed) + selected_speed = dwc->maximum_speed; + + switch (selected_speed) { case USB_SPEED_LOW: reg |= DWC3_DCFG_LOWSPEED; break; @@ -2298,7 +2302,8 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, reg |= DWC3_DCFG_SUPERSPEED_PLUS; break; default: - dev_err(dwc->dev, "invalid speed (%d)\n", speed); + dev_err(dwc->dev, "invalid speed (%d)\n", + selected_speed); if (DWC3_IP_IS(DWC3)) reg |= DWC3_DCFG_SUPERSPEED; @@ -2307,7 +2312,7 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, } } - if (DWC3_IP_IS(DWC32) && speed < USB_SPEED_SUPER_PLUS) + if (DWC3_IP_IS(DWC32) && selected_speed < USB_SPEED_SUPER_PLUS) reg &= ~DWC3_DCFG_NUMLANES(~0); dwc3_writel(dwc->regs, DWC3_DCFG, reg);