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Tue, 21 Jul 2020 08:06:24 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Subject: [PATCH v6 2/5] rockchip: roc-rk3399-pc: Add custom led_setup() Date: Tue, 21 Jul 2020 20:36:01 +0530 Message-Id: <20200721150604.35410-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200721150604.35410-1-jagan@amarulasolutions.com> References: <20200721150604.35410-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_110628_169682_541E246D X-CRM114-Status: GOOD ( 11.91 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:441 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki , Suniel Mahesh Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org roc-rk3399-pc has some specific requirements to support LEDS, environment. board detection and etc prior to U-Boot proper. So as of now SPL would be a better stage for these custom board requirements to support unlike TPL. Adding few of these custom requirements like LEDS in TPL would require extra code pulling and also the size of TPL can grow. So, this patch moves the leds code from TPL into SPL Board init led_setup code. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v6: - use spl_board_init custom led function arch/arm/mach-rockchip/tpl.c | 7 ------- board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 10 +++------- configs/roc-pc-mezzanine-rk3399_defconfig | 2 +- configs/roc-pc-rk3399_defconfig | 2 +- 4 files changed, 5 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 88f80b05a9..cc908e1b0e 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -43,18 +43,11 @@ __weak void rockchip_stimer_init(void) TIMER_CONTROL_REG); } -__weak int board_early_init_f(void) -{ - return 0; -} - void board_init_f(ulong dummy) { struct udevice *dev; int ret; - board_early_init_f(); - #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT) /* * Debug UART can be used from here if required: diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c index 7c3a803654..2b447df8aa 100644 --- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include #include @@ -30,19 +29,16 @@ int board_early_init_f(void) out: return 0; } -#endif -#if defined(CONFIG_TPL_BUILD) +#else -#define GPIO0_BASE 0xff720000 +#define GPIO0_BASE 0xff720000 -int board_early_init_f(void) +void led_setup(void) { struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE; /* Turn on red LED, indicating full power mode */ spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1); - - return 0; } #endif diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index c87a8568fc..15d511741f 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -21,7 +22,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y -CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 601f5c6ae1..2a6d0d22c8 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -21,7 +22,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y -CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y From patchwork Tue Jul 21 15:06:02 2020 Content-Type: text/plain; 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Tue, 21 Jul 2020 08:06:29 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Subject: [PATCH v6 3/5] rockchip: Don't clear the reset status reg Date: Tue, 21 Jul 2020 20:36:02 +0530 Message-Id: <20200721150604.35410-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200721150604.35410-1-jagan@amarulasolutions.com> References: <20200721150604.35410-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_110632_309847_36AAF685 X-CRM114-Status: UNSURE ( 9.34 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:541 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki , Suniel Mahesh Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org reset reason can be used several stages of U-Boot bootloader like SPL, U-Boot proper based on the requirements. Clearing the status register end of get_reset_cause will end up showing the wrong reset cause when it read the second time. For example, if board resets, SPL reads the reset status as RST whereas U-Boot proper reads the status as POR. However, based on the latest testing clearing reset status won't be required for determine the last reset cause or following resets. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v6: - collect Kever r-b arch/arm/include/asm/arch-rockchip/cru.h | 1 - arch/arm/mach-rockchip/cpu-info.c | 6 ------ 2 files changed, 7 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index 5eb17f9d55..d2057cb738 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -26,7 +26,6 @@ enum { SND_GLB_TSADC_RST_ST = BIT(3), FST_GLB_WDT_RST_ST = BIT(4), SND_GLB_WDT_RST_ST = BIT(5), - GLB_RST_ST_MASK = GENMASK(5, 0), }; #define MHz 1000000 diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index 21ca9dedce..bb5a198039 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -47,12 +47,6 @@ static char *get_reset_cause(void) */ env_set("reset_reason", cause); - /* - * Clear glb_rst_st, so we can determine the last reset cause - * for following resets. - */ - rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK); 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Tue, 21 Jul 2020 08:06:33 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Subject: [PATCH v6 4/5] rockchip: Separate the reset cause from display cpuinfo Date: Tue, 21 Jul 2020 20:36:03 +0530 Message-Id: <20200721150604.35410-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200721150604.35410-1-jagan@amarulasolutions.com> References: <20200721150604.35410-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_110636_378383_060ECA0F X-CRM114-Status: GOOD ( 15.22 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:643 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki , Suniel Mahesh Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org reset cause is a generic functionality based on the soc cru registers in rockchip. This can be used for printing the cause of reset in cpuinfo or some other place where reset cause is needed.  Other than cpuinfo, reset cause can also be using during bootcount for checking the specific reset cause and glow the led based on the reset cause. So, let's separate the reset cause code from cpuinfo, and add a check to build it for rk3399, rk3288 since these two soc are supporting reset cause as of now. Tested-by: Suniel Mahesh Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v6: - collect Kever r-b arch/arm/include/asm/arch-rockchip/cru.h | 2 ++ arch/arm/mach-rockchip/Makefile | 5 ++++- arch/arm/mach-rockchip/cpu-info.c | 20 ++++++++++++-------- 3 files changed, 18 insertions(+), 9 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index d2057cb738..13ea4aba8e 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -30,4 +30,6 @@ enum { #define MHz 1000000 +char *get_reset_cause(void); + #endif /* _ROCKCHIP_CLOCK_H */ diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 5b38526fe0..121f23a563 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -22,11 +22,14 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # we can have the preprocessor correctly recognise both 0x0 and 0 # meaning "turn it off". obj-y += boot_mode.o -obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o obj-$(CONFIG_MISC_INIT_R) += misc.o endif +ifeq ($(CONFIG_TPL_BUILD),) +obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o +endif + obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram.o obj-$(CONFIG_ROCKCHIP_PX30) += px30/ diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index bb5a198039..d0f030109f 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -13,7 +13,7 @@ #include #include -static char *get_reset_cause(void) +char *get_reset_cause(void) { struct rockchip_cru *cru = rockchip_get_cru(); char *cause = NULL; @@ -41,21 +41,25 @@ static char *get_reset_cause(void) cause = "unknown reset"; } - /** - * reset_reason env is used by rk3288, due to special use case - * to figure it the boot behavior. so keep this as it is. - */ - env_set("reset_reason", cause); - return cause; } +#if CONFIG_IS_ENABLED(DISPLAY_CPUINFO) int print_cpuinfo(void) { + char *cause = get_reset_cause(); + printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC); - printf("Reset cause: %s\n", get_reset_cause()); + printf("Reset cause: %s\n", cause); + + /** + * reset_reason env is used by rk3288, due to special use case + * to figure it the boot behavior. so keep this as it is. + */ + env_set("reset_reason", cause); /* TODO print operating temparature and clock */ return 0; } +#endif From patchwork Tue Jul 21 15:06:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 11675847 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C50FE6C1 for ; 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Tue, 21 Jul 2020 08:06:38 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:3df7:ef76:b2b5:fa14]) by smtp.gmail.com with ESMTPSA id h9sm20671276pfk.155.2020.07.21.08.06.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jul 2020 08:06:37 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Subject: [PATCH v6 5/5] rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y Date: Tue, 21 Jul 2020 20:36:04 +0530 Message-Id: <20200721150604.35410-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200721150604.35410-1-jagan@amarulasolutions.com> References: <20200721150604.35410-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_110639_980884_FAA50587 X-CRM114-Status: GOOD ( 14.99 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1044 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki , Suniel Mahesh Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org ROC-RK3399-PC has specific set of configurations for on-board led setup. Due to easiness for user to know the state of the board roc-rk339-pc board code will setup the low power led on/off, and waiting for user to press power key and then glow full power led. All this needs to happen only during power-on-reset not for soft reset or WDT. Also, it is not a proper usage to ask the user to press the Power key if the board connected remotely, so add the environment variable 'pwr_key' to check as well. So, user need to press Power key only - during POR - pwr_key=y Tested-by: Suniel Mahesh Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v6: - increase SPL _R malloc board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 38 +++++++++++++++++++-- configs/roc-pc-mezzanine-rk3399_defconfig | 4 ++- configs/roc-pc-rk3399_defconfig | 4 ++- 3 files changed, 42 insertions(+), 4 deletions(-) diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c index 2b447df8aa..93e7d776fb 100644 --- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -5,11 +5,15 @@ #include #include +#include #include -#include #include #include +#include + +#include #include +#include #ifndef CONFIG_SPL_BUILD int board_early_init_f(void) @@ -32,13 +36,43 @@ out: #else +#define PMUGRF_BASE 0xff320000 #define GPIO0_BASE 0xff720000 +/** + * LED setup for roc-rk3399-pc + * + * 1. Set the low power leds (only during POR, pwr_key env is 'y') + * glow yellow LED, termed as low power + * poll for on board power key press + * once powe key pressed, turn off yellow + * 2. Turn on red LED, indicating full power mode + */ void led_setup(void) { struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE; + struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; + bool press_pwr_key = false; + + if (IS_ENABLED(CONFIG_SPL_ENV_SUPPORT)) { + env_init(); + env_load(); + if (env_get_yesno("pwr_key") == 1) + press_pwr_key = true; + } + + if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) { + spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1); + + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), + GPIO_PULL_NORMAL); + while (readl(&gpio0->ext_port) & 0x20) + ; + + spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0); + } - /* Turn on red LED, indicating full power mode */ spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1); } + #endif diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 15d511741f..9a01de454f 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -19,7 +19,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y CONFIG_CMD_BOOTZ=y @@ -34,6 +35,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 2a6d0d22c8..6181da763d 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -19,7 +19,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y CONFIG_CMD_BOOTZ=y @@ -33,6 +34,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y