From patchwork Sat Jul 25 03:58:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11684825 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA76414E3 for ; Sat, 25 Jul 2020 03:59:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DBFFD2078E for ; Sat, 25 Jul 2020 03:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726877AbgGYD7Z (ORCPT ); Fri, 24 Jul 2020 23:59:25 -0400 Received: from mga06.intel.com ([134.134.136.31]:58730 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726593AbgGYD7J (ORCPT ); Fri, 24 Jul 2020 23:59:09 -0400 IronPort-SDR: 9tB7s0tOBjcMacKN4Ied0pURVfOqf1GaQR2YMnkbhjemWaQF35Zp8BWskY8/bjfdtaTe1FBkMl vw7wc0kg87iw== X-IronPort-AV: E=McAfee;i="6000,8403,9692"; a="212351099" X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="212351099" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2020 20:59:08 -0700 IronPort-SDR: lr/vJgbfTrwuAIDikqQenTHAyqcaxwsiw/+msU2W9Y8X9+4icRTkZ3HISv4KLLZMW+EEdJ16j/ 4cKMJWvca99Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="489405378" Received: from pittner-mobl1.amr.corp.intel.com (HELO localhost.localdomain) ([10.254.77.166]) by fmsmga005.fm.intel.com with ESMTP; 24 Jul 2020 20:59:07 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: [PATCH v8 1/5] PCI: Conditionally initialize host bridge native_* members Date: Fri, 24 Jul 2020 20:58:52 -0700 Message-Id: <8a76b4a524d3915d42e894da7f4dbdec6c104512.1595649348.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kuppuswamy Sathyanarayanan If CONFIG_PCIEPORTBUS is not enabled in kernel then initialing struct pci_host_bridge PCIe specific native_* members to "1" is incorrect. So protect the PCIe specific member initialization with CONFIG_PCIEPORTBUS. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/probe.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 2f66988cea25..a94b97564ceb 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -588,12 +588,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) * may implement its own AER handling and use _OSC to prevent the * OS from interfering. */ +#ifdef CONFIG_PCIEPORTBUS bridge->native_aer = 1; bridge->native_pcie_hotplug = 1; - bridge->native_shpc_hotplug = 1; bridge->native_pme = 1; bridge->native_ltr = 1; bridge->native_dpc = 1; +#endif + bridge->native_shpc_hotplug = 1; device_initialize(&bridge->dev); } From patchwork Sat Jul 25 03:58:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11684817 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 42A4713B4 for ; Sat, 25 Jul 2020 03:59:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0795C22B48 for ; Sat, 25 Jul 2020 03:59:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726704AbgGYD7K (ORCPT ); Fri, 24 Jul 2020 23:59:10 -0400 Received: from mga06.intel.com ([134.134.136.31]:58730 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726639AbgGYD7J (ORCPT ); Fri, 24 Jul 2020 23:59:09 -0400 IronPort-SDR: GlaMz67rQ094Jj7QGSbSWzyz9PgtkPFFwXfCjLPyvy+9gpeY1gkekrXevenzb6Ewuy5gVquNkP /EY4XOi5kO0Q== X-IronPort-AV: E=McAfee;i="6000,8403,9692"; a="212351100" X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="212351100" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2020 20:59:08 -0700 IronPort-SDR: HazRA03xUAK8/C2Y+FlbE2O3g5H1UW8dV6qLFW4oHzvb7kwW04QLn2ZzLdYqGfsf0xrEMJri05 jNS2iZzqrpFA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="489405382" Received: from pittner-mobl1.amr.corp.intel.com (HELO localhost.localdomain) ([10.254.77.166]) by fmsmga005.fm.intel.com with ESMTP; 24 Jul 2020 20:59:08 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: [PATCH v8 2/5] ACPI/PCI: Ignore _OSC negotiation result if pcie_ports_native is set. Date: Fri, 24 Jul 2020 20:58:53 -0700 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kuppuswamy Sathyanarayanan pcie_ports_native is set only if user requests native handling of PCIe capabilities via pcie_port_setup command line option. User input takes precedence over _OSC based control negotiation result. So consider the _OSC negotiated result only if pcie_ports_native is unset. Also, since struct pci_host_bridge ->native_* members caches the ownership status of various PCIe capabilities, use them instead of distributed checks for pcie_ports_native. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/acpi/pci_root.c | 61 ++++++++++++++++++++++++++----- drivers/pci/hotplug/pciehp_core.c | 2 +- drivers/pci/pci-acpi.c | 3 -- drivers/pci/pcie/aer.c | 2 +- drivers/pci/pcie/portdrv_core.c | 9 ++--- 5 files changed, 56 insertions(+), 21 deletions(-) diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index f90e841c59f5..f8981d4e044d 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -145,6 +145,17 @@ static struct pci_osc_bit_struct pci_osc_control_bit[] = { { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" }, }; +static char *get_osc_desc(u32 bit) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(pci_osc_control_bit); i++) + if (bit == pci_osc_control_bit[i].bit) + return pci_osc_control_bit[i].desc; + + return NULL; +} + static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word, struct pci_osc_bit_struct *table, int size) { @@ -914,18 +925,48 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, goto out_release_info; host_bridge = to_pci_host_bridge(bus->bridge); - if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) - host_bridge->native_pcie_hotplug = 0; + if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) { + if (!pcie_ports_native) + host_bridge->native_pcie_hotplug = 0; + else + dev_warn(&bus->dev, "OS overrides %s firmware control", + get_osc_desc(OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)); + } + if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL)) host_bridge->native_shpc_hotplug = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL)) - host_bridge->native_aer = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL)) - host_bridge->native_pme = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) - host_bridge->native_ltr = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL)) - host_bridge->native_dpc = 0; + + if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL)) { + if (!pcie_ports_native) + host_bridge->native_aer = 0; + else + dev_warn(&bus->dev, "OS overrides %s firmware control", + get_osc_desc(OSC_PCI_EXPRESS_AER_CONTROL)); + } + + if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL)) { + if (!pcie_ports_native) + host_bridge->native_pme = 0; + else + dev_warn(&bus->dev, "OS overrides %s firmware control", + get_osc_desc(OSC_PCI_EXPRESS_PME_CONTROL)); + } + + if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) { + if (!pcie_ports_native) + host_bridge->native_ltr = 0; + else + dev_warn(&bus->dev, "OS overrides %s firmware control", + get_osc_desc(OSC_PCI_EXPRESS_LTR_CONTROL)); + } + + if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL)) { + if (!pcie_ports_native) + host_bridge->native_dpc = 0; + else + dev_warn(&bus->dev, "OS overrides %s firmware control", + get_osc_desc(OSC_PCI_EXPRESS_DPC_CONTROL)); + } /* * Evaluate the "PCI Boot Configuration" _DSM Function. If it diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index bf779f291f15..5fc999bf6f1b 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c @@ -255,7 +255,7 @@ static bool pme_is_native(struct pcie_device *dev) const struct pci_host_bridge *host; host = pci_find_host_bridge(dev->port->bus); - return pcie_ports_native || host->native_pme; + return host->native_pme; } static void pciehp_disable_interrupt(struct pcie_device *dev) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 7224b1e5f2a8..e09589571a9d 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -800,9 +800,6 @@ bool pciehp_is_native(struct pci_dev *bridge) if (!(slot_cap & PCI_EXP_SLTCAP_HPC)) return false; - if (pcie_ports_native) - return true; - host = pci_find_host_bridge(bridge->bus); return host->native_pcie_hotplug; } diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 3acf56683915..d663bd9c7257 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -219,7 +219,7 @@ int pcie_aer_is_native(struct pci_dev *dev) if (!dev->aer_cap) return 0; - return pcie_ports_native || host->native_aer; + return host->native_aer; } int pci_enable_pcie_error_reporting(struct pci_dev *dev) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 50a9522ab07d..ccd5e0ce5605 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -208,8 +208,7 @@ static int get_port_device_capability(struct pci_dev *dev) struct pci_host_bridge *host = pci_find_host_bridge(dev->bus); int services = 0; - if (dev->is_hotplug_bridge && - (pcie_ports_native || host->native_pcie_hotplug)) { + if (dev->is_hotplug_bridge && host->native_pcie_hotplug) { services |= PCIE_PORT_SERVICE_HP; /* @@ -221,8 +220,7 @@ static int get_port_device_capability(struct pci_dev *dev) } #ifdef CONFIG_PCIEAER - if (dev->aer_cap && pci_aer_available() && - (pcie_ports_native || host->native_aer)) { + if (dev->aer_cap && pci_aer_available() && host->native_aer) { services |= PCIE_PORT_SERVICE_AER; /* @@ -238,8 +236,7 @@ static int get_port_device_capability(struct pci_dev *dev) * Event Collectors can also generate PMEs, but we don't handle * those yet. */ - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && - (pcie_ports_native || host->native_pme)) { + if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && host->native_pme) { services |= PCIE_PORT_SERVICE_PME; /* From patchwork Sat Jul 25 03:58:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11684823 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E4E314E3 for ; Sat, 25 Jul 2020 03:59:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5FF9D22CE3 for ; Sat, 25 Jul 2020 03:59:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726801AbgGYD7R (ORCPT ); Fri, 24 Jul 2020 23:59:17 -0400 Received: from mga06.intel.com ([134.134.136.31]:58731 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726591AbgGYD7K (ORCPT ); Fri, 24 Jul 2020 23:59:10 -0400 IronPort-SDR: gp9ihb3T4NibmM9qWfLfRQJBsXk7WgQQb5r++ZF/1MylBN1hGoYJDMGGbAVQyQdNMCf1mKIE3b xP1LsEhLjpGg== X-IronPort-AV: E=McAfee;i="6000,8403,9692"; a="212351102" X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="212351102" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2020 20:59:09 -0700 IronPort-SDR: UwLvFqOlXXypkRle/n0MkqzBGGB5nHmQNfeTUe2U28k6bxJ/JSNCOunLeagK6JQcXZC7FJRY97 QBBEybBZw9IQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="489405387" Received: from pittner-mobl1.amr.corp.intel.com (HELO localhost.localdomain) ([10.254.77.166]) by fmsmga005.fm.intel.com with ESMTP; 24 Jul 2020 20:59:08 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: [PATCH v8 3/5] ACPI/PCI: Ignore _OSC DPC negotiation result if pcie_ports_dpc_native is set. Date: Fri, 24 Jul 2020 20:58:54 -0700 Message-Id: <875836a97c46fe918e0250cd424841ebadeb3989.1595649348.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kuppuswamy Sathyanarayanan pcie_ports_dpc_native is set only if user requests native handling of PCIe DPC capability via pcie_port_setup command line option. User input takes precedence over _OSC based control negotiation result. So consider the _OSC negotiated result for DPC ownership only if pcie_ports_dpc_native is unset. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/acpi/pci_root.c | 2 +- drivers/pci/pcie/dpc.c | 3 ++- drivers/pci/pcie/portdrv.h | 2 -- drivers/pci/pcie/portdrv_core.c | 2 +- include/linux/pci.h | 2 ++ 5 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index f8981d4e044d..3942bb42cb93 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -961,7 +961,7 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, } if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL)) { - if (!pcie_ports_native) + if (!pcie_ports_native && !pcie_ports_dpc_native) host_bridge->native_dpc = 0; else dev_warn(&bus->dev, "OS overrides %s firmware control", diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index daa9a4153776..5b1025a2994d 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -280,11 +280,12 @@ void pci_dpc_init(struct pci_dev *pdev) static int dpc_probe(struct pcie_device *dev) { struct pci_dev *pdev = dev->port; + struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus); struct device *device = &dev->device; int status; u16 ctl, cap; - if (!pcie_aer_is_native(pdev) && !pcie_ports_dpc_native) + if (!pcie_aer_is_native(pdev) && !host->native_dpc) return -ENOTSUPP; status = devm_request_threaded_irq(device, dev->irq, dpc_irq, diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h index af7cf237432a..0ac20feef24e 100644 --- a/drivers/pci/pcie/portdrv.h +++ b/drivers/pci/pcie/portdrv.h @@ -25,8 +25,6 @@ #define PCIE_PORT_DEVICE_MAXSERVICES 5 -extern bool pcie_ports_dpc_native; - #ifdef CONFIG_PCIEAER int pcie_aer_init(void); int pcie_aer_is_native(struct pci_dev *dev); diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index ccd5e0ce5605..2c0278f0fdcc 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -253,7 +253,7 @@ static int get_port_device_capability(struct pci_dev *dev) */ if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && pci_aer_available() && - (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER))) + (host->native_dpc || (services & PCIE_PORT_SERVICE_AER))) services |= PCIE_PORT_SERVICE_DPC; if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || diff --git a/include/linux/pci.h b/include/linux/pci.h index 34c1c4f45288..fe7ce06a4f40 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1556,9 +1556,11 @@ static inline int pci_irqd_intx_xlate(struct irq_domain *d, #ifdef CONFIG_PCIEPORTBUS extern bool pcie_ports_disabled; extern bool pcie_ports_native; +extern bool pcie_ports_dpc_native; #else #define pcie_ports_disabled true #define pcie_ports_native false +#define pcie_ports_dpc_native false #endif #define PCIE_LINK_STATE_L0S BIT(0) From patchwork Sat Jul 25 03:58:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11684821 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 646131709 for ; Sat, 25 Jul 2020 03:59:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3FEB422CB3 for ; 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24 Jul 2020 20:59:09 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: [PATCH v8 4/5] PCI/portdrv: Remove redundant pci_aer_available() check in DPC enable logic Date: Fri, 24 Jul 2020 20:58:55 -0700 Message-Id: <27b4894d600a36df2522e3edd9dcf9cce6fe72ee.1595649348.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kuppuswamy Sathyanarayanan In DPC service enable logic, check for services & PCIE_PORT_SERVICE_AER implies pci_aer_available() is true. So there is no need to explicitly check it again. Also, passing pcie_ports=dpc-native in kernel command line implies DPC needs to be enabled in native mode irrespective of AER ownership status. So checking for pci_aer_available() without checking for pcie_ports status is incorrect. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/pcie/portdrv_core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 2c0278f0fdcc..e257a2ca3595 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -252,7 +252,6 @@ static int get_port_device_capability(struct pci_dev *dev) * permission to use AER. */ if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && - pci_aer_available() && (host->native_dpc || (services & PCIE_PORT_SERVICE_AER))) services |= PCIE_PORT_SERVICE_DPC; From patchwork Sat Jul 25 03:58:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11684819 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45E31138A for ; Sat, 25 Jul 2020 03:59:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1FBCD22BF5 for ; Sat, 25 Jul 2020 03:59:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726639AbgGYD7M (ORCPT ); Fri, 24 Jul 2020 23:59:12 -0400 Received: from mga06.intel.com ([134.134.136.31]:58731 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726686AbgGYD7K (ORCPT ); Fri, 24 Jul 2020 23:59:10 -0400 IronPort-SDR: Dy+FeIKEuBWltn+mpex+ENUNSmWW2f1MQP3/mDCmEbdH2Cl0BsUM6mjca4/K9dHieEck3OfDDt LPnfyZ8yrnsg== X-IronPort-AV: E=McAfee;i="6000,8403,9692"; a="212351104" X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="212351104" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2020 20:59:10 -0700 IronPort-SDR: xNaUW0AkAw8wKaX/j7mVeEYXYoSRYF+w+b2c086Z7+u4PU2bEnmpwU87QwAxeLWLtUK3dlhoQm tmFyHs/x3wxA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,392,1589266800"; d="scan'208";a="489405396" Received: from pittner-mobl1.amr.corp.intel.com (HELO localhost.localdomain) ([10.254.77.166]) by fmsmga005.fm.intel.com with ESMTP; 24 Jul 2020 20:59:09 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: [PATCH v8 5/5] PCI/DPC: Move AER/DPC dependency checks out of DPC driver Date: Fri, 24 Jul 2020 20:58:56 -0700 Message-Id: <12df4f8e6011cdbb5c0064576cb496151ecf8d5f.1595649348.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kuppuswamy Sathyanarayanan Currently, AER and DPC Capabilities dependency checks is distributed between DPC and portdrv service drivers. So move them out of DPC driver. Also, since services & PCIE_PORT_SERVICE_AER check already ensures AER native ownership, no need to add additional pcie_aer_is_native() check. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/pcie/dpc.c | 3 --- drivers/pci/pcie/portdrv_core.c | 1 + 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 5b1025a2994d..3efbe43764f3 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -285,9 +285,6 @@ static int dpc_probe(struct pcie_device *dev) int status; u16 ctl, cap; - if (!pcie_aer_is_native(pdev) && !host->native_dpc) - return -ENOTSUPP; - status = devm_request_threaded_irq(device, dev->irq, dpc_irq, dpc_handler, IRQF_SHARED, "pcie-dpc", pdev); diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index e257a2ca3595..ffa1d9fc458e 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -252,6 +252,7 @@ static int get_port_device_capability(struct pci_dev *dev) * permission to use AER. */ if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && + host->native_dpc && (host->native_dpc || (services & PCIE_PORT_SERVICE_AER))) services |= PCIE_PORT_SERVICE_DPC;