From patchwork Sat Aug 1 12:30:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 11696057 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7892F138A for ; Sat, 1 Aug 2020 12:31:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5ED502076A for ; Sat, 1 Aug 2020 12:31:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="sohCVxve" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728998AbgHAMbV (ORCPT ); Sat, 1 Aug 2020 08:31:21 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:14255 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728965AbgHAMbV (ORCPT ); Sat, 1 Aug 2020 08:31:21 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1596285081; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=uturfSKxZbvQjzNudApCv3HIvQ0Xf8YorlQetv7wpsc=; b=sohCVxveXkeY54SiX4Ta7R79b5pw4hQkfBYvBgISOtJdTSL2GRjqs77J9XgYoJqBFE/ZBB3+ fhO0IsjO4nW+OZWstNLB6B5nBmgl4NfawWrxSP55MeA/a6mywdprmecGu+5lBTKvI5pnflov oCtszj93Nr9f3jSmmtaCwTwqgXA= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n13.prod.us-east-1.postgun.com with SMTP id 5f2560892c24b37bbe5b964c (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Sat, 01 Aug 2020 12:31:05 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 549A6C433CA; Sat, 1 Aug 2020 12:31:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from blr-ubuntu-253.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id ECD47C43391; Sat, 1 Aug 2020 12:31:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org ECD47C43391 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, jonathan@marek.ca, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH 1/7] dt-bindings: interconnect: Add OSM L3 DT binding on SM8150 Date: Sat, 1 Aug 2020 18:00:43 +0530 Message-Id: <20200801123049.32398-2-sibis@codeaurora.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200801123049.32398-1-sibis@codeaurora.org> References: <20200801123049.32398-1-sibis@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Operation State Manager (OSM) L3 interconnect provider binding on SM8150 SoCs. Signed-off-by: Sibi Sankar Acked-by: Rob Herring --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 91f70c9067d12..b6945c11eb46b 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -19,6 +19,7 @@ properties: enum: - qcom,sc7180-osm-l3 - qcom,sdm845-osm-l3 + - qcom,sm8150-osm-l3 reg: maxItems: 1 From patchwork Sat Aug 1 12:30:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 11696051 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E23E913B6 for ; Sat, 1 Aug 2020 12:31:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C97F62080C for ; Sat, 1 Aug 2020 12:31:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="BxuTrJB9" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728935AbgHAMbK (ORCPT ); Sat, 1 Aug 2020 08:31:10 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:14255 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728743AbgHAMbJ (ORCPT ); Sat, 1 Aug 2020 08:31:09 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1596285068; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=mVmxSFp7kd3V5fOQJG5CkOAtdy9fgnp0DEOyZ54Uj/U=; b=BxuTrJB9ga5CFKOKGWPs3bJ6UEJ1Ims46xMb0nk7cxpRhezcaOAoOPsdPl/8JV2QZ9H3UpT8 Rz4avmYfWj7Xl/tqsIwg7aiGmhbzGym6L6MG/WvnrPTG6g5C+dE7qoa44J3G/dP0bK/D40uQ B47j1u7eSysMnfMCO8kI6K6s1A4= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n17.prod.us-east-1.postgun.com with SMTP id 5f25608c14acd1952bb778c3 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Sat, 01 Aug 2020 12:31:08 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E518CC433CA; Sat, 1 Aug 2020 12:31:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from blr-ubuntu-253.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 70C48C433CB; Sat, 1 Aug 2020 12:31:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 70C48C433CB Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, jonathan@marek.ca, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH 2/7] interconnect: qcom: Add OSM L3 support on SM8150 Date: Sat, 1 Aug 2020 18:00:44 +0530 Message-Id: <20200801123049.32398-3-sibis@codeaurora.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200801123049.32398-1-sibis@codeaurora.org> References: <20200801123049.32398-1-sibis@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Operation State Manager (OSM) L3 interconnect provider support on SM8150 SoCs. Signed-off-by: Sibi Sankar --- drivers/interconnect/qcom/osm-l3.c | 15 +++++++++++++++ drivers/interconnect/qcom/sm8150.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index 96fb9ff5ff2e8..00831c33e0fe5 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -16,6 +16,7 @@ #include "sc7180.h" #include "sdm845.h" +#include "sm8150.h" #define LUT_MAX_ENTRIES 40U #define LUT_SRC GENMASK(31, 30) @@ -96,6 +97,19 @@ static const struct qcom_icc_desc sc7180_icc_osm_l3 = { .num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes), }; +DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3); +DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32); + +static struct qcom_icc_node *sm8150_osm_l3_nodes[] = { + [MASTER_OSM_L3_APPS] = &sm8150_osm_apps_l3, + [SLAVE_OSM_L3] = &sm8150_osm_l3, +}; + +static const struct qcom_icc_desc sm8150_icc_osm_l3 = { + .nodes = sm8150_osm_l3_nodes, + .num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes), +}; + static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) { struct qcom_osm_l3_icc_provider *qp; @@ -258,6 +272,7 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) static const struct of_device_id osm_l3_of_match[] = { { .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 }, { .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 }, + { .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 }, { } }; MODULE_DEVICE_TABLE(of, osm_l3_of_match); diff --git a/drivers/interconnect/qcom/sm8150.h b/drivers/interconnect/qcom/sm8150.h index 3e01ac76ae1db..97996f64d799c 100644 --- a/drivers/interconnect/qcom/sm8150.h +++ b/drivers/interconnect/qcom/sm8150.h @@ -148,5 +148,7 @@ #define SM8150_SLAVE_VSENSE_CTRL_CFG 137 #define SM8150_SNOC_CNOC_MAS 138 #define SM8150_SNOC_CNOC_SLV 139 +#define SM8150_MASTER_OSM_L3_APPS 140 +#define SM8150_SLAVE_OSM_L3 141 #endif From patchwork Sat Aug 1 12:30:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 11696079 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1EE2F138A for ; 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Sat, 1 Aug 2020 12:31:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E7FF0C43391 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, jonathan@marek.ca, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH 3/7] interconnect: qcom: Lay the groundwork for adding EPSS support Date: Sat, 1 Aug 2020 18:00:45 +0530 Message-Id: <20200801123049.32398-4-sibis@codeaurora.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200801123049.32398-1-sibis@codeaurora.org> References: <20200801123049.32398-1-sibis@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Lay the groundwork for adding Epoch Subsystem (EPSS) L3 support on SM8250. Signed-off-by: Sibi Sankar --- drivers/interconnect/qcom/osm-l3.c | 37 +++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 11 deletions(-) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index 00831c33e0fe5..27c9ece52efda 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -21,13 +21,13 @@ #define LUT_MAX_ENTRIES 40U #define LUT_SRC GENMASK(31, 30) #define LUT_L_VAL GENMASK(7, 0) -#define LUT_ROW_SIZE 32 #define CLK_HW_DIV 2 -/* Register offsets */ +/* OSM Register offsets */ #define REG_ENABLE 0x0 -#define REG_FREQ_LUT 0x110 -#define REG_PERF_STATE 0x920 +#define OSM_LUT_ROW_SIZE 32 +#define OSM_REG_FREQ_LUT 0x110 +#define OSM_REG_PERF_STATE 0x920 #define OSM_L3_MAX_LINKS 1 @@ -37,6 +37,7 @@ struct qcom_osm_l3_icc_provider { void __iomem *base; unsigned int max_state; + unsigned int reg_perf_state; unsigned long lut_tables[LUT_MAX_ENTRIES]; struct icc_provider provider; }; @@ -60,6 +61,9 @@ struct qcom_icc_node { struct qcom_icc_desc { struct qcom_icc_node **nodes; size_t num_nodes; + unsigned int lut_row_size; + unsigned int reg_freq_lut; + unsigned int reg_perf_state; }; #define DEFINE_QNODE(_name, _id, _buswidth, ...) \ @@ -82,6 +86,9 @@ static struct qcom_icc_node *sdm845_osm_l3_nodes[] = { static const struct qcom_icc_desc sdm845_icc_osm_l3 = { .nodes = sdm845_osm_l3_nodes, .num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes), + .lut_row_size = OSM_LUT_ROW_SIZE, + .reg_freq_lut = OSM_REG_FREQ_LUT, + .reg_perf_state = OSM_REG_PERF_STATE, }; DEFINE_QNODE(sc7180_osm_apps_l3, SC7180_MASTER_OSM_L3_APPS, 16, SC7180_SLAVE_OSM_L3); @@ -95,6 +102,9 @@ static struct qcom_icc_node *sc7180_osm_l3_nodes[] = { static const struct qcom_icc_desc sc7180_icc_osm_l3 = { .nodes = sc7180_osm_l3_nodes, .num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes), + .lut_row_size = OSM_LUT_ROW_SIZE, + .reg_freq_lut = OSM_REG_FREQ_LUT, + .reg_perf_state = OSM_REG_PERF_STATE, }; DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3); @@ -108,6 +118,9 @@ static struct qcom_icc_node *sm8150_osm_l3_nodes[] = { static const struct qcom_icc_desc sm8150_icc_osm_l3 = { .nodes = sm8150_osm_l3_nodes, .num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes), + .lut_row_size = OSM_LUT_ROW_SIZE, + .reg_freq_lut = OSM_REG_FREQ_LUT, + .reg_perf_state = OSM_REG_PERF_STATE, }; static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) @@ -138,7 +151,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) break; } - writel_relaxed(index, qp->base + REG_PERF_STATE); + writel_relaxed(index, qp->base + qp->reg_perf_state); return 0; } @@ -193,9 +206,15 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) return -ENODEV; } + desc = device_get_match_data(&pdev->dev); + if (!desc) + return -EINVAL; + + qp->reg_perf_state = desc->reg_perf_state; + for (i = 0; i < LUT_MAX_ENTRIES; i++) { - info = readl_relaxed(qp->base + REG_FREQ_LUT + - i * LUT_ROW_SIZE); + info = readl_relaxed(qp->base + desc->reg_freq_lut + + i * desc->lut_row_size); src = FIELD_GET(LUT_SRC, info); lval = FIELD_GET(LUT_L_VAL, info); if (src) @@ -214,10 +233,6 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) } qp->max_state = i; - desc = device_get_match_data(&pdev->dev); - if (!desc) - return -EINVAL; - qnodes = desc->nodes; num_nodes = desc->num_nodes; From patchwork Sat Aug 1 12:30:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 11696061 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C6FE213B6 for ; Sat, 1 Aug 2020 12:31:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ACCCD2177B for ; Sat, 1 Aug 2020 12:31:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="K9AR4NNu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729056AbgHAMb2 (ORCPT ); Sat, 1 Aug 2020 08:31:28 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:63065 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729031AbgHAMb1 (ORCPT ); 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Sat, 1 Aug 2020 12:31:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6BD75C43395 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, jonathan@marek.ca, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH 4/7] dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250 Date: Sat, 1 Aug 2020 18:00:46 +0530 Message-Id: <20200801123049.32398-5-sibis@codeaurora.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200801123049.32398-1-sibis@codeaurora.org> References: <20200801123049.32398-1-sibis@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SM8250 SoCs. Signed-off-by: Sibi Sankar Acked-by: Rob Herring --- .../devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + include/dt-bindings/interconnect/qcom,osm-l3.h | 3 +++ 2 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index b6945c11eb46b..d6a95c3cb26f2 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -20,6 +20,7 @@ properties: - qcom,sc7180-osm-l3 - qcom,sdm845-osm-l3 - qcom,sm8150-osm-l3 + - qcom,sm8250-epss-l3 reg: maxItems: 1 diff --git a/include/dt-bindings/interconnect/qcom,osm-l3.h b/include/dt-bindings/interconnect/qcom,osm-l3.h index 54858ff7674d7..61ef649ae5655 100644 --- a/include/dt-bindings/interconnect/qcom,osm-l3.h +++ b/include/dt-bindings/interconnect/qcom,osm-l3.h @@ -9,4 +9,7 @@ #define MASTER_OSM_L3_APPS 0 #define SLAVE_OSM_L3 1 +#define MASTER_EPSS_L3_APPS 0 +#define SLAVE_EPSS_L3_SHARED 1 + #endif From patchwork Sat Aug 1 12:30:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 11696071 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2E97113B6 for ; Sat, 1 Aug 2020 12:31:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1598F20888 for ; Sat, 1 Aug 2020 12:31:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="xHKbachF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729048AbgHAMbk (ORCPT ); Sat, 1 Aug 2020 08:31:40 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:59426 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729053AbgHAMb2 (ORCPT ); Sat, 1 Aug 2020 08:31:28 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1596285087; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=T3gsh8DJJ2SBdn1sHsz2kpKTvtzE7ro3caTw1+lXGdA=; b=xHKbachF3bYG32GXXEQjQ1xPuynSoSEyJIM0mOsHNQOfFj+5fvf+hEaYMf+mYXvdKXj6naw2 wB0XnQTj1tNYemxpXtvtkiw3rADCRiKJP6wUj18ZVtRHCHyLfh/bqzGRBLR7bHFQg9FY1tXm +kia0D1YO96ZDuEXsWVKDRUfWk0= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n13.prod.us-east-1.postgun.com with SMTP id 5f256098d2bd131f68145830 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Sat, 01 Aug 2020 12:31:20 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E19DCC433A0; Sat, 1 Aug 2020 12:31:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from blr-ubuntu-253.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id E4834C433AF; Sat, 1 Aug 2020 12:31:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E4834C433AF Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, jonathan@marek.ca, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH 5/7] interconnect: qcom: Add EPSS L3 support on SM8250 Date: Sat, 1 Aug 2020 18:00:47 +0530 Message-Id: <20200801123049.32398-6-sibis@codeaurora.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200801123049.32398-1-sibis@codeaurora.org> References: <20200801123049.32398-1-sibis@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Epoch Subsystem (EPSS) L3 interconnect provider support on SM8250 SoCs. Signed-off-by: Sibi Sankar --- drivers/interconnect/qcom/osm-l3.c | 23 +++++++++++++++++++++++ drivers/interconnect/qcom/sm8250.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index 27c9ece52efda..cbf4ef04491df 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -17,6 +17,7 @@ #include "sc7180.h" #include "sdm845.h" #include "sm8150.h" +#include "sm8250.h" #define LUT_MAX_ENTRIES 40U #define LUT_SRC GENMASK(31, 30) @@ -29,6 +30,11 @@ #define OSM_REG_FREQ_LUT 0x110 #define OSM_REG_PERF_STATE 0x920 +/* EPSS Register offsets */ +#define EPSS_LUT_ROW_SIZE 4 +#define EPSS_REG_FREQ_LUT 0x100 +#define EPSS_REG_PERF_STATE 0x320 + #define OSM_L3_MAX_LINKS 1 #define to_qcom_provider(_provider) \ @@ -123,6 +129,22 @@ static const struct qcom_icc_desc sm8150_icc_osm_l3 = { .reg_perf_state = OSM_REG_PERF_STATE, }; +DEFINE_QNODE(sm8250_epss_apps_l3, SM8250_MASTER_EPSS_L3_APPS, 32, SM8250_SLAVE_EPSS_L3); +DEFINE_QNODE(sm8250_epss_l3, SM8250_SLAVE_EPSS_L3, 32); + +static struct qcom_icc_node *sm8250_epss_l3_nodes[] = { + [MASTER_EPSS_L3_APPS] = &sm8250_epss_apps_l3, + [SLAVE_EPSS_L3_SHARED] = &sm8250_epss_l3, +}; + +static const struct qcom_icc_desc sm8250_icc_epss_l3 = { + .nodes = sm8250_epss_l3_nodes, + .num_nodes = ARRAY_SIZE(sm8250_epss_l3_nodes), + .lut_row_size = EPSS_LUT_ROW_SIZE, + .reg_freq_lut = EPSS_REG_FREQ_LUT, + .reg_perf_state = EPSS_REG_PERF_STATE, +}; + static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) { struct qcom_osm_l3_icc_provider *qp; @@ -288,6 +310,7 @@ static const struct of_device_id osm_l3_of_match[] = { { .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 }, { .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 }, { .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 }, + { .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 }, { } }; MODULE_DEVICE_TABLE(of, osm_l3_of_match); diff --git a/drivers/interconnect/qcom/sm8250.h b/drivers/interconnect/qcom/sm8250.h index 7eb6c709c30d1..b31fb431a20fc 100644 --- a/drivers/interconnect/qcom/sm8250.h +++ b/drivers/interconnect/qcom/sm8250.h @@ -158,5 +158,7 @@ #define SM8250_SLAVE_VSENSE_CTRL_CFG 147 #define SM8250_SNOC_CNOC_MAS 148 #define SM8250_SNOC_CNOC_SLV 149 +#define SM8250_MASTER_EPSS_L3_APPS 150 +#define SM8250_SLAVE_EPSS_L3 151 #endif From patchwork Sat Aug 1 12:30:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 11696065 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 203F713B6 for ; Sat, 1 Aug 2020 12:31:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0769222B4E for ; Sat, 1 Aug 2020 12:31:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="tbTHZAJK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729110AbgHAMbd (ORCPT ); Sat, 1 Aug 2020 08:31:33 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:63065 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729038AbgHAMbc (ORCPT ); Sat, 1 Aug 2020 08:31:32 -0400 DKIM-Signature: a=rsa-sha256; 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Sat, 1 Aug 2020 12:31:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8503CC433AD Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, jonathan@marek.ca, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH 6/7] arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider Date: Sat, 1 Aug 2020 18:00:48 +0530 Message-Id: <20200801123049.32398-7-sibis@codeaurora.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200801123049.32398-1-sibis@codeaurora.org> References: <20200801123049.32398-1-sibis@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Operation State Manager (OSM) L3 interconnect provider node on SM8150 SoCs. Signed-off-by: Sibi Sankar Acked-by: Georgi Djakov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 0f6d84e8fd299..8563afd205ee9 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -1184,6 +1185,16 @@ apps_bcm_voter: bcm_voter { }; }; + osm_l3: interconnect@18321000 { + compatible = "qcom,sm8150-osm-l3"; + reg = <0 0x18321000 0 0x1400>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@18323000 { compatible = "qcom,cpufreq-hw"; reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>, From patchwork Sat Aug 1 12:30:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 11696075 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B92A2138A for ; Sat, 1 Aug 2020 12:31:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A069E2080C for ; Sat, 1 Aug 2020 12:31:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="KLkOCfXz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728889AbgHAMbt (ORCPT ); Sat, 1 Aug 2020 08:31:49 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:59426 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729134AbgHAMbs (ORCPT ); Sat, 1 Aug 2020 08:31:48 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1596285108; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=Baqm8dth5qwp6+8TbHMunp+3b66zCxUrZAIoJWJc8dU=; b=KLkOCfXzM2SMzWdOdZurjVeUsWEcv8ghUl22xMy5a0oItaQQAm41UTyZLvyLk9vAYvqrHmHX bauoaR02SdeQKs9E6ciy9tcPqzQOBZIqlCHZFSbhApkk2fRgqEouUBUYsddnHQyiUHiDjpbq 0GqErO2iqd61WofWx41+t16Gybg= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-east-1.postgun.com with SMTP id 5f25609f9403087e104bcf44 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Sat, 01 Aug 2020 12:31:27 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 70A59C433B7; Sat, 1 Aug 2020 12:31:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from blr-ubuntu-253.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 243E8C433A1; Sat, 1 Aug 2020 12:31:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 243E8C433A1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, jonathan@marek.ca, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH 7/7] arm64: dts: qcom: sm8250: Add EPSS L3 interconnect provider Date: Sat, 1 Aug 2020 18:00:49 +0530 Message-Id: <20200801123049.32398-8-sibis@codeaurora.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200801123049.32398-1-sibis@codeaurora.org> References: <20200801123049.32398-1-sibis@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Epoch Subsystem (EPSS) L3 interconnect provider node on SM8250 SoCs. Signed-off-by: Sibi Sankar --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 73f02f712d035..2bcdb7a3b9fef 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -2150,6 +2151,16 @@ apps_bcm_voter: bcm_voter { compatible = "qcom,bcm-voter"; }; }; + + epss_l3: interconnect@18591000 { + compatible = "qcom,sm8250-epss-l3"; + reg = <0 0x18590000 0 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; }; timer {