From patchwork Tue Aug 11 13:07:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ani Sinha X-Patchwork-Id: 11709229 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66F891392 for ; Tue, 11 Aug 2020 13:08:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF45420838 for ; Tue, 11 Aug 2020 13:08:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=anisinha-ca.20150623.gappssmtp.com header.i=@anisinha-ca.20150623.gappssmtp.com header.b="FOPRr3cS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EF45420838 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=anisinha.ca Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:56864 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k5U1E-0001A0-QR for patchwork-qemu-devel@patchwork.kernel.org; Tue, 11 Aug 2020 09:08:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46662) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k5U0m-0000lB-Ml for qemu-devel@nongnu.org; Tue, 11 Aug 2020 09:08:16 -0400 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]:33187) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k5U0k-0001W0-Gp for qemu-devel@nongnu.org; Tue, 11 Aug 2020 09:08:16 -0400 Received: by mail-pf1-x444.google.com with SMTP id u20so7591898pfn.0 for ; Tue, 11 Aug 2020 06:08:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=anisinha-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=lNAlyUx1KKN8L+QHc/YPMFz4nZUQ5XpYyE5kBhBIVSo=; b=FOPRr3cSs9SNy+aDRULlVzPVlHNz6A7Zvoo3cdZC1b4l8a7kI0TYWMM3XbvQW8ouzP uo3jlgSyhQ4bgmQU07WpM5VU27NWP/tTdsSM2zkF5JnEYHa0sV3fpS0AYBjca0aRgww0 f0BhE0coOowR1B3pALUmk+GznWD+DktTLlonXkyqY8eOCYN0/OFdQ2W9hom2E67moMMI nxpZxd0h0wdVP5NcKJczV99wGzOyFmLfQaNudNWKFl+8Z7DQBVM5yNjWr7rHUmdXfT0B 9BctSjcvHbDx9JMii1uV0dZkGQagHWfsya1c5sno6DSoo8fYljn3BDyR2K6lZsDga98v 5SMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=lNAlyUx1KKN8L+QHc/YPMFz4nZUQ5XpYyE5kBhBIVSo=; b=Gvpvxp4JXU/xYjMfe+iIXv2tH6+rF8Be0qgHpNDXrwwe//rxa/0HlCA7eO8otoIL1v d8txZqSGT9pjlFGdXp9jmNJPT0mfI4Tfk0gUuDi38+kGeIoHt+5pl1gBRFxGBWIyVYL5 vlMPm32qc66+CHfBOs3xraRf2VXD0MSUqy0OHl4qTxl5Fm0kaMaSyUMH3Q94m1G2Vrdm 41JRM7Vc/fnrWIt97ywGy2q3o7E82xK5WHSKAgyZRqyAiSxSQvMj5X2xCoXaUoC6DDjM TwyIHvjP98KVqf09nX6z4RHPRF5T4d+Cb0n16TEzvmf8x1Ga0DkRVwynV8Xn0JAiGaRS hOCQ== X-Gm-Message-State: AOAM530tT4C3qIkgTI5rH2w9zw3CoVbGnLxXcf22eyC8jdAKQsWjK7PK rtqXq7XliLwFQ2ym62EZwBE0Wcf97VTr7w== X-Google-Smtp-Source: ABdhPJwiaU7n94OptQi8FleTQD0tL4Tkj2Zkqaegts8ebdZtDMHn8sc06WNCv3CMZVEPetaYQI4+6A== X-Received: by 2002:aa7:8608:: with SMTP id p8mr5956484pfn.62.1597151291512; Tue, 11 Aug 2020 06:08:11 -0700 (PDT) Received: from localhost.localdomain ([115.96.145.67]) by smtp.gmail.com with ESMTPSA id c15sm25124281pfo.115.2020.08.11.06.08.06 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Aug 2020 06:08:10 -0700 (PDT) From: Ani Sinha To: qemu-devel@nongnu.org Subject: [PATCH] Introduce a new flag for piix to disable root bus PCI hotplug Date: Tue, 11 Aug 2020 18:37:55 +0530 Message-Id: <1597151275-75653-1-git-send-email-ani@anisinha.ca> X-Mailer: git-send-email 2.7.4 Received-SPF: none client-ip=2607:f8b0:4864:20::444; envelope-from=ani@anisinha.ca; helo=mail-pf1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , Aleksandar Markovic , Paolo Bonzini , ani@anisinha.ca, Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" We introduce a new global flag for PIIX with which we can turn on or off PCI device hotplug on the root bus. This flag can be used to prevent all PCI devices from getting hotplugged or unplugged from the root PCI bus. Signed-off-by: Ani Sinha --- hw/acpi/piix4.c | 3 +++ hw/i386/acpi-build.c | 23 ++++++++++++++++++----- 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 26bac4f..94ec35a 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -78,6 +78,7 @@ typedef struct PIIX4PMState { AcpiPciHpState acpi_pci_hotplug; bool use_acpi_hotplug_bridge; + bool use_acpi_root_pci_hotplug; uint8_t disable_s3; uint8_t disable_s4; @@ -635,6 +636,8 @@ static Property piix4_pm_properties[] = { DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2), DEFINE_PROP_BOOL("acpi-pci-hotplug-with-bridge-support", PIIX4PMState, use_acpi_hotplug_bridge, true), + DEFINE_PROP_BOOL("acpi-root-pci-hotplug", PIIX4PMState, + use_acpi_root_pci_hotplug, true), DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState, acpi_memory_hotplug.is_enabled, true), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b7bcbbb..1881009 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -95,6 +95,7 @@ typedef struct AcpiPmInfo { bool s3_disabled; bool s4_disabled; bool pcihp_bridge_en; + bool pcihp_root_en; uint8_t s4_val; AcpiFadtData fadt; uint16_t cpu_hp_io_base; @@ -245,6 +246,9 @@ static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm) pm->pcihp_bridge_en = object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support", NULL); + pm->pcihp_root_en = + object_property_get_bool(obj, "acpi-root-pci-hotplug", NULL); + } static void acpi_get_misc_info(AcpiMiscInfo *info) @@ -337,14 +341,18 @@ static void build_append_pcihp_notify_entry(Aml *method, int slot) } static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus, - bool pcihp_bridge_en) + bool pcihp_bridge_en, + bool pcihp_root_en) { Aml *dev, *notify_method = NULL, *method; QObject *bsel; PCIBus *sec; int i; + bool root_bus = pci_bus_is_root(bus); + bool root_pcihp_disabled = (root_bus && !pcihp_root_en); - bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL); + bsel = object_property_get_qobject(OBJECT(bus), + ACPI_PCIHP_PROP_BSEL, NULL); if (bsel) { uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel)); @@ -361,6 +369,9 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus, bool bridge_in_acpi; if (!pdev) { + /* skip if pci hotplug for the root bus is disabled */ + if (root_pcihp_disabled) + continue; if (bsel) { /* add hotplug slots for non present devices */ dev = aml_device("S%.02X", PCI_DEVFN(slot, 0)); aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); @@ -419,7 +430,7 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus, method = aml_method("_S3D", 0, AML_NOTSERIALIZED); aml_append(method, aml_return(aml_int(s3d))); aml_append(dev, method); - } else if (hotplug_enabled_dev) { + } else if (hotplug_enabled_dev && !root_pcihp_disabled) { /* add _SUN/_EJ0 to make slot hotpluggable */ aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); @@ -439,7 +450,8 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus, */ PCIBus *sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); - build_append_pci_bus_devices(dev, sec_bus, pcihp_bridge_en); + build_append_pci_bus_devices(dev, sec_bus, pcihp_bridge_en, + pcihp_root_en); } /* slot descriptor has been composed, add it into parent context */ aml_append(parent_scope, dev); @@ -1818,7 +1830,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, if (bus) { Aml *scope = aml_scope("PCI0"); /* Scan all PCI buses. Generate tables to support hotplug. */ - build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en); + build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en, + pm->pcihp_root_en); if (TPM_IS_TIS_ISA(tpm)) { if (misc->tpm_version == TPM_VERSION_2_0) {