From patchwork Wed Aug 19 08:17:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11725721 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0237214F6 for ; Thu, 20 Aug 2020 07:16:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D52A720786 for ; Thu, 20 Aug 2020 07:16:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="IdJvEcOu" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D52A720786 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C66AC6E8EE; Thu, 20 Aug 2020 07:15:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [95.129.51.170]) by gabe.freedesktop.org (Postfix) with ESMTPS id D7AD66E1F9 for ; Wed, 19 Aug 2020 08:22:45 +0000 (UTC) Received: from mxout3.routing.net (unknown [192.168.10.111]) by backup.mxwww.masterlogin.de (Postfix) with ESMTPS id 7E7BA2C69D for ; Wed, 19 Aug 2020 08:18:03 +0000 (UTC) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout3.routing.net (Postfix) with ESMTP id DCAD360090; Wed, 19 Aug 2020 08:17:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597825080; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sfRT6Jdl5DYhGl5q2Gfdj5vkPkIaNa57DcrwbMLC9oE=; b=IdJvEcOu+ws9otAGTUsoMhlVHJ4qbu5NvQuUIgth9c9ZfTkZ2AHCQne8FryOD0+mHjDKBL 8m3z6Ob7wF/na07aS87171uwMtvi+F8wXG2/wPC7nh2eI1MuyoLD69MSIM1SMcmgR+jrjP sVTxheILoADgswXdlG84u8YpVE/aDQU= Received: from localhost.localdomain (fttx-pool-185.76.97.101.bambit.de [185.76.97.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 3209310054E; Wed, 19 Aug 2020 08:17:59 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v5 1/7] dt-bindings: mediatek: add mt7623 display-nodes Date: Wed, 19 Aug 2020 10:17:46 +0200 Message-Id: <20200819081752.4805-2-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819081752.4805-1-linux@fw-web.de> References: <20200819081752.4805-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 20 Aug 2020 07:14:47 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , Frank Wunderlich , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Frank Wunderlich mt7623 uses mt2701/mt8173 for drm, but have own compatibles Signed-off-by: Frank Wunderlich Acked-by: Rob Herring Reviewed-by: Chun-Kuang Hu --- .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dpi.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 4 ++-- .../devicetree/bindings/display/mediatek/mediatek,hdmi.txt | 4 ++++ 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index b91e709db7a4..121220745d46 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -43,7 +43,7 @@ Required properties (all function blocks): "mediatek,-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,-disp-mutex" - display mutex "mediatek,-disp-od" - overdrive - the supported chips are mt2701, mt2712 and mt8173. + the supported chips are mt2701, mt7623, mt2712 and mt8173. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks). diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt index 77def4456706..dc1ebd13cc88 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt @@ -7,7 +7,7 @@ output bus. Required properties: - compatible: "mediatek,-dpi" - the supported chips are mt2701 , mt8173 and mt8183. + the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index 8e4729de8c85..f06f24d405a5 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -7,7 +7,7 @@ channel output. Required properties: - compatible: "mediatek,-dsi" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks @@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,-mipi-tx" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, 7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoder diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt index 7b124242b0c5..6b1c586403e4 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt @@ -6,6 +6,7 @@ its parallel input. Required properties: - compatible: Should be "mediatek,-hdmi". +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks @@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication. Required properties: - compatible: Should be "mediatek,-cec" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clock @@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices. Required properties: - compatible: Should be "mediatek,-hdmi-ddc" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - clocks: device clock - clock-names: Should be "ddc-i2c". @@ -56,6 +59,7 @@ output and drives the HDMI pads. Required properties: - compatible: "mediatek,-hdmi-phy" +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the module's registers - clocks: PLL reference clock - clock-names: must contain "pll_ref" From patchwork Wed Aug 19 08:17:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11725659 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D30F618 for ; Thu, 20 Aug 2020 07:15:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C558206DA for ; Thu, 20 Aug 2020 07:15:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="ySkla1aR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C558206DA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 729B26E8B2; Thu, 20 Aug 2020 07:14:48 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [95.129.51.170]) by gabe.freedesktop.org (Postfix) with ESMTPS id 71BB76E20D for ; Wed, 19 Aug 2020 08:20:33 +0000 (UTC) Received: from mxout2.routing.net (unknown [192.168.10.82]) by backup.mxwww.masterlogin.de (Postfix) with ESMTPS id 116FE2C6A2 for ; Wed, 19 Aug 2020 08:18:04 +0000 (UTC) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout2.routing.net (Postfix) with ESMTP id 9A3CA5FA67; Wed, 19 Aug 2020 08:18:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597825080; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ds7XnKX+bqH2VkRPifcHXESaPz03te6uVWAvUOl32R0=; b=ySkla1aRE7AZ2s0mZi8YaD3ILgpg37tqRiYTVDFQ+thqdhkAktB8/FvChqSSGS9fjg1EcP FcDHwoXH4qKxAs0A9XJse9fzm6Vgq0rCb7n4s4CFKD9cg2SQFJdk09/uWbi4M6dW3F00of fceqAWRMJ6awtSfuakJ30cBNxzZIqlI= Received: from localhost.localdomain (fttx-pool-185.76.97.101.bambit.de [185.76.97.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id E571310058A; Wed, 19 Aug 2020 08:17:59 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v5 2/7] drm/mediatek: add ddp routing for mt7623 Date: Wed, 19 Aug 2020 10:17:47 +0200 Message-Id: <20200819081752.4805-3-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819081752.4805-1-linux@fw-web.de> References: <20200819081752.4805-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 20 Aug 2020 07:14:47 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , Frank Wunderlich , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Frank Wunderlich on BPi-R2/mt7623 main-path have to be routed to DPI0 (hdmi) instead of DSI0 using compatible "mt7623-mmsys" already defined in dts Signed-off-by: Frank Wunderlich Reviewed-by: Chun-Kuang Hu --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 040a8f393fe2..2350e3200b59 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -74,6 +74,19 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { DDP_COMPONENT_DPI0, }; +static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = { + DDP_COMPONENT_OVL0, + DDP_COMPONENT_RDMA0, + DDP_COMPONENT_COLOR0, + DDP_COMPONENT_BLS, + DDP_COMPONENT_DPI0, +}; + +static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = { + DDP_COMPONENT_RDMA1, + DDP_COMPONENT_DSI0, +}; + static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0, @@ -127,6 +140,14 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .shadow_register = true, }; +static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = { + .main_path = mt7623_mtk_ddp_main, + .main_len = ARRAY_SIZE(mt7623_mtk_ddp_main), + .ext_path = mt7623_mtk_ddp_ext, + .ext_len = ARRAY_SIZE(mt7623_mtk_ddp_ext), + .shadow_register = true, +}; + static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { .main_path = mt2712_mtk_ddp_main, .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main), @@ -422,6 +443,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { static const struct of_device_id mtk_drm_of_ids[] = { { .compatible = "mediatek,mt2701-mmsys", .data = &mt2701_mmsys_driver_data}, + { .compatible = "mediatek,mt7623-mmsys", + .data = &mt7623_mmsys_driver_data}, { .compatible = "mediatek,mt2712-mmsys", .data = &mt2712_mmsys_driver_data}, { .compatible = "mediatek,mt8173-mmsys", From patchwork Wed Aug 19 08:17:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11725683 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 68F23618 for ; Thu, 20 Aug 2020 07:15:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 47FD520786 for ; Thu, 20 Aug 2020 07:15:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="xoykxp/X" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 47FD520786 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4B5E6E8C1; Thu, 20 Aug 2020 07:14:51 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [95.129.51.170]) by gabe.freedesktop.org (Postfix) with ESMTPS id 230606E1F9 for ; Wed, 19 Aug 2020 08:22:26 +0000 (UTC) Received: from mxout4.routing.net (unknown [192.168.10.112]) by backup.mxwww.masterlogin.de (Postfix) with ESMTPS id 48CEE2C6A7 for ; Wed, 19 Aug 2020 08:18:05 +0000 (UTC) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout4.routing.net (Postfix) with ESMTP id 742481014B3; Wed, 19 Aug 2020 08:18:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597825081; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Tvt7koxlgmMWFSYlV9RwSNCWybA13LVEGNqsglV8N/o=; b=xoykxp/XbV/PvzxMAHTHFOW/uuihX5MXhUi3YJG3M91OxzHrW8bYyyDNtq0SqvzFYTUELP Asz89iZbCbUm+L4QyeQ9AGFbNi+7qe3v72OYuvSRzYPdd2kgg7yqsFUMqCf+39bdkmWgIN 0NPaRhz3wbuVGiyP8wkisrL/44qvy0Y= Received: from localhost.localdomain (fttx-pool-185.76.97.101.bambit.de [185.76.97.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 99F9A10054E; Wed, 19 Aug 2020 08:18:00 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v5 3/7] drm/mediatek: disable tmds on mt2701 Date: Wed, 19 Aug 2020 10:17:48 +0200 Message-Id: <20200819081752.4805-4-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819081752.4805-1-linux@fw-web.de> References: <20200819081752.4805-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 20 Aug 2020 07:14:47 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , Frank Wunderlich , David Airlie , chunhui dai , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: chunhui dai disable tmds on phy on mt2701 to support other resolutions like 1280x1024 Signed-off-by: chunhui dai Signed-off-by: Frank Wunderlich Tested-by: Frank Wunderlich --- drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +++ drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 + drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 + 3 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c index 5223498502c4..edadb7a700f1 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c @@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev) return PTR_ERR(phy_provider); } + if (hdmi_phy->conf->pll_default_off) + hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy); + return of_clk_add_provider(dev->of_node, of_clk_src_simple_get, hdmi_phy->pll); } diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h index 2d8b3182470d..f472fdeb63dc 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h @@ -22,6 +22,7 @@ struct mtk_hdmi_phy; struct mtk_hdmi_phy_conf { bool tz_disabled; unsigned long flags; + bool pll_default_off; const struct clk_ops *hdmi_phy_clk_ops; void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy); void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy); diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c index d3cc4022e988..6fbedacfc1e8 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c @@ -239,6 +239,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy) struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = { .tz_disabled = true, .flags = CLK_SET_RATE_GATE, + .pll_default_off = true, .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops, .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds, .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds, From patchwork Wed Aug 19 08:17:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11725675 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A3050618 for ; Thu, 20 Aug 2020 07:15:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 817DC20786 for ; Thu, 20 Aug 2020 07:15:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="vjUoPMp+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 817DC20786 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 194DB6E8BA; Thu, 20 Aug 2020 07:14:49 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [IPv6:2a03:2900:1:1::a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 09F8C6E204 for ; Wed, 19 Aug 2020 08:20:03 +0000 (UTC) Received: from mxout2.routing.net (unknown [192.168.10.82]) by backup.mxwww.masterlogin.de (Postfix) with ESMTPS id 945A82C6A9 for ; Wed, 19 Aug 2020 08:18:05 +0000 (UTC) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout2.routing.net (Postfix) with ESMTP id 58E385FA8E; Wed, 19 Aug 2020 08:18:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597825082; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fCnnVcg/G7GdQeEsbRfkh+kAyhmqBcsohyCq/tDvKFE=; b=vjUoPMp+9XfEPRWmYrmUWhu6Uw/jLdSKBUxWfiu4QLed6scFY7gTJfFYXacf99d/9LiUm6 TNUC/lAVlEisZIkgneLnPrXoLs18FN5Ks8XAnp7CBpv/4Bg8zWx84/j3cDhFirFLD0Gk7K VAHFEqyTe/4daKSB82ass/Sec6QmSXc= Received: from localhost.localdomain (fttx-pool-185.76.97.101.bambit.de [185.76.97.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 7409610058A; Wed, 19 Aug 2020 08:18:01 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v5 4/7] drm/mediatek: Add get_possible_crtc API for dpi, dsi Date: Wed, 19 Aug 2020 10:17:49 +0200 Message-Id: <20200819081752.4805-5-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819081752.4805-1-linux@fw-web.de> References: <20200819081752.4805-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 20 Aug 2020 07:14:47 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , Frank Wunderlich , David Airlie , Stu Hsieh , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Stu Hsieh For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so search pipeline information to find out the correct possible crtc. Signed-off-by: Stu Hsieh Signed-off-by: Frank Wunderlich Reviewed-by: Chun-Kuang Hu --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 42 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 + 2 files changed, 44 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 57c88de9a329..a5f2ff6bea93 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -13,6 +13,8 @@ #include #include #include +#include + #include "mtk_drm_drv.h" #include "mtk_drm_plane.h" #include "mtk_drm_ddp_comp.h" @@ -412,6 +414,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL }, }; +static bool mtk_drm_find_comp_in_ddp(struct mtk_ddp_comp ddp_comp, + const enum mtk_ddp_comp_id *path, + unsigned int path_len) +{ + unsigned int i; + + if (path == NULL) + return false; + + for (i = 0U; i < path_len; i++) + if (ddp_comp.id == path[i]) + return true; + + return false; +} + int mtk_ddp_comp_get_id(struct device_node *node, enum mtk_ddp_comp_type comp_type) { @@ -427,6 +445,30 @@ int mtk_ddp_comp_get_id(struct device_node *node, return -EINVAL; } +unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm, + struct mtk_ddp_comp ddp_comp) +{ + struct mtk_drm_private *private = drm->dev_private; + unsigned int ret; + + if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->main_path, + private->data->main_len) == true) { + ret = BIT(0); + } else if (mtk_drm_find_comp_in_ddp(ddp_comp, + private->data->ext_path, + private->data->ext_len) == true) { + ret = BIT(1); + } else if (mtk_drm_find_comp_in_ddp(ddp_comp, + private->data->third_path, + private->data->third_len) == true) { + ret = BIT(2); + } else { + DRM_INFO("Failed to find comp in ddp table\n"); + ret = 0; + } + return ret; +} + int mtk_ddp_comp_init(struct device *dev, struct device_node *node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index debe36395fe7..1d9e00b69462 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -202,6 +202,8 @@ static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp, int mtk_ddp_comp_get_id(struct device_node *node, enum mtk_ddp_comp_type comp_type); +unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm, + struct mtk_ddp_comp ddp_comp); int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs); From patchwork Wed Aug 19 08:17:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11725705 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 455B9618 for ; Thu, 20 Aug 2020 07:16:14 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2443720786 for ; Thu, 20 Aug 2020 07:16:14 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Wed, 19 Aug 2020 08:18:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597825083; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aCIlZODk5CSAwOc0oa7YsTzGruTJxzQQ2MBZTDAe50c=; b=TGODLM/+DQUi0GN/TEgV+98HceT/MdPymhyoV0SguSciXP7JkC2kJhD2P2yR6M6UaXHuVN bogFj6wLd3pAs2iQHYNrB0GN/rClAVKiaA+JfUlEF/tpzq6/E8FImc4lJlGOdBQKEP2f0v yObU5Urle4WUcmzObvkXwZd59k54iyU= Received: from localhost.localdomain (fttx-pool-185.76.97.101.bambit.de [185.76.97.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 5DDF910007C; Wed, 19 Aug 2020 08:18:02 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v5 5/7] drm/mediatek: dpi/dsi: change the getting possible_crtc way Date: Wed, 19 Aug 2020 10:17:50 +0200 Message-Id: <20200819081752.4805-6-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819081752.4805-1-linux@fw-web.de> References: <20200819081752.4805-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 20 Aug 2020 07:14:47 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , Jitao Shi , Frank Wunderlich , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Jitao Shi For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so call mtk_drm_find_possible_crtc_by_comp() to find out the correct possible crtc. Signed-off-by: Jitao Shi Signed-off-by: Frank Wunderlich Reviewed-by: Chun-Kuang Hu --- drivers/gpu/drm/mediatek/mtk_dpi.c | 3 ++- drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index d4f0fb7ad312..e43977015843 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -608,7 +608,8 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data) drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs); /* Currently DPI0 is fixed to be driven by OVL1 */ - dpi->encoder.possible_crtcs = BIT(1); + dpi->encoder.possible_crtcs = + mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp); ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL, 0); if (ret) { diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 16fd99dcdacf..c9f4ad029cb1 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -974,7 +974,8 @@ static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi) * Currently display data paths are statically assigned to a crtc each. * crtc 0 is OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 */ - dsi->encoder.possible_crtcs = 1; + dsi->encoder.possible_crtcs = + mtk_drm_find_possible_crtc_by_comp(drm, dsi->ddp_comp); ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL, DRM_BRIDGE_ATTACH_NO_CONNECTOR); From patchwork Wed Aug 19 08:17:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11725701 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0CF19618 for ; Thu, 20 Aug 2020 07:16:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E067C207DE for ; Thu, 20 Aug 2020 07:16:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="iScmRo7M" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E067C207DE Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2CBE76E8E6; Thu, 20 Aug 2020 07:14:54 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [95.129.51.170]) by gabe.freedesktop.org (Postfix) with ESMTPS id D16796E1FB for ; Wed, 19 Aug 2020 08:20:03 +0000 (UTC) Received: from mxout1.routing.net (unknown [192.168.10.81]) by backup.mxwww.masterlogin.de (Postfix) with ESMTPS id 334D92C6B2 for ; Wed, 19 Aug 2020 08:18:07 +0000 (UTC) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout1.routing.net (Postfix) with ESMTP id 2057F3FEAE; Wed, 19 Aug 2020 08:18:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597825084; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ijU+V9LGg8duQNI23k95/QRwqGkghf0DR8qVS5zQXKM=; b=iScmRo7M1+BnQhd4Evnyw4ltBlpJtqQSih+yfflVI5/kUSicaHE7JyAHWX/kDgrX6QTIpT t4JLdFTcvj4z/zFjRTFR6RW5ZxOEYnPRz5SP9w3FDzJdcGeZIIFauwm0lx4eaBAmXz8WrG bXr5GlF4NzAcmVtM9kRmI8AUCIDsJr4= Received: from localhost.localdomain (fttx-pool-185.76.97.101.bambit.de [185.76.97.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 4024F100539; Wed, 19 Aug 2020 08:18:03 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v5 6/7] arm: dts: mt7623: move display nodes to separate mt7623n.dtsi Date: Wed, 19 Aug 2020 10:17:51 +0200 Message-Id: <20200819081752.4805-7-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819081752.4805-1-linux@fw-web.de> References: <20200819081752.4805-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 20 Aug 2020 07:14:47 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , Frank Wunderlich , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Woodhouse , Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Frank Wunderlich mt7623a has no graphics support so move nodes from generic mt7623.dtsi to mt7623n.dtsi Fixes: 1f6ed224594 ("arm: dts: mt7623: add Mali-450 device node") Suggested-by: David Woodhouse Signed-off-by: Frank Wunderlich --- arch/arm/boot/dts/mt7623.dtsi | 123 ---------------- arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 2 +- arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 2 +- arch/arm/boot/dts/mt7623n.dtsi | 134 ++++++++++++++++++ 4 files changed, 136 insertions(+), 125 deletions(-) create mode 100644 arch/arm/boot/dts/mt7623n.dtsi diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index a106c0d90a52..d09b5671c91b 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -14,7 +14,6 @@ #include #include #include -#include #include #include @@ -297,17 +296,6 @@ timer: timer@10008000 { clock-names = "system-clk", "rtc-clk"; }; - smi_common: smi@1000c000 { - compatible = "mediatek,mt7623-smi-common", - "mediatek,mt2701-smi-common"; - reg = <0 0x1000c000 0 0x1000>; - clocks = <&infracfg CLK_INFRA_SMI>, - <&mmsys CLK_MM_SMI_COMMON>, - <&infracfg CLK_INFRA_SMI>; - clock-names = "apb", "smi", "async"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; - }; - pwrap: pwrap@1000d000 { compatible = "mediatek,mt7623-pwrap", "mediatek,mt2701-pwrap"; @@ -339,17 +327,6 @@ sysirq: interrupt-controller@10200100 { reg = <0 0x10200100 0 0x1c>; }; - iommu: mmsys_iommu@10205000 { - compatible = "mediatek,mt7623-m4u", - "mediatek,mt2701-m4u"; - reg = <0 0x10205000 0 0x1000>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_M4U>; - clock-names = "bclk"; - mediatek,larbs = <&larb0 &larb1 &larb2>; - #iommu-cells = <1>; - }; - efuse: efuse@10206000 { compatible = "mediatek,mt7623-efuse", "mediatek,mt8173-efuse"; @@ -725,94 +702,6 @@ mmc0: mmc@11230000 { status = "disabled"; }; - g3dsys: syscon@13000000 { - compatible = "mediatek,mt7623-g3dsys", - "mediatek,mt2701-g3dsys", - "syscon"; - reg = <0 0x13000000 0 0x200>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mali: gpu@13040000 { - compatible = "mediatek,mt7623-mali", "arm,mali-450"; - reg = <0 0x13040000 0 0x30000>; - interrupts = , - , - , - , - , - , - , - , - , - , - ; - interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", - "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3", - "pp"; - clocks = <&topckgen CLK_TOP_MMPLL>, - <&g3dsys CLK_G3DSYS_CORE>; - clock-names = "bus", "core"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>; - resets = <&g3dsys MT2701_G3DSYS_CORE_RST>; - }; - - mmsys: syscon@14000000 { - compatible = "mediatek,mt7623-mmsys", - "mediatek,mt2701-mmsys", - "syscon"; - reg = <0 0x14000000 0 0x1000>; - #clock-cells = <1>; - }; - - larb0: larb@14010000 { - compatible = "mediatek,mt7623-smi-larb", - "mediatek,mt2701-smi-larb"; - reg = <0 0x14010000 0 0x1000>; - mediatek,smi = <&smi_common>; - mediatek,larb-id = <0>; - clocks = <&mmsys CLK_MM_SMI_LARB0>, - <&mmsys CLK_MM_SMI_LARB0>; - clock-names = "apb", "smi"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; - }; - - imgsys: syscon@15000000 { - compatible = "mediatek,mt7623-imgsys", - "mediatek,mt2701-imgsys", - "syscon"; - reg = <0 0x15000000 0 0x1000>; - #clock-cells = <1>; - }; - - larb2: larb@15001000 { - compatible = "mediatek,mt7623-smi-larb", - "mediatek,mt2701-smi-larb"; - reg = <0 0x15001000 0 0x1000>; - mediatek,smi = <&smi_common>; - mediatek,larb-id = <2>; - clocks = <&imgsys CLK_IMG_SMI_COMM>, - <&imgsys CLK_IMG_SMI_COMM>; - clock-names = "apb", "smi"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - }; - - jpegdec: jpegdec@15004000 { - compatible = "mediatek,mt7623-jpgdec", - "mediatek,mt2701-jpgdec"; - reg = <0 0x15004000 0 0x1000>; - interrupts = ; - clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, - <&imgsys CLK_IMG_JPGDEC>; - clock-names = "jpgdec-smi", - "jpgdec"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; - iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, - <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; - }; - vdecsys: syscon@16000000 { compatible = "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", @@ -821,18 +710,6 @@ vdecsys: syscon@16000000 { #clock-cells = <1>; }; - larb1: larb@16010000 { - compatible = "mediatek,mt7623-smi-larb", - "mediatek,mt2701-smi-larb"; - reg = <0 0x16010000 0 0x1000>; - mediatek,smi = <&smi_common>; - mediatek,larb-id = <1>; - clocks = <&vdecsys CLK_VDEC_CKGEN>, - <&vdecsys CLK_VDEC_LARB>; - clock-names = "apb", "smi"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>; - }; - hifsys: syscon@1a000000 { compatible = "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts index 2b760f90f38c..344f8c65c4aa 100644 --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts @@ -6,7 +6,7 @@ /dts-v1/; #include -#include "mt7623.dtsi" +#include "mt7623n.dtsi" #include "mt6323.dtsi" / { diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts index 0447748f9fa0..f8efcc364bc3 100644 --- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts +++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts @@ -7,7 +7,7 @@ /dts-v1/; #include -#include "mt7623.dtsi" +#include "mt7623n.dtsi" #include "mt6323.dtsi" / { diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi new file mode 100644 index 000000000000..a47e82468895 --- /dev/null +++ b/arch/arm/boot/dts/mt7623n.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright © 2017-2020 MediaTek Inc. + * Author: Sean Wang + * Ryder Lee + * + */ + +#include "mt7623.dtsi" +#include + +/ { + g3dsys: syscon@13000000 { + compatible = "mediatek,mt7623-g3dsys", + "mediatek,mt2701-g3dsys", + "syscon"; + reg = <0 0x13000000 0 0x200>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mali: gpu@13040000 { + compatible = "mediatek,mt7623-mali", "arm,mali-450"; + reg = <0 0x13040000 0 0x30000>; + interrupts = , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", + "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3", + "pp"; + clocks = <&topckgen CLK_TOP_MMPLL>, + <&g3dsys CLK_G3DSYS_CORE>; + clock-names = "bus", "core"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>; + resets = <&g3dsys MT2701_G3DSYS_CORE_RST>; + }; + + mmsys: syscon@14000000 { + compatible = "mediatek,mt7623-mmsys", + "mediatek,mt2701-mmsys", + "syscon"; + reg = <0 0x14000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb0: larb@14010000 { + compatible = "mediatek,mt7623-smi-larb", + "mediatek,mt2701-smi-larb"; + reg = <0 0x14010000 0 0x1000>; + mediatek,smi = <&smi_common>; + mediatek,larb-id = <0>; + clocks = <&mmsys CLK_MM_SMI_LARB0>, + <&mmsys CLK_MM_SMI_LARB0>; + clock-names = "apb", "smi"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; + }; + + larb1: larb@16010000 { + compatible = "mediatek,mt7623-smi-larb", + "mediatek,mt2701-smi-larb"; + reg = <0 0x16010000 0 0x1000>; + mediatek,smi = <&smi_common>; + mediatek,larb-id = <1>; + clocks = <&vdecsys CLK_VDEC_CKGEN>, + <&vdecsys CLK_VDEC_LARB>; + clock-names = "apb", "smi"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>; + }; + + larb2: larb@15001000 { + compatible = "mediatek,mt7623-smi-larb", + "mediatek,mt2701-smi-larb"; + reg = <0 0x15001000 0 0x1000>; + mediatek,smi = <&smi_common>; + mediatek,larb-id = <2>; + clocks = <&imgsys CLK_IMG_SMI_COMM>, + <&imgsys CLK_IMG_SMI_COMM>; + clock-names = "apb", "smi"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + }; + + imgsys: syscon@15000000 { + compatible = "mediatek,mt7623-imgsys", + "mediatek,mt2701-imgsys", + "syscon"; + reg = <0 0x15000000 0 0x1000>; + #clock-cells = <1>; + }; + + iommu: mmsys_iommu@10205000 { + compatible = "mediatek,mt7623-m4u", + "mediatek,mt2701-m4u"; + reg = <0 0x10205000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_M4U>; + clock-names = "bclk"; + mediatek,larbs = <&larb0 &larb1 &larb2>; + #iommu-cells = <1>; + }; + + jpegdec: jpegdec@15004000 { + compatible = "mediatek,mt7623-jpgdec", + "mediatek,mt2701-jpgdec"; + reg = <0 0x15004000 0 0x1000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, + <&imgsys CLK_IMG_JPGDEC>; + clock-names = "jpgdec-smi", + "jpgdec"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, + <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; + }; + + smi_common: smi@1000c000 { + compatible = "mediatek,mt7623-smi-common", + "mediatek,mt2701-smi-common"; + reg = <0 0x1000c000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_SMI>, + <&mmsys CLK_MM_SMI_COMMON>, + <&infracfg CLK_INFRA_SMI>; + clock-names = "apb", "smi", "async"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; + }; +}; From patchwork Wed Aug 19 08:17:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 11725693 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 915A115E4 for ; Thu, 20 Aug 2020 07:15:54 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 707E020786 for ; Thu, 20 Aug 2020 07:15:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="bHMrvzcd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 707E020786 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5CF5E6E8C9; Thu, 20 Aug 2020 07:14:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mxwww.masterlogin.de (mxwww.masterlogin.de [95.129.51.170]) by gabe.freedesktop.org (Postfix) with ESMTPS id 186CD6E20C for ; Wed, 19 Aug 2020 08:20:33 +0000 (UTC) Received: from mxout3.routing.net (unknown [192.168.10.111]) by backup.mxwww.masterlogin.de (Postfix) with ESMTPS id 1E3352C6B4 for ; Wed, 19 Aug 2020 08:18:08 +0000 (UTC) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout3.routing.net (Postfix) with ESMTP id 0477F604E7; Wed, 19 Aug 2020 08:18:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1597825085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W3o1FZBLZAbABnpopO+j+qFeIdb+A4jyLTzWb/dtdMM=; b=bHMrvzcdU8R4atDOpja4f7qlfcX0w1xKasRrwU3q3PdGmCzdcdcpls93NpcFs7alOp1P+W xW1hWugtl12W65thJE1NhMwQ1KaJowcsF3jz+6DBnzH/b/xfnr6tjSF5ybViu1XuIpMVp2 ZxzEFLltJAE3CBlb699kQ2N5zk5004E= Received: from localhost.localdomain (fttx-pool-185.76.97.101.bambit.de [185.76.97.101]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 2780B10007C; Wed, 19 Aug 2020 08:18:04 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v5 7/7] arm: dts: mt7623: add display subsystem related device nodes Date: Wed, 19 Aug 2020 10:17:52 +0200 Message-Id: <20200819081752.4805-8-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819081752.4805-1-linux@fw-web.de> References: <20200819081752.4805-1-linux@fw-web.de> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 20 Aug 2020 07:14:47 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , Ryder Lee , Frank Wunderlich , David Airlie , chunhui dai , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Ryder Lee Add display subsystem related device nodes for MT7623. Cc: Chun-Kuang Hu Signed-off-by: chunhui dai Signed-off-by: Bibby Hsieh Signed-off-by: Ryder Lee Signed-off-by: Frank Wunderlich Tested-by: Frank Wunderlich --- changed v4->v5: add nodes to new mt7623n.dtsi to avoid conflict with mt7623a v3->v4: drop display_components which is duplicate of existing mmsys v2->v3: drop bls to dpi routing --- arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 72 ++++++++ arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 72 ++++++++ arch/arm/boot/dts/mt7623n.dtsi | 171 ++++++++++++++++++ 3 files changed, 315 insertions(+) diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts index 344f8c65c4aa..f41f221e56ca 100644 --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts @@ -21,6 +21,19 @@ chosen { stdout-path = "serial2:115200n8"; }; + connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "d"; + ddc-i2c-bus = <&hdmiddc0>; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi0_out>; + }; + }; + }; + cpus { cpu@0 { proc-supply = <&mt6323_vproc_reg>; @@ -114,10 +127,18 @@ memory@80000000 { }; }; +&bls { + status = "okay"; +}; + &btif { status = "okay"; }; +&cec { + status = "okay"; +}; + &cir { pinctrl-names = "default"; pinctrl-0 = <&cir_pins_a>; @@ -128,6 +149,21 @@ &crypto { status = "okay"; }; +&dpi0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dpi0_out: endpoint { + remote-endpoint = <&hdmi0_in>; + }; + }; + }; +}; + ð { status = "okay"; @@ -199,6 +235,42 @@ fixed-link { }; }; +&hdmi0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_pins_a>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hdmi0_in: endpoint { + remote-endpoint = <&dpi0_out>; + }; + }; + + port@1 { + reg = <1>; + hdmi0_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; +}; + +&hdmiddc0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_ddc_pins_a>; + status = "okay"; +}; + +&hdmi_phy { + mediatek,ibias = <0xa>; + mediatek,ibias_up = <0x1c>; + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts index f8efcc364bc3..1b9b9a8145a7 100644 --- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts +++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts @@ -24,6 +24,19 @@ chosen { stdout-path = "serial2:115200n8"; }; + connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "d"; + ddc-i2c-bus = <&hdmiddc0>; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi0_out>; + }; + }; + }; + cpus { cpu@0 { proc-supply = <&mt6323_vproc_reg>; @@ -106,10 +119,18 @@ sound { }; }; +&bls { + status = "okay"; +}; + &btif { status = "okay"; }; +&cec { + status = "okay"; +}; + &cir { pinctrl-names = "default"; pinctrl-0 = <&cir_pins_a>; @@ -120,6 +141,21 @@ &crypto { status = "okay"; }; +&dpi0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dpi0_out: endpoint { + remote-endpoint = <&hdmi0_in>; + }; + }; + }; +}; + ð { status = "okay"; @@ -203,6 +239,42 @@ fixed-link { }; }; +&hdmi0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_pins_a>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hdmi0_in: endpoint { + remote-endpoint = <&dpi0_out>; + }; + }; + + port@1 { + reg = <1>; + hdmi0_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; +}; + +&hdmiddc0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_ddc_pins_a>; + status = "okay"; +}; + +&hdmi_phy { + mediatek,ibias = <0xa>; + mediatek,ibias_up = <0x1c>; + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi index a47e82468895..61545fc541c4 100644 --- a/arch/arm/boot/dts/mt7623n.dtsi +++ b/arch/arm/boot/dts/mt7623n.dtsi @@ -10,6 +10,10 @@ #include / { + aliases { + rdma0 = &rdma0; + rdma1 = &rdma1; + }; g3dsys: syscon@13000000 { compatible = "mediatek,mt7623-g3dsys", "mediatek,mt2701-g3dsys", @@ -131,4 +135,171 @@ smi_common: smi@1000c000 { clock-names = "apb", "smi", "async"; power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; }; + + ovl: ovl@14007000 { + compatible = "mediatek,mt7623-disp-ovl", + "mediatek,mt2701-disp-ovl"; + reg = <0 0x14007000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DISP_OVL>; + iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>; + mediatek,larb = <&larb0>; + }; + + rdma0: rdma@14008000 { + compatible = "mediatek,mt7623-disp-rdma", + "mediatek,mt2701-disp-rdma"; + reg = <0 0x14008000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DISP_RDMA>; + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>; + mediatek,larb = <&larb0>; + }; + + wdma@14009000 { + compatible = "mediatek,mt7623-disp-wdma", + "mediatek,mt2701-disp-wdma"; + reg = <0 0x14009000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DISP_WDMA>; + iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>; + mediatek,larb = <&larb0>; + }; + + bls: pwm@1400a000 { + compatible = "mediatek,mt7623-disp-pwm", + "mediatek,mt2701-disp-pwm"; + reg = <0 0x1400a000 0 0x1000>; + #pwm-cells = <2>; + clocks = <&mmsys CLK_MM_MDP_BLS_26M>, + <&mmsys CLK_MM_DISP_BLS>; + clock-names = "main", "mm"; + status = "disabled"; + }; + + color: color@1400b000 { + compatible = "mediatek,mt7623-disp-color", + "mediatek,mt2701-disp-color"; + reg = <0 0x1400b000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DISP_COLOR>; + }; + + dsi: dsi@1400c000 { + compatible = "mediatek,mt7623-dsi", + "mediatek,mt2701-dsi"; + reg = <0 0x1400c000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DSI_ENGINE>, + <&mmsys CLK_MM_DSI_DIG>, + <&mipi_tx0>; + clock-names = "engine", "digital", "hs"; + phys = <&mipi_tx0>; + phy-names = "dphy"; + status = "disabled"; + }; + + mutex: mutex@1400e000 { + compatible = "mediatek,mt7623-disp-mutex", + "mediatek,mt2701-disp-mutex"; + reg = <0 0x1400e000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_MUTEX_32K>; + }; + + rdma1: rdma@14012000 { + compatible = "mediatek,mt7623-disp-rdma", + "mediatek,mt2701-disp-rdma"; + reg = <0 0x14012000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DISP_RDMA1>; + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>; + mediatek,larb = <&larb0>; + }; + + dpi0: dpi@14014000 { + compatible = "mediatek,mt7623-dpi", + "mediatek,mt2701-dpi"; + reg = <0 0x14014000 0 0x1000>; + interrupts = ; + clocks = <&mmsys CLK_MM_DPI1_DIGL>, + <&mmsys CLK_MM_DPI1_ENGINE>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + status = "disabled"; + }; + + hdmi0: hdmi@14015000 { + compatible = "mediatek,mt7623-hdmi", + "mediatek,mt8173-hdmi"; + reg = <0 0x14015000 0 0x400>; + clocks = <&mmsys CLK_MM_HDMI_PIXEL>, + <&mmsys CLK_MM_HDMI_PLL>, + <&mmsys CLK_MM_HDMI_AUDIO>, + <&mmsys CLK_MM_HDMI_SPDIF>; + clock-names = "pixel", "pll", "bclk", "spdif"; + phys = <&hdmi_phy>; + phy-names = "hdmi"; + mediatek,syscon-hdmi = <&mmsys 0x900>; + cec = <&cec>; + status = "disabled"; + }; + + mipi_tx0: mipi-dphy@10010000 { + compatible = "mediatek,mt7623-mipi-tx", + "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + + cec: cec@10012000 { + compatible = "mediatek,mt7623-cec", + "mediatek,mt8173-cec"; + reg = <0 0x10012000 0 0xbc>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_CEC>; + status = "disabled"; + }; + + hdmi_phy: phy@10209100 { + compatible = "mediatek,mt7623-hdmi-phy", + "mediatek,mt2701-hdmi-phy"; + reg = <0 0x10209100 0 0x24>; + clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>; + clock-names = "pll_ref"; + clock-output-names = "hdmitx_dig_cts"; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; + + hdmiddc0: i2c@11013000 { + compatible = "mediatek,mt7623-hdmi-ddc", + "mediatek,mt8173-hdmi-ddc"; + interrupts = ; + reg = <0 0x11013000 0 0x1C>; + clocks = <&pericfg CLK_PERI_I2C3>; + clock-names = "ddc-i2c"; + status = "disabled"; + }; +}; + +&pio { + hdmi_pins_a: hdmi-default { + pins-hdmi { + pinmux = ; + input-enable; + bias-pull-down; + }; + }; + + hdmi_ddc_pins_a: hdmi_ddc-default { + pins-hdmi-ddc { + pinmux = , + ; + }; + }; };