From patchwork Fri Sep 4 15:55:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757975 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6098914EB for ; Fri, 4 Sep 2020 15:56:59 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2635520770 for ; Fri, 4 Sep 2020 15:56:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="fZYwdxCv"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="f327XpYN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2635520770 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=dIkMSkvUxTEego8LiemO00TzSswHrmH5OCoewuKfqUs=; b=fZYwdxCvMaIYXEANrP4tV+U+X pZ7wRDUNEoQ8FgBRJJvZJaUaGzJGwd0vOOwP252C6uEPq+gBQpRcKiyoo6F60qUMlVK5HmRsE/CRw rnJCCT3GP0ZqGB6OpknBhoBwrLkmKrR8xXffUl0A7x2ecVR268fHGNBDCZ+WsyyU9vG2FzZkrzyya H0lRZVnzjJQb0OBPbUALTQhgi2MMIlaaapPqTg04SBEoj9ootFfnmtofosefyHj/6McJJ7gchRhiP /DytihIApGWLTTUku08cthNHtsQc0wr86RVh5Uw6tgI7OQvQm3bra00YyQLfBrUzXgECrMJ8fJR6s 2hItTj96g==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3h-00015y-FB; Fri, 04 Sep 2020 15:55:25 +0000 Received: from mail-qt1-x844.google.com ([2607:f8b0:4864:20::844]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3a-00011s-77 for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:19 +0000 Received: by mail-qt1-x844.google.com with SMTP id n10so4978789qtv.3 for ; Fri, 04 Sep 2020 08:55:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gCgPYkIuen689JCGS9C+yWcxF9Wf5xvuT4fGLsIR6s4=; b=f327XpYNWc6l2rv9RF9YVwix3cQ2zUGItQvb76pIc9b0ZZkAec70KgXCmFe1JTlQPX H7KHWTKF4ebNKtJJmF+TbCugfIYbU2jdqDcwNT+/YNzahtv31duzVXAfMO+ObDXFwd4P NJ5GqDhX/siqbOaqP7g3+ksdGLNPEWZWR0vlJkfD9LmXJcMQbYIk12lmuxQGqDhU7/Ru LxHMs6d/rjNQ0a8rObQ1GjEBRFMA5GiRpv4/MQnxJWg66Oe7gn0saucFFtw97AyPcssA UqaSTYkqvvnVF+4ciJRWw3mDV3o3GWfTbonqPO/r1cRQVtr3SAYaixzOl3psh9evNe5u e5wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gCgPYkIuen689JCGS9C+yWcxF9Wf5xvuT4fGLsIR6s4=; b=RchpNAWytOAKnv6lMaBZhXB/SAJteAC120y8NoJ8+qSVkLTfGg/8aL5KK1iZORXMBv pygsVeSXJTfKtw0aeOElP+sBiPda7VwX4JBQDLVeK+Vtvw6hCAv3LS2ELtKKPjv7gejk QR01JFBtDSdV+dKSX+Z1wwynm/QBpu401MD/vAFVkjRpH85uRxhDUrhS6KkmOqTrlsxY cZLBHKNPWklHkj+c4PwW7oON1osOCESkY3AkrhdT5Z/ObR9lPwVtomINsZ34TRNMlWq6 rg7xMgBIE1C65FGiyBP3rJ8asS4HeFBYLaDUTwjc4W+yqViEEbG7u9yJBafrhz8Nd9+M oDHA== X-Gm-Message-State: AOAM530etNL3BV7dKGPPsBbbunnVoX4MXjjmQJYqqqZvXGEf6+N3kWEi RfPpQpPc1A/DQhaQt4WlkjHRHQ== X-Google-Smtp-Source: ABdhPJwQAqxRfEZO2Wpzgm/mVc29sreI4hBEc/PRL/deVoZlJprAw461csvwoALQd2PBInXlQ29TIQ== X-Received: by 2002:ac8:3933:: with SMTP id s48mr9112374qtb.294.1599234916004; Fri, 04 Sep 2020 08:55:16 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:15 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 1/8] iommu/arm-smmu: Refactor context bank allocation Date: Fri, 4 Sep 2020 15:55:06 +0000 Message-Id: <20200904155513.282067-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115518_263077_D5C943A7 X-CRM114-Status: GOOD ( 19.31 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:844 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Extract the conditional invocation of the platform defined alloc_context_bank() to a separate function to keep arm_smmu_init_domain_context() cleaner. Instead pass a reference to the arm_smmu_device as parameter to the call. Also remove the count parameter, as this can be read from the newly passed object. This allows us to not assign smmu_domain->smmu before attempting to allocate the context bank and as such we don't need to roll back this assignment on failure. Signed-off-by: Bjorn Andersson Reviewed-by: Jordan Crouse Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Note that this series applies ontop of: https://lore.kernel.org/linux-arm-msm/20200901164707.2645413-1-robdclark@gmail.com/ This could either go on its own, or be squashed with "[PATCH v16 14/20] iommu/arm-smmu: Prepare for the adreno-smmu implementation" from Rob's series. Changes since v2: - New patch drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 6 ++++-- drivers/iommu/arm/arm-smmu/arm-smmu.c | 23 ++++++++++++---------- drivers/iommu/arm/arm-smmu/arm-smmu.h | 3 ++- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 2aa6249050ff..0663d7d26908 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -91,9 +91,10 @@ static int qcom_adreno_smmu_set_ttbr0_cfg(const void *cookie, } static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, - struct device *dev, int start, int count) + struct arm_smmu_device *smmu, + struct device *dev, int start) { - struct arm_smmu_device *smmu = smmu_domain->smmu; + int count; /* * Assign context bank 0 to the GPU device so the GPU hardware can @@ -104,6 +105,7 @@ static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_doma count = 1; } else { start = 1; + count = smmu->num_context_banks; } return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index bbec5793faf8..e19d7bdc7674 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -623,6 +623,16 @@ void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); } +static int arm_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, + struct arm_smmu_device *smmu, + struct device *dev, unsigned int start) +{ + if (smmu->impl && smmu->impl->alloc_context_bank) + return smmu->impl->alloc_context_bank(smmu_domain, smmu, dev, start); + + return __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_context_banks); +} + static int arm_smmu_init_domain_context(struct iommu_domain *domain, struct arm_smmu_device *smmu, struct device *dev) @@ -741,20 +751,13 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, goto out_unlock; } - smmu_domain->smmu = smmu; - - if (smmu->impl && smmu->impl->alloc_context_bank) - ret = smmu->impl->alloc_context_bank(smmu_domain, dev, - start, smmu->num_context_banks); - else - ret = __arm_smmu_alloc_bitmap(smmu->context_map, start, - smmu->num_context_banks); - + ret = arm_smmu_alloc_context_bank(smmu_domain, smmu, dev, start); if (ret < 0) { - smmu_domain->smmu = NULL; goto out_unlock; } + smmu_domain->smmu = smmu; + cfg->cbndx = ret; if (smmu->version < ARM_SMMU_V2) { cfg->irptndx = atomic_inc_return(&smmu->irptndx); diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index 2df3a70a8a41..ddf2ca4c923d 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -437,7 +437,8 @@ struct arm_smmu_impl { irqreturn_t (*global_fault)(int irq, void *dev); irqreturn_t (*context_fault)(int irq, void *dev); int (*alloc_context_bank)(struct arm_smmu_domain *smmu_domain, - struct device *dev, int start, int max); + struct arm_smmu_device *smmu, + struct device *dev, int start); }; #define INVALID_SMENDX -1 From patchwork Fri Sep 4 15:55:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757977 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9063114EB for ; Fri, 4 Sep 2020 15:57:01 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42DD82074D for ; Fri, 4 Sep 2020 15:57:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Mt3bMvTd"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="CJgMpx43" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 42DD82074D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xf3sFtV+E0BUOd2DGjt5gFZgTw1W3Osglu+iLaxNgOA=; b=Mt3bMvTdOdubj8Ug1aaudhfpC DzYgozauoGYkKMwL+k0LaSw7qeFmKqjxNV4j+0lZ9+e00gCSL3MWUC9/5tEuxrQTsurWTJAosVlCT fW0JGAegBR631MdOHFN5EnxcOYf7VuO83H2uH4BwGqk8beascfhRmuM2D3XCi6MyWkiL838rhBQrP pdAKoW16C90b3UJkQKSVnM3Lzkx0V/141CNfgBSE1uMb6p6l2ys767LwHF4kpAqOBNZ5G43huYZsN IP24JcEYmNDP3/RNGDXYNBzQ9liU69Vdk0mE2BY/ZJN+Ajj3Gz1ff5QRSGn2u1Qvrv+TaZryp+Qzd FYWMKqx8Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3o-00017I-Hz; Fri, 04 Sep 2020 15:55:32 +0000 Received: from mail-qk1-x741.google.com ([2607:f8b0:4864:20::741]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3b-00012E-7R for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:20 +0000 Received: by mail-qk1-x741.google.com with SMTP id o5so6684369qke.12 for ; Fri, 04 Sep 2020 08:55:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cqOydC4P7PfDdkAhN3VGNKHPJJ431uRaailmt1kgaeU=; b=CJgMpx43qvc9byFhCZEm4/SvL1LvLGr9/CsL3bEH8cddixy5T8h5M48QlyKChSENHN 1Mp4gnVrKUsEcY+Zvd2qjlsVZf5YkEaRHfnHyTzeSSLlrwG/PHrSyTzkQQFCpAsQpUHH /ga6s7nNWwtc9MCgLx8cJ7JuWU4DbMfgJn9Mcny+8PrcdQyid92MSarw3ah/r+aWD8y9 Y2C4R/Mwos3AkmPQRDcED2x0vbj5V8mG5GcXZRDagt429AEGnzV4BNtAdc2oyPy/jYtW vmK2oXorZkRIx4xxxPzHCfn9x00d/5y08meh8VAM0QgWNkEs3yCi4wO/QgFASYWDo4sO fqIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cqOydC4P7PfDdkAhN3VGNKHPJJ431uRaailmt1kgaeU=; b=BkyaC3jMUixyftshGxCJHL5Q/AXF/VEStkDZHtWLFt7MWdhpsTdCYUy/pedXyQRJYs PPNcmEtEagxENvtFAEaPSzmLYpG21LbtWSKhXeeCKusfQj/LEpHIrh8jtgSDhnKM3FtB Ow8hvsmMoe8NuPPYis80EWGSzj7o1xw8xh4BJpMrnShEM8ldth7VmjCHZ4H4Bfb15qYu jYQjy+3lbZ6iKCpgKbZyzBGAeE9ohg//J3+d4O767lU8qXoiv+vSVIvq/IF/0YzelDQh GzY6abqA3Zcxi022DlTdd1ZOTJRxD2y3FAL71C9nQUscYPZ/B/EesKLjn8tCg3Qd2RAr 3KTw== X-Gm-Message-State: AOAM533OEOIhU6nJ7xMT4hsij2hiuka6o5zlmMtiCLOjvapC2Z9v8wqN IiAntK8sHAqGgiyrbSfs9d3cvQ== X-Google-Smtp-Source: ABdhPJwHcjVR8gvpVo5cc8Zutt5nJd/mELZ/BVmZZWe+VuF+L6dgLXd87rsYat09jN3kKHXviyEKTA== X-Received: by 2002:a05:620a:211c:: with SMTP id l28mr8189345qkl.395.1599234917217; Fri, 04 Sep 2020 08:55:17 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:16 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 2/8] iommu/arm-smmu: Delay modifying domain during init Date: Fri, 4 Sep 2020 15:55:07 +0000 Message-Id: <20200904155513.282067-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115519_280250_BA3E6772 X-CRM114-Status: GOOD ( 17.84 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:741 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Delay modifications to the domain during arm_smmu_init_domain_context() until we've allocated a context bank. This will allow us to postpone the special handling of identity domains until the platform specific context bank allocator has been executed, in a later patch. Signed-off-by: Bjorn Andersson Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Changes since v2: - New patch to allow us to rely on the impl specific alloc_context_bank(). drivers/iommu/arm/arm-smmu/arm-smmu.c | 40 +++++++++++++++------------ 1 file changed, 23 insertions(+), 17 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index e19d7bdc7674..add2e1807e21 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -645,6 +645,9 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; irqreturn_t (*context_fault)(int irq, void *dev); + struct arm_smmu_cfg new_cfg = *cfg; + enum arm_smmu_domain_stage new_stage = smmu_domain->stage; + const struct iommu_flush_ops *flush_ops; mutex_lock(&smmu_domain->init_mutex); if (smmu_domain->smmu) @@ -675,9 +678,9 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, * Note that you can't actually request stage-2 mappings. */ if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1)) - smmu_domain->stage = ARM_SMMU_DOMAIN_S2; + new_stage = ARM_SMMU_DOMAIN_S2; if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) - smmu_domain->stage = ARM_SMMU_DOMAIN_S1; + new_stage = ARM_SMMU_DOMAIN_S1; /* * Choosing a suitable context format is even more fiddly. Until we @@ -688,32 +691,32 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, * support to be a superset of AArch32 support... */ if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_L) - cfg->fmt = ARM_SMMU_CTX_FMT_AARCH32_L; + new_cfg.fmt = ARM_SMMU_CTX_FMT_AARCH32_L; if (IS_ENABLED(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) && !IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_ARM_LPAE) && (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) && - (smmu_domain->stage == ARM_SMMU_DOMAIN_S1)) - cfg->fmt = ARM_SMMU_CTX_FMT_AARCH32_S; - if ((IS_ENABLED(CONFIG_64BIT) || cfg->fmt == ARM_SMMU_CTX_FMT_NONE) && + (new_stage == ARM_SMMU_DOMAIN_S1)) + new_cfg.fmt = ARM_SMMU_CTX_FMT_AARCH32_S; + if ((IS_ENABLED(CONFIG_64BIT) || new_cfg.fmt == ARM_SMMU_CTX_FMT_NONE) && (smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_64K | ARM_SMMU_FEAT_FMT_AARCH64_16K | ARM_SMMU_FEAT_FMT_AARCH64_4K))) - cfg->fmt = ARM_SMMU_CTX_FMT_AARCH64; + new_cfg.fmt = ARM_SMMU_CTX_FMT_AARCH64; - if (cfg->fmt == ARM_SMMU_CTX_FMT_NONE) { + if (new_cfg.fmt == ARM_SMMU_CTX_FMT_NONE) { ret = -EINVAL; goto out_unlock; } - switch (smmu_domain->stage) { + switch (new_stage) { case ARM_SMMU_DOMAIN_S1: - cfg->cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS; + new_cfg.cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS; start = smmu->num_s2_context_banks; ias = smmu->va_size; oas = smmu->ipa_size; - if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH64) { + if (new_cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64) { fmt = ARM_64_LPAE_S1; - } else if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH32_L) { + } else if (new_cfg.fmt == ARM_SMMU_CTX_FMT_AARCH32_L) { fmt = ARM_32_LPAE_S1; ias = min(ias, 32UL); oas = min(oas, 40UL); @@ -722,7 +725,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, ias = min(ias, 32UL); oas = min(oas, 32UL); } - smmu_domain->flush_ops = &arm_smmu_s1_tlb_ops; + flush_ops = &arm_smmu_s1_tlb_ops; break; case ARM_SMMU_DOMAIN_NESTED: /* @@ -730,11 +733,11 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, * involved. */ case ARM_SMMU_DOMAIN_S2: - cfg->cbar = CBAR_TYPE_S2_TRANS; + new_cfg.cbar = CBAR_TYPE_S2_TRANS; start = 0; ias = smmu->ipa_size; oas = smmu->pa_size; - if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH64) { + if (new_cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64) { fmt = ARM_64_LPAE_S2; } else { fmt = ARM_32_LPAE_S2; @@ -742,9 +745,9 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, oas = min(oas, 40UL); } if (smmu->version == ARM_SMMU_V2) - smmu_domain->flush_ops = &arm_smmu_s2_tlb_ops_v2; + flush_ops = &arm_smmu_s2_tlb_ops_v2; else - smmu_domain->flush_ops = &arm_smmu_s2_tlb_ops_v1; + flush_ops = &arm_smmu_s2_tlb_ops_v1; break; default: ret = -EINVAL; @@ -757,6 +760,9 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, } smmu_domain->smmu = smmu; + smmu_domain->cfg = new_cfg; + smmu_domain->stage = new_stage; + smmu_domain->flush_ops = flush_ops; cfg->cbndx = ret; if (smmu->version < ARM_SMMU_V2) { From patchwork Fri Sep 4 15:55:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757957 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1700D14EB for ; Fri, 4 Sep 2020 15:55:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DFBF92074D for ; Fri, 4 Sep 2020 15:55:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="eGqYCO98"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="EMAZ1OmD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DFBF92074D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/E3N9QGKlazSGKCOZH29zPiClqNSbfy6FoCUQdPODkQ=; b=eGqYCO98a+RRZjZJ5QVh/2s21 vVGeoDFsWeRhaoZjIZbn1Mq7A0xrHw14COyJ1gVA0Ezgm3rSui/gZQadGJpw00/ZEmAL0EvSoD6jt tqrjF4NNW7VJZMW5FqBIu2gqbCyuApsGrQYYCL7mO1or3AeILcDAV2j74d8WChgijd8/5n4254ius BTA5z+euodHbiceLytvGoUxWYki2vnqxaa8QUVzn5nIAwiW7S3aeLO909m1ZDrPV9PfY7J1YmpByP uM7LqiIXemo/aeEbdMfkquFpVtKJLoJy13qd/9WhCP7rnTmkGs6RJeYAAUn4dzY2al5/nICLxWA4u sxi/nLyaQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE40-0001BA-Fu; Fri, 04 Sep 2020 15:55:44 +0000 Received: from mail-qk1-x741.google.com ([2607:f8b0:4864:20::741]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3b-00012k-Ty for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:21 +0000 Received: by mail-qk1-x741.google.com with SMTP id w186so6761538qkd.1 for ; Fri, 04 Sep 2020 08:55:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=h5uFJW/6fnBFkfrDyRmkYDvlEgZwoUK08VgApDtVqc4=; b=EMAZ1OmDd9nFxAqWSODUqd6ceL4IsY1y8RrE5+ltjJztLmCsfdK71uf11dSoSWqOnM +Vf02d28fy9I9YsR1nQ7rdmtNQOhU0RUIiz0nUe1mAlTGhDTNejFezB45NW1a4VTvvMD 8WiPfcmusc0d8CXGgs5v/AE3QiD95HlLyMUguYboj2GCrTgwWRVv4m+kMRk80d1YplUY iuW0wy4mPHUz+wbqG4brFkrRDerbs0AGM/WIY+6jerzDQO2wg3Io8Z3JmTbseq4TEXj2 PIkwmPlXmcW4PDhpX2okwL9LtgyE5EHxoQlG+xJLoGcSyTuV4kTY00rRMvHJIAl04nWy MC6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=h5uFJW/6fnBFkfrDyRmkYDvlEgZwoUK08VgApDtVqc4=; b=kHQG2CB39pVYK7BsuBdOSUbQ+aS9894TGqtwRIEN1R6ukopQnqJC5bF312aLc2kx2c t2JNys1z+1+Ga4FbHUrUUfdvc9OAFFuvKA5SMdmuaQGifdgsaS+wf6ac1yy275CnuroJ w+l2YdxlmYV3SwEH8Zm3fM3ot/OKKcrk4pwVQ8ZEaqKXKDQIpiTHROfcWKijhE6OQz3M TJ9fivw1WlKd4GEcZUpYq7pWk3lxTgV92FdlCRBW4ybYiFXWDO0odHrFPYwwut90OBuk SoBde0uugj86jlg38eReSlrOp7cL/00VgnS6H08e/XACl52n0N8HpmUo0knGg/GCZyzN D8lQ== X-Gm-Message-State: AOAM532dP24JvOmjn1lISvUZoX5hrQtWyuEY+i1Ujf/RFBmooE5tei+Z LwpMjGHfKkyJxxEapspcE7tgpA== X-Google-Smtp-Source: ABdhPJxd7USRDl6Yb7MfgkAYxzICxZXDUshL8k4VKasevb5x6VcguJCsqPzZGsq59oyACgW/0jcFqg== X-Received: by 2002:a37:e502:: with SMTP id e2mr8513643qkg.141.1599234918474; Fri, 04 Sep 2020 08:55:18 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:17 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 3/8] iommu/arm-smmu: Consult context bank allocator for identify domains Date: Fri, 4 Sep 2020 15:55:08 +0000 Message-Id: <20200904155513.282067-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115519_993964_FC6E317C X-CRM114-Status: GOOD ( 21.94 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:741 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org For implementations of the ARM SMMU where stream mappings of bypass type are prohibited identity domains can be implemented by using context banks with translation disabled. Postpone the decision to skip allocating a context bank until the implementation specific context bank allocator has been consulted and if it decides to use a context bank for the identity map, don't enable translation (i.e. omit ARM_SMMU_SCTLR_M). Signed-off-by: Bjorn Andersson Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Changes since v2: - Tie this to alloc_context_bank rather than carrying a Qualcomm specific quirk in the generic code. drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 4 ++++ drivers/iommu/arm/arm-smmu/arm-smmu.c | 23 +++++++++++++++------- drivers/iommu/arm/arm-smmu/arm-smmu.h | 3 +++ 3 files changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 0663d7d26908..229fc8ff8cea 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -94,8 +94,12 @@ static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_doma struct arm_smmu_device *smmu, struct device *dev, int start) { + struct iommu_domain *domain = &smmu_domain->domain; int count; + if (domain->type == IOMMU_DOMAIN_IDENTITY) + return ARM_SMMU_CBNDX_BYPASS; + /* * Assign context bank 0 to the GPU device so the GPU hardware can * switch pagetables diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index add2e1807e21..eb5c6ca5c138 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -611,7 +611,9 @@ void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx) /* SCTLR */ reg = ARM_SMMU_SCTLR_CFIE | ARM_SMMU_SCTLR_CFRE | ARM_SMMU_SCTLR_AFE | - ARM_SMMU_SCTLR_TRE | ARM_SMMU_SCTLR_M; + ARM_SMMU_SCTLR_TRE; + if (cfg->m) + reg |= ARM_SMMU_SCTLR_M; if (stage1) reg |= ARM_SMMU_SCTLR_S1_ASIDPNE; if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) @@ -627,9 +629,14 @@ static int arm_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, struct arm_smmu_device *smmu, struct device *dev, unsigned int start) { + struct iommu_domain *domain = &smmu_domain->domain; + if (smmu->impl && smmu->impl->alloc_context_bank) return smmu->impl->alloc_context_bank(smmu_domain, smmu, dev, start); + if (domain->type == IOMMU_DOMAIN_IDENTITY) + return ARM_SMMU_CBNDX_BYPASS; + return __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_context_banks); } @@ -653,12 +660,6 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, if (smmu_domain->smmu) goto out_unlock; - if (domain->type == IOMMU_DOMAIN_IDENTITY) { - smmu_domain->stage = ARM_SMMU_DOMAIN_BYPASS; - smmu_domain->smmu = smmu; - goto out_unlock; - } - /* * Mapping the requested stage onto what we support is surprisingly * complicated, mainly because the spec allows S1+S2 SMMUs without @@ -757,6 +758,10 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, ret = arm_smmu_alloc_context_bank(smmu_domain, smmu, dev, start); if (ret < 0) { goto out_unlock; + } else if (ret == ARM_SMMU_CBNDX_BYPASS) { + smmu_domain->stage = ARM_SMMU_DOMAIN_BYPASS; + smmu_domain->smmu = smmu; + goto out_unlock; } smmu_domain->smmu = smmu; @@ -813,6 +818,10 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, domain->geometry.force_aperture = true; + /* Enable translation for non-identity context banks */ + if (domain->type != IOMMU_DOMAIN_IDENTITY) + cfg->m = true; + /* Initialise the context bank with our page table cfg */ arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg); arm_smmu_write_context_bank(smmu, cfg->cbndx); diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index ddf2ca4c923d..235d9a3a6ab6 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -243,6 +243,8 @@ enum arm_smmu_cbar_type { #define TLB_LOOP_TIMEOUT 1000000 /* 1s! */ #define TLB_SPIN_COUNT 10 +#define ARM_SMMU_CBNDX_BYPASS 0xffff + /* Shared driver definitions */ enum arm_smmu_arch_version { ARM_SMMU_V1, @@ -346,6 +348,7 @@ struct arm_smmu_cfg { u32 sctlr_clr; /* bits to mask in SCTLR */ enum arm_smmu_cbar_type cbar; enum arm_smmu_context_fmt fmt; + bool m; }; #define ARM_SMMU_INVALID_IRPTNDX 0xff From patchwork Fri Sep 4 15:55:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757979 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B59C414EB for ; Fri, 4 Sep 2020 15:57:36 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 858D820772 for ; Fri, 4 Sep 2020 15:57:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="JuHWtIHc"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="SJb3QhpY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 858D820772 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qTC7ElT0GNkf0k6uY2qxKVWVX/qbgM7p524Kh7mfhuA=; b=JuHWtIHcYapVVCujtiybzexjs wUGJJNoAymc9jMn5ASGLFdzN4EX4+l3aIMnc8MXibOSNcXNYrTGuTZ95hEvDZcvKgG2JXCl7tnM+o duKjYpOKN0HEY2ANUHbr86u2Gpb/mW6sW2HAnWRL8Lm8piXWUCtzqBe5D/g6pxrqf3kYnnAen3qeg V8dCJdLW0dlIboRNOQrlC0+pMLV9qESqT4o/RmmEsWXCA13T8Oe8vHf5nbPUaWF/R4wRTKfZdCxCx R398znkhjdAeCPicZv2rD+yuO8AqRSQfNWK6QwHBvTK/u1sMxzFLPSMDnbixDPVyVhAkGP7hDEYhx SNpm3Lpbw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE4F-0001JF-Fy; Fri, 04 Sep 2020 15:55:59 +0000 Received: from mail-qt1-x841.google.com ([2607:f8b0:4864:20::841]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3e-00013S-IC for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:28 +0000 Received: by mail-qt1-x841.google.com with SMTP id 92so4957272qtb.6 for ; Fri, 04 Sep 2020 08:55:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A7svwNgsY0UiMpV566sgNDGzXgT7VfisHtnxe6fo6Bo=; b=SJb3QhpYN6eU3JoTjsYO9t+QvUwc0b/xpfl5OAl/hynvIxgP9pQtQGZ7Q8P6XbdYOx 4ZmHDqCeABKsnyHLKLa/r1yj5s7wu0jme98WGPofmclJAqP1x8v1Qtsto93CKB8eFPbS d0rLzoytt+cTrw2VjSrbaM+Jqq9LKRqgmjXUemY119lVYuf68vDkVWFjJVhE+nfRUonE c+jT35sndJqqYDxgbHkVUFha3/taxEbjypD0TJEBf074vc1FB/fhvmH75GtEaBIZeTux WPHSblA16beNt6kLF9KBDd0tdQPNYaE9UaVzy8GYZnTEREbL71aqBcNgXIlp/WpxPsOV eUBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=A7svwNgsY0UiMpV566sgNDGzXgT7VfisHtnxe6fo6Bo=; b=rqwY8y06M75GySCNs1KaM8SrvxTt0CE+JObCnM98gDnupxoex7qjSzVAir5A+14CFb 0ddLerDOM5x6b9QbO9FxXTyXxaZcSU1qcfm50FDRdX0Rg5RhwBNUFoQZKklZXLC4g+MX ZWYVyil3r3v7qWCTUlZGfQsquFnV4gd+y5nK0VZrbiQEdkf4hyCsXEBKkoQYhh7JIn2L LetkeoZN3B45X4QyUJ+IWWFbfiBtHeaB+LWJfowBHnpe1ymJTUlURsyeX7fWiWWtGUkB 5fNKwimgw3OQfNaVanr1hEn6BhuT1bCQ5AJ+ZvaeyRZEpYuXmy42En88wy4gMUSq28nK ya8w== X-Gm-Message-State: AOAM531bDmWr3Nqwpyw6sP5orJN3Ps3qwE44VkQDx5GKZtoJ+rD7GYb2 qN0SA+UKIa43H3FWO4/5CzuzlQ== X-Google-Smtp-Source: ABdhPJw7ASxjDOGw6iPxO7Q3Ca/q5gyDB0Ac6+j7ID3GwnYiQlbkA7Cf3QrRkFvCmJF9BhJscynS1w== X-Received: by 2002:ac8:7145:: with SMTP id h5mr9707917qtp.110.1599234919674; Fri, 04 Sep 2020 08:55:19 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:18 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 4/8] iommu/arm-smmu-qcom: Emulate bypass by using context banks Date: Fri, 4 Sep 2020 15:55:09 +0000 Message-Id: <20200904155513.282067-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115522_682298_07296191 X-CRM114-Status: GOOD ( 22.20 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:841 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Some firmware found on various Qualcomm platforms traps writes to S2CR of type BYPASS and writes FAULT into the register. In particular, this prevents us from marking the streams for the display controller as BYPASS to allow continued scanout of the screen through the initialization of the ARM SMMU. This adds a Qualcomm specific cfg_probe function, which probes for the broken behavior of the S2CR registers and implements a custom alloc_context_bank() that when necessary allocates a context bank (without translation) for these domains as well. Signed-off-by: Bjorn Andersson Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Changes since v2: - Move quirk from arm_smmudevice to qcom_smmu, as we localize the quirk handling to the Qualcomm specific implemntation. drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 229fc8ff8cea..284761a1cd8e 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -11,8 +11,14 @@ struct qcom_smmu { struct arm_smmu_device smmu; + bool bypass_broken; }; +static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu) +{ + return container_of(smmu, struct qcom_smmu, smmu); +} + #define QCOM_ADRENO_SMMU_GPU_SID 0 static bool qcom_adreno_smmu_is_gpu_device(struct device *dev) @@ -162,6 +168,50 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { { } }; +static int qcom_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, + struct arm_smmu_device *smmu, + struct device *dev, int start) +{ + struct iommu_domain *domain = &smmu_domain->domain; + struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); + + /* Keep identity domains as bypass, unless bypass is broken */ + if (domain->type == IOMMU_DOMAIN_IDENTITY && !qsmmu->bypass_broken) + return ARM_SMMU_CBNDX_BYPASS; + + /* + * The identity domain to emulate bypass is the only domain without a + * dev, use the last context bank for this to avoid collisions with + * active contexts during initialization. + */ + if (!dev) + start = smmu->num_context_banks - 1; + + return __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_context_banks); +} + +static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) +{ + unsigned int last_s2cr = ARM_SMMU_GR0_S2CR(smmu->num_mapping_groups - 1); + struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); + u32 reg; + + /* + * With some firmware writes to S2CR of type FAULT are ignored, and + * writing BYPASS will end up as FAULT in the register. Perform a write + * to S2CR to detect if this is the case with the current firmware. + */ + reg = FIELD_PREP(ARM_SMMU_S2CR_TYPE, S2CR_TYPE_BYPASS) | + FIELD_PREP(ARM_SMMU_S2CR_CBNDX, 0xff) | + FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, S2CR_PRIVCFG_DEFAULT); + arm_smmu_gr0_write(smmu, last_s2cr, reg); + reg = arm_smmu_gr0_read(smmu, last_s2cr); + if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) + qsmmu->bypass_broken = true; + + return 0; +} + static int qcom_smmu_def_domain_type(struct device *dev) { const struct of_device_id *match = @@ -200,6 +250,8 @@ static int qcom_smmu500_reset(struct arm_smmu_device *smmu) } static const struct arm_smmu_impl qcom_smmu_impl = { + .alloc_context_bank = qcom_smmu_alloc_context_bank, + .cfg_probe = qcom_smmu_cfg_probe, .def_domain_type = qcom_smmu_def_domain_type, .reset = qcom_smmu500_reset, }; From patchwork Fri Sep 4 15:55:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757959 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0D7E92C for ; Fri, 4 Sep 2020 15:56:00 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C78002074D for ; Fri, 4 Sep 2020 15:56:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="1ktK+2Zt"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="nq7Yq52d" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C78002074D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=67o3DpoCLLVeD1A/SF+0c48Wy3Y+PnK0xfr07N6GN9E=; b=1ktK+2ZtrSi3EEWHxtD2aFjKd tlfoeiEcN8i+++acZH71IVJsenjYPZx0Ii+kr7ISUVfIRtMp6P0djuJAttJxNsAwoxFt2AQDKG6OF zAhdLRpBFRy2fs4LKuFN28A8kf4Yd5LjhNsTmuHgoadLGcPNh5t+zvPGKsFxq8tWYZQUIGAdDvlJ6 O2pXsrKmx3imCJinB78hY4dzp1MwmWpdw39WHAXtCt+yblEIGlNwiFr4FoJvaclg10zGGlTTvQrem 07WlXbvR/0u8MdmRp73zaWpvMwfHHXWLdnHkQM/DSl8xQ8vq9KSIj3D43kC4l3OvJw1x37DarGLDQ CZmWGo42g==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE46-0001EX-6G; Fri, 04 Sep 2020 15:55:50 +0000 Received: from mail-qt1-x841.google.com ([2607:f8b0:4864:20::841]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3e-00013v-II for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:27 +0000 Received: by mail-qt1-x841.google.com with SMTP id g3so4941520qtq.10 for ; Fri, 04 Sep 2020 08:55:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2fCr1AJs9wuitAEKSrgAGHFGKqH8nNlJ97BjXbXmjcA=; b=nq7Yq52dWK2MdT4FH7gxEZp0TjsJOGIfGdo6BK1+4OqJeoDIhKTf2aDFJDTv6cwKiL AAfJNraihxLVh8bWslR94j/0QKdKlYNtwIv3yMrxjDSCQOWEIxYc6ZiE65lUItOWUTtY BqFB1frX+GcyJ5SqFnJy0mLNzYc7wuu3R+iYFenJhV6MSs9oxnxjXrbEGZ1RDpM5GY+T y8WqyyGYcT8oYzHDGnZ8tQ7tfYTprXqknoa5mg/+T0r8ub6dJ9lD13U53ryGD9+UKow6 LAJ62Z/mLSjcPYmkMHcOGBIr5g7C3xlrml3u8u7TkDz6TWwCAA8+9cceeXtB6w+uWVVB vqhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2fCr1AJs9wuitAEKSrgAGHFGKqH8nNlJ97BjXbXmjcA=; b=FQyAFVcM/7I8AZYBeiSdqE09tHMm+lQpThI4uVqmloyFiRm4jNOEoDNwTvOFyPFjq9 6pBqrEzJoocaYpoMvpPGj5sqrVDgQ2stuFIMfjYT8O9TWS1LXUqIPbIwgn7rAjyNuG5/ NJ6wDAaV5sjD5q96Kp3OJUqnHlW5tYnBLyQH9JpVY2uPwlvlow0AGw7CHwLMQZSFYG6D QOViGq8M4jMcqt9DG0K0k9gxxQSH8Trus46xIUZdMwNnoXH47+qxjR6DEWvYwUNk2bkI vFZT3JnLNoSxgmH2tdXK4CXOq4TVnB2ZlAMqAVi8/vXiuGKAHJYu3RYQYdq3bgwIpaiD xj1g== X-Gm-Message-State: AOAM5332nqtdlmkTIsts9ocnC7pd7yL/m2RG+zrrf4e7+6YEO4Zn0Isx +h3R52Lqqku104fmmaUpo7yzPA== X-Google-Smtp-Source: ABdhPJx6yG/QL52OZ4xkujRCTRW3+fj5Lott15EzPUVbvzCJ+ggkUIXMR0Jjrj7i70Ud68y/ORLM9w== X-Received: by 2002:ac8:66d3:: with SMTP id m19mr9426297qtp.276.1599234920832; Fri, 04 Sep 2020 08:55:20 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:20 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 5/8] iommu/arm-smmu-qcom: Consistently initialize stream mappings Date: Fri, 4 Sep 2020 15:55:10 +0000 Message-Id: <20200904155513.282067-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115522_685384_0EDFEAE9 X-CRM114-Status: GOOD ( 18.40 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:841 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Firmware that traps writes to S2CR to translate BYPASS into FAULT also ignores writes of type FAULT. As such booting with "disable_bypass" set will result in all S2CR registers left as configured by the bootloader. This has been seen to result in indeterministic results, as these mappings might linger and reference context banks that Linux is reconfiguring. Use the fact that BYPASS writes result in FAULT type to force all stream mappings to FAULT. Signed-off-by: Bjorn Andersson Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Changes since v2: - None drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 284761a1cd8e..70a1eaa52e14 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -195,6 +195,7 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) unsigned int last_s2cr = ARM_SMMU_GR0_S2CR(smmu->num_mapping_groups - 1); struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); u32 reg; + int i; /* * With some firmware writes to S2CR of type FAULT are ignored, and @@ -206,9 +207,24 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, S2CR_PRIVCFG_DEFAULT); arm_smmu_gr0_write(smmu, last_s2cr, reg); reg = arm_smmu_gr0_read(smmu, last_s2cr); - if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) + if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) { qsmmu->bypass_broken = true; + /* + * With firmware ignoring writes of type FAULT, booting the + * Linux kernel with disable_bypass disabled (i.e. "enable + * bypass") the initialization during probe will leave mappings + * in an inconsistent state. Avoid this by configuring all + * S2CRs to BYPASS. + */ + for (i = 0; i < smmu->num_mapping_groups; i++) { + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].cbndx = 0xff; + smmu->s2crs[i].count = 0; + } + } + return 0; } From patchwork Fri Sep 4 15:55:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757971 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CA33192C for ; Fri, 4 Sep 2020 15:56:07 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A2B7520770 for ; Fri, 4 Sep 2020 15:56:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="QieUH9S1"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="tb1Sd+n9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A2B7520770 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=d2eerXwT8pxbhzTAYRzbO3CvWQlg693uCbZE8vNaG+4=; b=QieUH9S1lC8v2jX2fhWTju8Zu A3yxF/wq70rOfkfmuk1yea34PZSR/sB1MBOnRaFaKvuvgsT8Xd2WRiziMfHuCqJy6xxSqOpKKRFrd 6OOxIo7ZNI64ThOeFkr7q8bdqwTpBS9Ps7+a/L6OnPo/CgVJgOd/kYVIWtiZSk1Vh0RLtcxkeQimT Iob7lcyCQTXrYGkAYRhvK9tI4z5OrauW82sgu+kfoIUddaYaJ+E2Dt1W/pK8bsrew9O6gLvAhfVcw nCIfLaNLOJ5GTKY+6JkVcDgLa9aR0HC0EOHOvSyRMPeCZYPbwWRc0UhGDc3EjOaIwSPPr83BRQoGg nrgNXv1uQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE4B-0001GJ-3u; Fri, 04 Sep 2020 15:55:55 +0000 Received: from mail-qt1-x841.google.com ([2607:f8b0:4864:20::841]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3f-00014U-Bv for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:28 +0000 Received: by mail-qt1-x841.google.com with SMTP id n18so5003286qtw.0 for ; Fri, 04 Sep 2020 08:55:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ls6xTeazp01VU5rx1tZcn8CZ6m3ZwOm0FhCvNs4H/UM=; b=tb1Sd+n9qybC0+ro/HdiC+RBRiJc3INwSffhtqG6iMH+37s6uZXFul1N9db1cLf0O+ W0rjcAJiucucmVQfVxG2MUkMAVBzL72kxYXPDM94Y8Eog3yqNAhbIBZ0SvhdqCqHjDss eqJnjUevNWz0I2ajfvSEgBRETGT0byopb7rb3HjelVEJIa/NYG7qIZZfDuUsq9UT8H2o wmlglYCueMqRUyXl0caryl5xIGgDggZeBNuaZUM8AtvG0YPJM0pCBnwyWbzDQmzoIDUC 8377oUebGf4yS6DRCQMoNRh9frdfOYrnjbWjR3K67Znyzlh8ybqe7mNP7I9znqOGTQSk sGjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ls6xTeazp01VU5rx1tZcn8CZ6m3ZwOm0FhCvNs4H/UM=; b=aZb1my2DiQpHuRdBZAOfF78T73SWUAZX8xyqe1pMiZh1BYzHBD1qEiFBvu4EF6DaoO 8a5UhHDJwblqxU7jGUIvRMJotkbfGFelUrFeZhATeZ/vaNIc6EKBMQqnpoivDqJYlFKv 2dGZnCbYC3kmmTbBV/hn0GHLzkMGnQhUhbLiTyXD0TsSyolMO+iI7LWguGIRTxuvjJFI fG5pFIFtzdo52SxTuMIRsY7SeYmpG0LijzdUDI0zwta2Jwdz9N851fgX84PeCubeiprm OkbpP1dZxZqcPm2S+6Sts5a6jNSmqnbE1dAM4JTeTGarn2NOZS+f6LTk7gkP2UCxHBrT GeVw== X-Gm-Message-State: AOAM531GElnHDOKOCQnmQ+qllCT1gmPsTUaK2Af24le2POb6+vGeLinq GUj5i3s8mrsFo2eSPBoaiK1npQ== X-Google-Smtp-Source: ABdhPJyL88SwYtdr8vsyF/Q0nFNgzaGMkmnx++yP3wUNifIJQkEY1cF7fewzAafVU/vEqfUIMi+MHg== X-Received: by 2002:ac8:17af:: with SMTP id o44mr9239269qtj.343.1599234921881; Fri, 04 Sep 2020 08:55:21 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:21 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 6/8] iommu/arm-smmu: Add impl hook for inherit boot mappings Date: Fri, 4 Sep 2020 15:55:11 +0000 Message-Id: <20200904155513.282067-7-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115523_440004_C2EADBEE X-CRM114-Status: GOOD ( 17.11 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:841 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add a new operation to allow platform implementations to inherit any stream mappings from the boot loader. Signed-off-by: Bjorn Andersson Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Changes since v2: - New patch/interface drivers/iommu/arm/arm-smmu/arm-smmu.c | 11 ++++++----- drivers/iommu/arm/arm-smmu/arm-smmu.h | 6 ++++++ 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index eb5c6ca5c138..4c4d302cd747 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -85,11 +85,6 @@ static inline void arm_smmu_rpm_put(struct arm_smmu_device *smmu) pm_runtime_put_autosuspend(smmu->dev); } -static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom) -{ - return container_of(dom, struct arm_smmu_domain, domain); -} - static struct platform_driver arm_smmu_driver; static struct iommu_ops arm_smmu_ops; @@ -2188,6 +2183,12 @@ static int arm_smmu_device_probe(struct platform_device *pdev) if (err) return err; + if (smmu->impl->inherit_mappings) { + err = smmu->impl->inherit_mappings(smmu); + if (err) + return err; + } + if (smmu->version == ARM_SMMU_V2) { if (smmu->num_context_banks > smmu->num_context_irqs) { dev_err(dev, diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index 235d9a3a6ab6..f58164976e74 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -378,6 +378,11 @@ struct arm_smmu_domain { struct iommu_domain domain; }; +static inline struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom) +{ + return container_of(dom, struct arm_smmu_domain, domain); +} + struct arm_smmu_master_cfg { struct arm_smmu_device *smmu; s16 smendx[]; @@ -442,6 +447,7 @@ struct arm_smmu_impl { int (*alloc_context_bank)(struct arm_smmu_domain *smmu_domain, struct arm_smmu_device *smmu, struct device *dev, int start); + int (*inherit_mappings)(struct arm_smmu_device *smmu); }; #define INVALID_SMENDX -1 From patchwork Fri Sep 4 15:55:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757973 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3282992C for ; Fri, 4 Sep 2020 15:56:19 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 090D72074D for ; Fri, 4 Sep 2020 15:56:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="PnpSlXxk"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="fH/8s/Vs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 090D72074D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZLh1kle/zJaMn/MJc+3VjZosTj+yM20oceLT3UyCHXs=; b=PnpSlXxkGyyeFh1kgv9KmBz/S tm73CcIRkuDq9wgnFJgF2TSnOzv8T9A+MCvWm4OlQ+NGro7C0RfxZeVCy9FqwIhPOsNNHxZniTYng RIQAr1JQXmwoB2glS+oQTuxEjKFd/abCqn3HW4L+tTZiOObqsRN2fmPfn5bvVxbDi0nfoWHGiOVk9 tCAinl3/I9L2CLLLg3SFoFuVvzbfTUzHSVh+q+ViaClwjepXxSrzl0lmtDCCzRX0YP06tmdnGCr7T OCqoCM0U2wLIAmxd8LM5XBcy8b5xd2a/hy9xFIK0rEVXT8noyXpV9E70tkoWXkiBG7n4QzKW9FGA8 Tqb8xJXuQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE4J-0001LT-KQ; Fri, 04 Sep 2020 15:56:03 +0000 Received: from mail-qv1-xf44.google.com ([2607:f8b0:4864:20::f44]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3h-00015T-14 for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:30 +0000 Received: by mail-qv1-xf44.google.com with SMTP id j3so3223149qvi.7 for ; Fri, 04 Sep 2020 08:55:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I9v8itQxrG/5qOmlIkuGPstFjTonnbsCxHmLWx5pBPk=; b=fH/8s/VsjUJd9NSfQnY9KSqjr01isFkiTOEHv966Pm+qJr0SntP+xw7DkVPurY+FVA TGhOoJlnm9Ues2qE+3G7rkDWz7QaZWbR3ioFcET9S2eEFANNMRSLMlEwWT+67pEu3h/J gtFEX/W6HDjTk/bNacLk+NKv/yYQfcg4gHrZ8cvLLQd7heB4VMYFsmq5HuYBHzojcJzM jvbXrNuQYord9V5/QeTX2bg15dsqvN7uIXH2fypYBVmveFk3IlBSq5h0rr0SsYd92wbL r3AXp+pONiHH4M+LMJeGIBSd2WYLFWvUSPInCsoZgV6fJqA9+OEe5uEsFaU2oP25C6v1 PfpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I9v8itQxrG/5qOmlIkuGPstFjTonnbsCxHmLWx5pBPk=; b=VeKLRmv1fNG6P5lvl54zyvgQNwuVYdd9ibqm9E2gkqAAVoFSfCKN7Tea6Sec2H8Fd6 rY1EMs6s2Q7bCjpIQrE6qgInVnvV/zWfVq6KijgqRT9SxJMD4CkRVVA5qfjYaCvUcsZr BvIdomkQIdNl3JSLzpcPHhhDDVIleak3i4W47fk6rMOClzJCBgldfISakCRHeIS12OQ+ JO6h9rZeN8o0SH3oHs2bEXmQxgIZY3+Ag2tuLJlz1z+bq/d1L+RGpxOhQ9r7N8krZ/Gd RnXTOPoKZZwW7r1xpOWzn0tDDN2RLjy6jnHXSvPVVq8MFtZhzA1/JwZVTfKy0nrgGErG vV8g== X-Gm-Message-State: AOAM531BAiCyJo9G2atmVHTT2cxJEqfsIyQ9CW1OGWn4T4NC6VcSRZ9T +l2SlskUxOQ8OzT4buCcFBFU4IPbDG7iiw== X-Google-Smtp-Source: ABdhPJxQteuxg6Yjoj7fVR6WxdpZueTzVWR2/XBC+gGtJOSWv7p5AUuXED5I8jk4ofSy9cwnePazOA== X-Received: by 2002:a0c:c988:: with SMTP id b8mr7690156qvk.192.1599234922927; Fri, 04 Sep 2020 08:55:22 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:22 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 7/8] iommu/arm-smmu: Provide helper for allocating identity domain Date: Fri, 4 Sep 2020 15:55:12 +0000 Message-Id: <20200904155513.282067-8-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115525_153269_5D713DB7 X-CRM114-Status: GOOD ( 17.75 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:f44 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Some platform implementations needs to be able to allocate a domain for emulating identity mappings using a context bank without translation. Provide a helper function to allocate such a domain. Signed-off-by: Bjorn Andersson Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Changes since v2: - Extracted from previous arm_smmu_setup_identity() implementation drivers/iommu/arm/arm-smmu/arm-smmu.c | 25 +++++++++++++++++++++++++ drivers/iommu/arm/arm-smmu/arm-smmu.h | 2 ++ 2 files changed, 27 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index 4c4d302cd747..3c06146dfdb9 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1924,6 +1924,31 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) return 0; } +struct iommu_domain *arm_smmu_alloc_identity_domain(struct arm_smmu_device *smmu) +{ + struct iommu_domain *identity; + int ret; + + /* Create a IDENTITY domain to use for all inherited streams */ + identity = arm_smmu_domain_alloc(IOMMU_DOMAIN_IDENTITY); + if (!identity) { + dev_err(smmu->dev, "failed to create identity domain\n"); + return ERR_PTR(-ENOMEM); + } + + identity->pgsize_bitmap = smmu->pgsize_bitmap; + identity->type = IOMMU_DOMAIN_IDENTITY; + identity->ops = &arm_smmu_ops; + + ret = arm_smmu_init_domain_context(identity, smmu, NULL); + if (ret < 0) { + dev_err(smmu->dev, "failed to initialize identity domain: %d\n", ret); + return ERR_PTR(ret); + } + + return identity; +} + struct arm_smmu_match_data { enum arm_smmu_arch_version version; enum arm_smmu_implementation model; diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index f58164976e74..fbdf3d7ca70d 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -537,4 +537,6 @@ struct arm_smmu_device *qcom_adreno_smmu_impl_init(struct arm_smmu_device *smmu) void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx); int arm_mmu500_reset(struct arm_smmu_device *smmu); +struct iommu_domain *arm_smmu_alloc_identity_domain(struct arm_smmu_device *smmu); + #endif /* _ARM_SMMU_H */ From patchwork Fri Sep 4 15:55:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11757981 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D520A14EB for ; Fri, 4 Sep 2020 15:57:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9A82420722 for ; Fri, 4 Sep 2020 15:57:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="mLT52vTG"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="e29uwL+E" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9A82420722 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=cl6d4lCpaKVAA0KJGQl72cuV7ud1a6FMejAOzlmz4bU=; b=mLT52vTG2l86D0S1i7pq+V698 URwCaeoW3iydgHQ8oTTJFFWcOACxV95RewlKetrXrqo5QBqAX47u5IqhAampH4Ad2y4ZEhDid2CKY Eyp6kj8IDGLdovXMbCqPHEhovPMkxotw0Fk5VzhpJhOrn9MOQiimhh9+/oIYkqvF6EEJRDpt+h2YQ 8P8YOcdMyxcd2pd6B1MkE2CY+WXK6OlP3GXUMbBL/SWwFfV3PjHnMgjFlGN+xufDcLMHQgADEYkzg JA5fgWMmiMtDJhyn8Fz4nzH5iRkXyPkdzNRka8cVirBqXWpDkwiMST5AK0pew+bB5i7IlxsEqJCF+ P7rfG5OcQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE4b-0001SW-NJ; Fri, 04 Sep 2020 15:56:21 +0000 Received: from mail-qk1-x743.google.com ([2607:f8b0:4864:20::743]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kEE3i-000162-Eb for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 15:55:30 +0000 Received: by mail-qk1-x743.google.com with SMTP id o64so6697236qkb.10 for ; Fri, 04 Sep 2020 08:55:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=D1yn3SCzU30h04jFGZXM8u3sA7NFVzSbPZqsPP+oWTg=; b=e29uwL+EpSoES/+z1K7U/GWcIt61CkRtvS0de6u87FjQ4LIGnpTSAeb20AmUaBcCZ8 qtWzRwMAkZO+FFYyxWZgTURdUzTgq6bhfj60DTRKFmf9wWPT10+0oU/yOGpjFBtn9Yab oAuX8ffQuctwoR52w0eq8k+Qv0iHkXxsn4ZzCB7xDfRKFO6+vWmJc2uHQb5HuinMDXj0 4x11oTIlnbY00jrQyfglYGC0moCfhrkmlrCmXpOejfircLaXWuz1uHJerPmGG6PAYKWP Bep1fwiC1Nn43wd0BDxFgDLF5fMFxZJxsemZJJfrYPg9oMu1dtnkwBanuwslteLyGari kW2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=D1yn3SCzU30h04jFGZXM8u3sA7NFVzSbPZqsPP+oWTg=; b=HEwrh7p71LpvMYaJtA3Pxg8WoTg6NwjUvWXYoid7TA9w2px+92mxS2Krw6visTVfTr cDiJK3yYW9TeM0s5mW7xR/wmJ88iIGPw7o3aBu0JbJZzZIl++d3/Gei6Gyvp3lD0pk1O BkLmsEeov4L8qH4SzAXUfXjlePLubRmZHLBn/7i6/tLtkernH8LIMatDKgx1KJn9f179 iN5fkTx0wQzRYusXl95aGzdK4mBZC6STEYytAcQkd1zArSRIIFfaCza39+9TQOhPY+VI MQHhDgSn6jdk5bxeIU0IlwdvZHeI8/yaZQxOSmCwKugNdt0JDQ5swOdn56WwwdkAPTLW N9sw== X-Gm-Message-State: AOAM530D2x7hhOOCUOPJCBEjolofjQIi9wgzKx53wUsBCedH8oQPxtfa SFrydTj5gH40rvIp7iSsk4iUcQ== X-Google-Smtp-Source: ABdhPJyFYlEUGi9gN4pbIp7iXdUMIwRXrisWYKCYwXf+631ilHcizfoLcG9kkcGDBzyGaKjC1Bz+iw== X-Received: by 2002:a37:6108:: with SMTP id v8mr7108268qkb.264.1599234924005; Fri, 04 Sep 2020 08:55:24 -0700 (PDT) Received: from localhost.localdomain (ec2-34-197-84-77.compute-1.amazonaws.com. [34.197.84.77]) by smtp.gmail.com with ESMTPSA id v18sm4724473qtq.15.2020.09.04.08.55.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2020 08:55:23 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Sai Prakash Ranjan , Jordan Crouse , Rob Clark Subject: [PATCH v3 8/8] iommu/arm-smmu-qcom: Setup identity domain for boot mappings Date: Fri, 4 Sep 2020 15:55:13 +0000 Message-Id: <20200904155513.282067-9-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org> References: <20200904155513.282067-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_115526_553672_A3998B4E X-CRM114-Status: GOOD ( 20.61 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:743 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org With many Qualcomm platforms not having functional S2CR BYPASS a temporary IOMMU domain, without translation, needs to be allocated in order to allow these memory transactions. Unfortunately the boot loader uses the first few context banks, so rather than overwriting a active bank the last context bank is used and streams are diverted here during initialization. This also performs the readback of SMR registers for the Qualcomm platform, to trigger the mechanism. This is based on prior work by Thierry Reding and Laurentiu Tudor. Signed-off-by: Bjorn Andersson Reviewed-by: Sai Prakash Ranjan Tested-by: Sai Prakash Ranjan --- Changes since v2: - Combined from pieces spread between the Qualcomm impl and generic code in v2. - Moved to use the newly introduced inherit_mapping op. drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 70a1eaa52e14..a54302190932 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -12,6 +12,7 @@ struct qcom_smmu { struct arm_smmu_device smmu; bool bypass_broken; + struct iommu_domain *identity; }; static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu) @@ -228,6 +229,37 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) return 0; } +static int qcom_smmu_inherit_mappings(struct arm_smmu_device *smmu) +{ + struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); + int cbndx; + u32 smr; + int i; + + qsmmu->identity = arm_smmu_alloc_identity_domain(smmu); + if (IS_ERR(qsmmu->identity)) + return PTR_ERR(qsmmu->identity); + + cbndx = to_smmu_domain(qsmmu->identity)->cfg.cbndx; + + for (i = 0; i < smmu->num_mapping_groups; i++) { + smr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_SMR(i)); + + if (FIELD_GET(ARM_SMMU_SMR_VALID, smr)) { + smmu->smrs[i].id = FIELD_GET(ARM_SMMU_SMR_ID, smr); + smmu->smrs[i].mask = FIELD_GET(ARM_SMMU_SMR_MASK, smr); + smmu->smrs[i].valid = true; + + smmu->s2crs[i].type = S2CR_TYPE_TRANS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].cbndx = cbndx; + smmu->s2crs[i].count++; + } + } + + return 0; +} + static int qcom_smmu_def_domain_type(struct device *dev) { const struct of_device_id *match = @@ -270,6 +302,7 @@ static const struct arm_smmu_impl qcom_smmu_impl = { .cfg_probe = qcom_smmu_cfg_probe, .def_domain_type = qcom_smmu_def_domain_type, .reset = qcom_smmu500_reset, + .inherit_mappings = qcom_smmu_inherit_mappings, }; static const struct arm_smmu_impl qcom_adreno_smmu_impl = {