From patchwork Tue Jul 31 05:36:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sreekanth Reddy X-Patchwork-Id: 10549887 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C936B139A for ; Tue, 31 Jul 2018 05:36:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B7D4222B27 for ; Tue, 31 Jul 2018 05:36:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AB1852A729; Tue, 31 Jul 2018 05:36:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9525322B27 for ; Tue, 31 Jul 2018 05:36:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726228AbeGaHPR (ORCPT ); Tue, 31 Jul 2018 03:15:17 -0400 Received: from mail-qk0-f195.google.com ([209.85.220.195]:36810 "EHLO mail-qk0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726086AbeGaHPR (ORCPT ); Tue, 31 Jul 2018 03:15:17 -0400 Received: by mail-qk0-f195.google.com with SMTP id a132-v6so9450612qkg.3 for ; Mon, 30 Jul 2018 22:36:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id; bh=h9xHeHEjvSDpc1PuPNxz2XnGzO/tYAisASQ0KHMnlyk=; b=cPSeaNawUUjnViuy2qwk9ciqd5t4maKAzcCzTma59wNIiOUGGtLCJmR2tlyECBPjfB maeksky2h4dcxJpj4R7qxp1IAQD/J3Wmp1QHAyuZ8gmH841tq7kWkNx40YMB7FUMQ5se SibvcU4EvUfcerCOLj/ieSHKdJKudgDTnglUI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=h9xHeHEjvSDpc1PuPNxz2XnGzO/tYAisASQ0KHMnlyk=; b=nzoq875ovUexlk9EAMBBDKE1c2MBbzVH164Mfgrh/wDmhGFEsAq4vnD+QVmzrd4Xhf vLIbu3ATcmuUeDRRZ4pkRym/b/5OxMsNafJpMS4+r2+yqdAH7I+bKvaZU9lvcpgNMsYr QGWECrQyBcV41Kic5DVEamEjtI5z3Ue+MDq+3bEArHwxX6mnT3PhnZQvRbIGkgwkR3LH 6uCdCuktYSaVkFncnUvN3QyeKt2WylZWfzr0qKrTM6odXz07DFS5iMUTH6GYEd9jizlH +JhgM4aZYzqyVR6dxoRxgdvoez8u+Q+XRGD6lViZUc67y0idKTFXFAfjGTDaxfjD0akt ydDQ== X-Gm-Message-State: AOUpUlEhRMPfjx85SMDrRiPYoG2y04qxVdM1s7u5g5Y4gCsAEDwMjNS4 yEhwpYTMtByQs+SiKMQMKVQ1zAvrwqw= X-Google-Smtp-Source: AAOMgpdO3of3vwK6D23lgI74F2OaaJ4o0krszFhBycQFs9+VPo65ihTwP8hRI+UC4W/6oy/rCtZ36g== X-Received: by 2002:a37:6454:: with SMTP id y81-v6mr18949084qkb.56.1533015407660; Mon, 30 Jul 2018 22:36:47 -0700 (PDT) Received: from localhost.localdomain.localdomain ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id q15-v6sm10828597qte.55.2018.07.30.22.36.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 30 Jul 2018 22:36:46 -0700 (PDT) From: Sreekanth Reddy To: martin.petersen@oracle.com Cc: linux-scsi@vger.kernel.org, sathya.prakash@broadcom.com, thenzl@redhat.com, davem@davemloft.net, Sreekanth Reddy Subject: [PATCH v1 RESEND] mpt3sas: Swap I/O memory read value back to cpu endianness Date: Tue, 31 Jul 2018 01:36:36 -0400 Message-Id: <1533015396-10401-1-git-send-email-sreekanth.reddy@broadcom.com> X-Mailer: git-send-email 1.8.3.1 Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Swap the I/O memory read value back to cpu endianness before storing it in a data structures which are defined in the MPI headers where u8 components are not defined in the endianness order. In this area from day one mpt3sas driver is using le32_to_cpu() & cpu_to_le32() APIs. But in the patch cf6bf9710c (mpt3sas: Bug fix for big endian systems) we have removed these APIs before reading I/O memory which we should haven't done it. So in this patch I am correcting it by adding these APIs back before accessing I/O memory. v1: Changelog: Replaced writeq API with __raw_writeq() & mmiowb() APIs. Signed-off-by: Sreekanth Reddy Reviewed-by: Andy Shevchenko --- drivers/scsi/mpt3sas/mpt3sas_base.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 94359d8..c75e88a 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -3350,11 +3350,10 @@ void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, spinlock_t *writeq_lock) { unsigned long flags; - __u64 data_out = b; spin_lock_irqsave(writeq_lock, flags); - writel((u32)(data_out), addr); - writel((u32)(data_out >> 32), (addr + 4)); + __raw_writel((u32)(b), addr); + __raw_writel((u32)(b >> 32), (addr + 4)); mmiowb(); spin_unlock_irqrestore(writeq_lock, flags); } @@ -3374,7 +3373,8 @@ void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, static inline void _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock) { - writeq(b, addr); + __raw_writeq(b, addr); + mmiowb(); } #else static inline void @@ -5275,7 +5275,7 @@ void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, /* send message 32-bits at a time */ for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { - writel((u32)(request[i]), &ioc->chip->Doorbell); + writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); if ((_base_wait_for_doorbell_ack(ioc, 5))) failed = 1; } @@ -5296,7 +5296,7 @@ void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, } /* read the first two 16-bits, it gives the total length of the reply */ - reply[0] = (u16)(readl(&ioc->chip->Doorbell) + reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_DATA_MASK); writel(0, &ioc->chip->HostInterruptStatus); if ((_base_wait_for_doorbell_int(ioc, 5))) { @@ -5305,7 +5305,7 @@ void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, ioc->name, __LINE__); return -EFAULT; } - reply[1] = (u16)(readl(&ioc->chip->Doorbell) + reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_DATA_MASK); writel(0, &ioc->chip->HostInterruptStatus); @@ -5319,7 +5319,7 @@ void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, if (i >= reply_bytes/2) /* overflow case */ readl(&ioc->chip->Doorbell); else - reply[i] = (u16)(readl(&ioc->chip->Doorbell) + reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_DATA_MASK); writel(0, &ioc->chip->HostInterruptStatus); }