From patchwork Sat Sep 12 03:21:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11771597 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 86BDA746 for ; Sat, 12 Sep 2020 03:22:02 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 7F98F22206; Sat, 12 Sep 2020 03:22:02 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pf1-f194.google.com (mail-pf1-f194.google.com [209.85.210.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 45970221E7; Sat, 12 Sep 2020 03:22:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="i5ympiMN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 45970221E7 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=f.fainelli@gmail.com Received: by mail-pf1-f194.google.com with SMTP id n14so8663258pff.6; Fri, 11 Sep 2020 20:22:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=DkSnPBN11O0w2c5JS3zmyGoJw/HlU10KnfGDlQJt9jc=; b=i5ympiMNhOvdDkIBnAIUjHpIlix5Zcpx16eHQiyJNbIuzTgsrW1zSzBhRI9wcyp5Hn VUpGPWYi9DDpHdHUOIZe9qoL2/N2KEaNQyz2SRaIjwqVlMp4ngY1KyCC4Jba4HG2P52r B5yId2Ybxpi1oAew4uDAsSRect7rx8wii86yxtMDVcw0JMAtR1uiwTXi9berzRXdAT6d SdTNhYPTpW8WLgUdn4INu/CP41o8KBQmfMFZpJWsgIdojDCnFNfbLsYHbJZEukJTo46t 51wX//r8vry7uzZdBzalNcA9KVIrpwmmnFIzxpxzDDvvuLLcXqEpZIic8ip8SvSqDuFf 2d8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=DkSnPBN11O0w2c5JS3zmyGoJw/HlU10KnfGDlQJt9jc=; b=g+b1vVg8excsoBI93DyChUpFpD0rHA03M2Y1OE6xWFICY/HPT9lGDN1H1qGHFgh9Dl GteT75YnX+mN02ql4W0C+v1H42dyZFRRvrByboR77pVkazJouR3WBgO8uFBtLC664F5c 0fITbIb/GeHYc7EePJAFB1a432GAUXXMaM0F4sps+jorW5zuM2c4p96RNO3Ls9ZVBvJE htuXtnajMj16zEbjJpSisxvrCH5g5mv50qTR6kIBfMqlZ6Ouy1PRJqCM8rnR9m0Vz75m 24GzWbtThoIdSufmUi/2i0Hlb62IPRFcMX3Von3QdWuMEXcCjBxVcMtT9caV51+x5V6q nk4A== X-Gm-Message-State: AOAM532gLaeJBes0hH8pvgjfKHCnNMZ1yEM1+V23Nbru1lWpdFJk50Sz g0XDVTWpXODh8m00JwnLPVk1UrAd5Pg= X-Google-Smtp-Source: ABdhPJznNDQusPUmOKBZ0PMeCdQMx37es5x9XnkVCS6c0d40y8kn5SEAmepB5gMonzQkA1C3rpb9kA== X-Received: by 2002:a62:8806:0:b029:13c:d37c:5e47 with SMTP id l6-20020a6288060000b029013cd37c5e47mr4762438pfd.13.1599880921026; Fri, 11 Sep 2020 20:22:01 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id w203sm3859895pff.0.2020.09.11.20.21.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2020 20:22:00 -0700 (PDT) From: Florian Fainelli List-Id: To: soc@kernel.org Cc: Florian Fainelli , Andre Przywara , Ray Jui , Adrian Schmutzler , Christian Lamparter , Maxime Ripard , Dave Stevenson , Chanwoo Choi , Hoegeun Kwon , Stefan Wahren , Nicolas Saenz Julienne , Scott Branden , linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, bcm-kernel-feedback-list@broadcom.com Subject: [GIT PULL 1/5] Broadcom devicetree changes for 5.10 Date: Fri, 11 Sep 2020 20:21:48 -0700 Message-Id: <20200912032153.1216354-1-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: https://github.com/Broadcom/stblinux.git tags/arm-soc/for-5.10/devicetree for you to fetch changes up to 1a4a752ee876b7c7d775d73c51decdbf852ba4d5: Merge tag 'tags/bcm2835-dt-next-2020-09-08' into devicetree/next (2020-09-10 13:35:55 -0700) ---------------------------------------------------------------- This pull request contains Broadcom ARM-based SoCs changes for 5.10, please pull the following: - Christian adds support for the Cisco Meraki MR32 which is based on the BCM53016 SoC, this requires specifying the PWM, second UART and third PCIe controller in Device Tree before finally adding support for the board. - Adrian updates the status properties from "ok" to "okay". - Andre fixes the SP805 watchdog nodes to have the correct clock names and binding for both the Cygnus and Northstar Plus (NSP). He does the same thing with the SP804 timer node which was missing an "arm,primecell" compatible string. - Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all DRM changes are ready. ---------------------------------------------------------------- Adrian Schmutzler (1): ARM: dts: NSP: replace status value "ok" by "okay" Andre Przywara (3): ARM: dts: Cygnus: Fix SP805 clocks ARM: dts: NSP: Fix SP805 clock-names ARM: dts: broadcom: Fix SP804 node Christian Lamparter (5): dt-bindings: ARM: add bindings for the Meraki MR32 ARM: dts: BCM5301X: Specify PWM in the DT ARM: dts: BCM5301X: Specify uart2 in the DT ARM: dts: BCM5301X: Specify pcie2 in the DT ARM: BCM5301X: Add DT for Meraki MR32 Florian Fainelli (1): Merge tag 'tags/bcm2835-dt-next-2020-09-08' into devicetree/next Maxime Ripard (1): ARM: dts: bcm2711: Enable the display pipeline .../devicetree/bindings/arm/bcm/brcm,bcm4708.yaml | 2 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm-cygnus.dtsi | 4 +- arch/arm/boot/dts/bcm-nsp.dtsi | 6 +- arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 48 +++++ arch/arm/boot/dts/bcm2711.dtsi | 122 ++++++++++++- arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 197 +++++++++++++++++++++ arch/arm/boot/dts/bcm5301x.dtsi | 25 ++- arch/arm/boot/dts/bcm958525xmc.dts | 2 +- arch/arm/boot/dts/bcm958625k.dts | 2 +- 10 files changed, 399 insertions(+), 10 deletions(-) create mode 100644 arch/arm/boot/dts/bcm53016-meraki-mr32.dts From patchwork Sat Sep 12 03:21:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11771599 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C33C5746 for ; Sat, 12 Sep 2020 03:22:03 +0000 (UTC) Received: by mail.kernel.org (Postfix) id BE6BD221EB; Sat, 12 Sep 2020 03:22:03 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pj1-f68.google.com (mail-pj1-f68.google.com [209.85.216.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 81DA5221E7; Sat, 12 Sep 2020 03:22:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Jz/XxIjh" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 81DA5221E7 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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Fri, 11 Sep 2020 20:22:02 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id w203sm3859895pff.0.2020.09.11.20.22.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2020 20:22:01 -0700 (PDT) From: Florian Fainelli List-Id: To: soc@kernel.org Cc: Andre Przywara , Ray Jui , Florian Fainelli , Adrian Schmutzler , linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, bcm-kernel-feedback-list@broadcom.com Subject: [GIT PULL 2/5] Broadcom devicetree-arm64 changes for 5.10 Date: Fri, 11 Sep 2020 20:21:49 -0700 Message-Id: <20200912032153.1216354-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200912032153.1216354-1-f.fainelli@gmail.com> References: <20200912032153.1216354-1-f.fainelli@gmail.com> MIME-Version: 1.0 The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: https://github.com/Broadcom/stblinux.git tags/arm-soc/for-5.10/devicetree-arm64 for you to fetch changes up to 6534dfbbfab3dee8eb903df9b68556405ab3fa36: arm64: dts: broadcom: Fix SP805 clock-names (2020-08-30 20:57:07 -0700) ---------------------------------------------------------------- This pull request contains Broadcom ARM64-based SoCs changes for 5.10, please pull the following: - Adrian changes the status properties from "ok" to "okay" - Andre fixes the SP805 watchdog nodes to have the correct clock names and binding for the Northstar 2 platform ---------------------------------------------------------------- Adrian Schmutzler (1): arm64: dts: broadcom: replace status value "ok" by "okay" Andre Przywara (1): arm64: dts: broadcom: Fix SP805 clock-names arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 2 +- arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi | 2 +- arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) From patchwork Sat Sep 12 03:21:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11771601 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 804CD6CA for ; Sat, 12 Sep 2020 03:22:05 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 7B4DE221ED; Sat, 12 Sep 2020 03:22:05 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2B603221E7; Sat, 12 Sep 2020 03:22:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="MFeGpYSG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2B603221E7 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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Fri, 11 Sep 2020 20:22:04 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id w203sm3859895pff.0.2020.09.11.20.22.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2020 20:22:03 -0700 (PDT) From: Florian Fainelli List-Id: To: soc@kernel.org Cc: Florian Fainelli , =?utf-8?q?=C3=81lvaro_Fern?= =?utf-8?q?=C3=A1ndez_Rojas?= , Thomas Bogendoerfer , Florian Fainelli , Rob Herring , linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, bcm-kernel-feedback-list@broadcom.com Subject: [GIT PULL 3/5] Broadcom drivers changes for 5.10 Date: Fri, 11 Sep 2020 20:21:50 -0700 Message-Id: <20200912032153.1216354-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200912032153.1216354-1-f.fainelli@gmail.com> References: <20200912032153.1216354-1-f.fainelli@gmail.com> MIME-Version: 1.0 The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: https://github.com/Broadcom/stblinux.git tags/arm-soc/for-5.10/drivers for you to fetch changes up to fb8a0b80c4bb4d474218d515cca0ec9b9028c6b4: bus: brcmstb_gisb: Add support for breakpoint interrupts (2020-09-06 20:10:44 -0700) ---------------------------------------------------------------- This pull request contains Broadcom SoCs drivers changes for 5.10, please pull the following: - Alvaro adds support for the BCM63xx (DSL) SoCs power domain controller and adds support for the 6318, 6328, 6362, 63268. - Florian adds support for tuning the Bus Interface Unit on 72164 and 72165, enables the Brahma-B53 and Cortex-A72 read-ahead cache for the 64-bit capable ARCH_BRCMSTB platforms, and finally updates the GISB driver to support breakpoint notifications. ---------------------------------------------------------------- Florian Fainelli (8): bus: brcmstb_gisb: Shorten prints soc: bcm: brcmstb: biuctrl: Enable Read-ahead cache soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164 soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165 soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2 soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines dt-bindings: bus: Document breakpoint interrupt for gisb-arb bus: brcmstb_gisb: Add support for breakpoint interrupts Álvaro Fernández Rojas (9): dt-bindings: soc: brcm: add BCM63xx power domain binding MIPS: BMIPS: add BCM6328 power domain definitions MIPS: BMIPS: add BCM6362 power domain definitions MIPS: BMIPS: add BCM63268 power domain definitions MIPS: BMIPS: add BCM6318 power domain definitions soc: bcm: add BCM63xx power domain driver MIPS: BMIPS: dts: add BCM6328 power domain support MIPS: BMIPS: dts: add BCM6362 power domain support MIPS: BMIPS: dts: add BCM63268 power domain support .../devicetree/bindings/bus/brcm,gisb-arb.txt | 3 +- .../bindings/power/brcm,bcm63xx-power.yaml | 44 +++ MAINTAINERS | 1 + arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 + arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 + arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 + drivers/bus/brcmstb_gisb.c | 100 +++++- drivers/soc/bcm/Kconfig | 10 + drivers/soc/bcm/Makefile | 1 + drivers/soc/bcm/bcm63xx/Kconfig | 12 + drivers/soc/bcm/bcm63xx/Makefile | 2 + drivers/soc/bcm/bcm63xx/bcm63xx-power.c | 378 +++++++++++++++++++++ drivers/soc/bcm/brcmstb/biuctrl.c | 105 +++++- include/dt-bindings/soc/bcm6318-pm.h | 17 + include/dt-bindings/soc/bcm63268-pm.h | 21 ++ include/dt-bindings/soc/bcm6328-pm.h | 17 + include/dt-bindings/soc/bcm6362-pm.h | 21 ++ 17 files changed, 736 insertions(+), 14 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml create mode 100644 drivers/soc/bcm/bcm63xx/Kconfig create mode 100644 drivers/soc/bcm/bcm63xx/Makefile create mode 100644 drivers/soc/bcm/bcm63xx/bcm63xx-power.c create mode 100644 include/dt-bindings/soc/bcm6318-pm.h create mode 100644 include/dt-bindings/soc/bcm63268-pm.h create mode 100644 include/dt-bindings/soc/bcm6328-pm.h create mode 100644 include/dt-bindings/soc/bcm6362-pm.h From patchwork Sat Sep 12 03:21:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11771603 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E28F06CA for ; Sat, 12 Sep 2020 03:22:06 +0000 (UTC) Received: by mail.kernel.org (Postfix) id DDA4322209; Sat, 12 Sep 2020 03:22:06 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pg1-f182.google.com (mail-pg1-f182.google.com [209.85.215.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86F69221E7; Sat, 12 Sep 2020 03:22:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="RgMVABEA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 86F69221E7 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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Fri, 11 Sep 2020 20:22:05 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id w203sm3859895pff.0.2020.09.11.20.22.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2020 20:22:04 -0700 (PDT) From: Florian Fainelli List-Id: To: soc@kernel.org Cc: Christian Lamparter , Scott Branden , Florian Fainelli , linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, bcm-kernel-feedback-list@broadcom.com Subject: [GIT PULL 4/5] Broadcom maintainers changes for 5.10 Date: Fri, 11 Sep 2020 20:21:51 -0700 Message-Id: <20200912032153.1216354-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200912032153.1216354-1-f.fainelli@gmail.com> References: <20200912032153.1216354-1-f.fainelli@gmail.com> MIME-Version: 1.0 The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: https://github.com/Broadcom/stblinux.git tags/arm-soc/for-5.10/maintainers for you to fetch changes up to 487047b87a6c3b49ce9d694ae765633dd43225a8: MAINTAINERS: extend BCM5301X ARM ARCHITECTURE files (2020-08-26 17:03:40 -0700) ---------------------------------------------------------------- This pull request contains Broadcom SoCs changes to the MAINTAINERS file for 5.10, please pull the following: - Christian updates the BCM5301x (Northstar) section to cover additional files added for the Cisco Meraki MR32 ---------------------------------------------------------------- Christian Lamparter (1): MAINTAINERS: extend BCM5301X ARM ARCHITECTURE files MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) From patchwork Sat Sep 12 03:21:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11771605 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5872D746 for ; Sat, 12 Sep 2020 03:22:08 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 50A3522206; Sat, 12 Sep 2020 03:22:08 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pl1-f172.google.com (mail-pl1-f172.google.com [209.85.214.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F1540221EB; Sat, 12 Sep 2020 03:22:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dh92du3S" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F1540221EB Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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Fri, 11 Sep 2020 20:22:07 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id w203sm3859895pff.0.2020.09.11.20.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2020 20:22:06 -0700 (PDT) From: Florian Fainelli List-Id: To: soc@kernel.org Cc: Florian Fainelli , linux-arm-kernel@lists.infradead.org, arnd@arndb.de, olof@lixom.net, khilman@kernel.org, bcm-kernel-feedback-list@broadcom.com Subject: [GIT PULL 5/5] Broadcom soc changes for 5.10 Date: Fri, 11 Sep 2020 20:21:52 -0700 Message-Id: <20200912032153.1216354-5-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200912032153.1216354-1-f.fainelli@gmail.com> References: <20200912032153.1216354-1-f.fainelli@gmail.com> MIME-Version: 1.0 The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: https://github.com/Broadcom/stblinux.git tags/arm-soc/for-5.10/soc for you to fetch changes up to 4e5cafa8b3ea45cb17aa6b538fb439abefc0029e: ARM: brcmstb: Add debug UART entry for 72615 (2020-09-04 13:42:16 -0700) ---------------------------------------------------------------- This pull request contains Broadcom ARM-based SoCs changes for 5.10, please pull the following: - Florian adds debug UART entries for the 72164 and 72165 SoCs and updates ARCH_BRCMSTB to select CONFIG_BCM7038_L1_IRQ which is an interrupt controller used with the 7211 chip family ---------------------------------------------------------------- Florian Fainelli (3): ARM: brcmstb: Add debug UART entry for 72614 ARM: bcm: Enable BCM7038_L1_IRQ for ARCH_BRCMSTB ARM: brcmstb: Add debug UART entry for 72615 arch/arm/include/debug/brcmstb.S | 26 +++++++++++++++----------- arch/arm/mach-bcm/Kconfig | 1 + 2 files changed, 16 insertions(+), 11 deletions(-)