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[193.106.246.138]) by smtp.gmail.com with ESMTPSA id o15sm4684400lfo.188.2020.09.16.09.37.01 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Sep 2020 09:37:01 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com Subject: [PATCH v7 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts Date: Wed, 16 Sep 2020 18:36:36 +0200 Message-Id: <1600274198-30470-1-git-send-email-grzegorz.jaszczyk@linaro.org> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200916_123703_875031_C6C6E691 X-CRM114-Status: GOOD ( 20.32 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:143 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, grzegorz.jaszczyk@linaro.org, david@lechnology.com, praneeth@ti.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-omap@vger.kernel.org, lee.jones@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Suman Anna The PRUSS INTC has a fixed number of output interrupt lines that are connected to a number of processors or other PRUSS instances or other devices (like DMA) on the SoC. The output interrupt lines 2 through 9 are usually connected to the main Arm host processor and are referred to as host interrupts 0 through 7 from ARM/MPU perspective. All of these 8 host interrupts are not always exclusively connected to the Arm interrupt controller. Some SoCs have some interrupt lines not connected to the Arm interrupt controller at all, while a few others have the interrupt lines connected to multiple processors in which they need to be partitioned as per SoC integration needs. For example, AM437x and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 5 connected to the other PRUSS, while AM335x has host interrupt 0 shared between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU and a DMA controller. Add logic to the PRUSS INTC driver to ignore both these shared and invalid interrupts. Signed-off-by: Suman Anna Co-developed-by: Grzegorz Jaszczyk Signed-off-by: Grzegorz Jaszczyk --- v6->v7: - Add Co-developed-by tag. v5->v6: - No change. v4->v5: - Rename: s/invalid_intr/irqs_reserved/ v3->v4: - Due to changes in DT bindings which converts irqs-reserved property from uint8-array to bitmask requested by Rob introduce relevant changes in the driver. - Merge the irqs-reserved and irqs-shared to one property since they can be handled by one logic (relevant change was introduced to DT binding). - Update commit message. v2->v3: - Extra checks for (intc->irqs[i]) in error/remove path was moved from "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts" to this patch v1->v2: - https://patchwork.kernel.org/patch/11069757/ --- drivers/irqchip/irq-pruss-intc.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c index c8bdef4..e7ba358 100644 --- a/drivers/irqchip/irq-pruss-intc.c +++ b/drivers/irqchip/irq-pruss-intc.c @@ -484,7 +484,7 @@ static int pruss_intc_probe(struct platform_device *pdev) struct pruss_intc *intc; struct pruss_host_irq_data *host_data; int i, irq, ret; - u8 max_system_events; + u8 max_system_events, irqs_reserved = 0; data = of_device_get_match_data(dev); if (!data) @@ -504,6 +504,16 @@ static int pruss_intc_probe(struct platform_device *pdev) if (IS_ERR(intc->base)) return PTR_ERR(intc->base); + ret = of_property_read_u8(dev->of_node, "ti,irqs-reserved", + &irqs_reserved); + + /* + * The irqs-reserved is used only for some SoC's therefore not having + * this property is still valid + */ + if (ret < 0 && ret != -EINVAL) + return ret; + pruss_intc_init(intc); mutex_init(&intc->lock); @@ -514,6 +524,9 @@ static int pruss_intc_probe(struct platform_device *pdev) return -ENOMEM; for (i = 0; i < MAX_NUM_HOST_IRQS; i++) { + if (irqs_reserved & BIT(i)) + continue; + irq = platform_get_irq_byname(pdev, irq_names[i]); if (irq <= 0) { ret = (irq == 0) ? -EINVAL : irq; @@ -538,8 +551,11 @@ static int pruss_intc_probe(struct platform_device *pdev) return 0; fail_irq: - while (--i >= 0) - irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL); + while (--i >= 0) { + if (intc->irqs[i]) + irq_set_chained_handler_and_data(intc->irqs[i], NULL, + NULL); + } irq_domain_remove(intc->domain); @@ -553,8 +569,11 @@ static int pruss_intc_remove(struct platform_device *pdev) unsigned int hwirq; int i; - for (i = 0; i < MAX_NUM_HOST_IRQS; i++) - irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL); + for (i = 0; i < MAX_NUM_HOST_IRQS; i++) { + if (intc->irqs[i]) + irq_set_chained_handler_and_data(intc->irqs[i], NULL, + NULL); + } for (hwirq = 0; hwirq < max_system_events; hwirq++) irq_dispose_mapping(irq_find_mapping(intc->domain, hwirq)); From patchwork Wed Sep 16 16:36:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grzegorz Jaszczyk X-Patchwork-Id: 11780137 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A821C159A for ; Wed, 16 Sep 2020 16:39:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7BBFF223BD for ; Wed, 16 Sep 2020 16:39:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="ln6cVcoS"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="dpvpqsnv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7BBFF223BD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=VBSk1B0xWT7mwZ20xVYGSjDphLv1icl1iI7F8/gIjXU=; b=ln6cVcoS2kCHYUvShjyVejZgdi PFYDA2pBoBVM7YRCwgiAF6Gbu3GjPVXgN50uuqsSoayvWWiJ0zlpOep1x4sRZOLtEskPWYAydIoUY NdCJyjprthLlOVcA9LC4QddaxvsqkFp0py0RpUHBOuX/YaAULpmEIRb+jLOZfmV5Iu4m80lYNLiAC y3CooRMZc9Tr/WN8x3cGx7VrP83kMxzOkTJtGWvAb7heP05bA5pIaoYcGLMpc0Yp2jvdJq8DdxqVQ vz3ghe9pC7CRMlC+yMqHcvRSpJRdhOLAlLvsRae6jqLU0hi/usOxpGZBf4SWwKPNDwajObXxkm6VK ILZVzH7A==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kIaQo-0000MV-IP; Wed, 16 Sep 2020 16:37:18 +0000 Received: from mail-lj1-x241.google.com ([2a00:1450:4864:20::241]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kIaQg-0000JN-Bl for linux-arm-kernel@lists.infradead.org; Wed, 16 Sep 2020 16:37:12 +0000 Received: by mail-lj1-x241.google.com with SMTP id a15so6517352ljk.2 for ; Wed, 16 Sep 2020 09:37:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EkdGaMAWsiITjixL8vtqkk4znvOu3Q/xzFs2YIEcfEY=; b=dpvpqsnv1se+B+N0B3X73ZARW0xp0qYtrllJbwUMEaTaPYAhDr3QA1JvBn8NUzvi/Z s8/YO99GSsIQU66VS4Y21URWzrqFy3MCSfvxw+pZqn4rifzBbNx2BJgMeksakO170Z52 JPksnTeACT5MlZRIedoBUIaPfuTTJMYrmuNm4nBCXCwlym2M+aUB2z4kYkJ0ouJaSY00 70k7LERJHRRCJjPRwRId0KijyzilqRY9bkwG2n2Sba11nDKP2TEzW5F79CkYt4U8RCAV +RMne5o9ys2+dp6NFUda1mLsnvldt8KlUv+Tr51FA+G/lZn1INDC4VhR7AUJMAsKGndQ DMuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EkdGaMAWsiITjixL8vtqkk4znvOu3Q/xzFs2YIEcfEY=; b=EyLhOhaAzZGxh5I7Nk+3N20hYQffxr5lN9kmqMZTmoEP4qmLfD7o0QnjkxjpIaRFir 7s9IlUVg3abVWANrkfszSULV21ID8/P4M/VxXUtQhCYBZVXTCyObMl+a8AnwXjryqGyd 0RuOXP7N5vxojecXzvRkei1KfL+GL7M1Mu4VnCi4IKgFJtMEGChr7xHDJaXn9MLXgsM9 SUa5/EIWN13k0JAUN9UAF4l3XbRY9BcHl13QinuZHWvsgqVmW/nPj0M2ZJrp3Q1YT7v2 8jnbwH4UJULisUdks589oIaMYDA2G83KjS2K/Ki00T7Yyfa0xzmImNpHSDd26gJiPfjy jIsg== X-Gm-Message-State: AOAM530aqnMJgdV+LlLS+XAF+BztjKrPtE57I/zW67rlJXHYYOzbFCil EeEGmabnSlWg2w7OI0maZac9pw== X-Google-Smtp-Source: ABdhPJweMbctsM8dhw1DMsPTH+UQrB1ETp35qvjl+dAbRFkt1qlxj5Z1ZMezb9PHcSl/mT5nBIGqww== X-Received: by 2002:a2e:a587:: with SMTP id m7mr8896222ljp.133.1600274227566; Wed, 16 Sep 2020 09:37:07 -0700 (PDT) Received: from gilgamesh.semihalf.com (193-106-246-138.noc.fibertech.net.pl. [193.106.246.138]) by smtp.gmail.com with ESMTPSA id o15sm4684400lfo.188.2020.09.16.09.37.06 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Sep 2020 09:37:07 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com Subject: [PATCH v7 4/5] irqchip/irq-pruss-intc: Implement irq_{get, set}_irqchip_state ops Date: Wed, 16 Sep 2020 18:36:37 +0200 Message-Id: <1600274198-30470-2-git-send-email-grzegorz.jaszczyk@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1600274198-30470-1-git-send-email-grzegorz.jaszczyk@linaro.org> References: <1600274198-30470-1-git-send-email-grzegorz.jaszczyk@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200916_123710_468757_818A685D X-CRM114-Status: GOOD ( 17.32 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:241 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, grzegorz.jaszczyk@linaro.org, david@lechnology.com, praneeth@ti.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-omap@vger.kernel.org, lee.jones@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: David Lechner This implements the irq_get_irqchip_state and irq_set_irqchip_state callbacks for the TI PRUSS INTC driver. The set callback can be used by drivers to "kick" a PRU by injecting a PRU system event. Co-developed-by: Suman Anna Signed-off-by: Suman Anna Signed-off-by: David Lechner Co-developed-by: Grzegorz Jaszczyk Signed-off-by: Grzegorz Jaszczyk Reviewed-by: Lee Jones --- v6->v7: - Add Co-developed-by tags. v5->v6: - Drop example from the commit log v4->v5: - No change. v3->v4: - Update commit message v2->v3: - Get rid of unnecessary pruss_intc_check_write() and use pruss_intc_write_reg directly. v1->v2: - https://patchwork.kernel.org/patch/11069769/ --- drivers/irqchip/irq-pruss-intc.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c index e7ba358..bfe529a 100644 --- a/drivers/irqchip/irq-pruss-intc.c +++ b/drivers/irqchip/irq-pruss-intc.c @@ -12,6 +12,7 @@ * Copyright (C) 2019 David Lechner */ +#include #include #include #include @@ -323,6 +324,43 @@ static void pruss_intc_irq_relres(struct irq_data *data) module_put(THIS_MODULE); } +static int pruss_intc_irq_get_irqchip_state(struct irq_data *data, + enum irqchip_irq_state which, + bool *state) +{ + struct pruss_intc *intc = irq_data_get_irq_chip_data(data); + u32 reg, mask, srsr; + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + reg = PRU_INTC_SRSR(data->hwirq / 32); + mask = BIT(data->hwirq % 32); + + srsr = pruss_intc_read_reg(intc, reg); + + *state = !!(srsr & mask); + + return 0; +} + +static int pruss_intc_irq_set_irqchip_state(struct irq_data *data, + enum irqchip_irq_state which, + bool state) +{ + struct pruss_intc *intc = irq_data_get_irq_chip_data(data); + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + if (state) + pruss_intc_write_reg(intc, PRU_INTC_SISR, data->hwirq); + else + pruss_intc_write_reg(intc, PRU_INTC_SICR, data->hwirq); + + return 0; +} + static struct irq_chip pruss_irqchip = { .name = "pruss-intc", .irq_ack = pruss_intc_irq_ack, @@ -330,6 +368,8 @@ static struct irq_chip pruss_irqchip = { .irq_unmask = pruss_intc_irq_unmask, .irq_request_resources = pruss_intc_irq_reqres, .irq_release_resources = pruss_intc_irq_relres, + .irq_get_irqchip_state = pruss_intc_irq_get_irqchip_state, + .irq_set_irqchip_state = pruss_intc_irq_set_irqchip_state, }; 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[193.106.246.138]) by smtp.gmail.com with ESMTPSA id o15sm4684400lfo.188.2020.09.16.09.37.10 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Sep 2020 09:37:10 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com Subject: [PATCH v7 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Date: Wed, 16 Sep 2020 18:36:38 +0200 Message-Id: <1600274198-30470-3-git-send-email-grzegorz.jaszczyk@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1600274198-30470-1-git-send-email-grzegorz.jaszczyk@linaro.org> References: <1600274198-30470-1-git-send-email-grzegorz.jaszczyk@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200916_123712_637219_D5A93575 X-CRM114-Status: GOOD ( 19.71 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:142 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, grzegorz.jaszczyk@linaro.org, david@lechnology.com, praneeth@ti.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-omap@vger.kernel.org, lee.jones@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Suman Anna The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP, commonly called ICSSG. The PRUSS INTC present within the ICSSG supports more System Events (160 vs 64), more Interrupt Channels and Host Interrupts (20 vs 10) compared to the previous generation PRUSS INTC instances. The first 2 and the last 10 of these host interrupt lines are used by the PRU and other auxiliary cores and sub-modules within the ICSSG, with 8 host interrupts connected to MPU. The host interrupts 5, 6, 7 are also connected to the other ICSSG instances within the SoC and can be partitioned as per system integration through the board dts files. Enhance the PRUSS INTC driver to add support for this ICSSG INTC instance. Signed-off-by: Suman Anna Co-developed-by: Grzegorz Jaszczyk Signed-off-by: Grzegorz Jaszczyk --- v6->v7: - Add Co-developed-by tag. v5->v6: - No change. v4->v5: - Rename: s/num_host_intrs/num_host_events/ regarding to change introduced in patch #2. v3->v4: - Move generic part to "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts" patch and leave only platform related code. v2->v3: - Change patch order: use it directly after "irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops" and before new "irqchip/irq-pruss-intc: Add event mapping support" in order to reduce diff. v1->v2: - https://patchwork.kernel.org/patch/11069773/ --- drivers/irqchip/Kconfig | 2 +- drivers/irqchip/irq-pruss-intc.c | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 733e59f..25c8944 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -495,7 +495,7 @@ config TI_SCI_INTA_IRQCHIP config TI_PRUSS_INTC tristate "TI PRU-ICSS Interrupt Controller" - depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE + depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3 select IRQ_DOMAIN help This enables support for the PRU-ICSS Local Interrupt Controller diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c index bfe529a..92fb578 100644 --- a/drivers/irqchip/irq-pruss-intc.c +++ b/drivers/irqchip/irq-pruss-intc.c @@ -628,11 +628,20 @@ static const struct pruss_intc_match_data pruss_intc_data = { .num_host_events = 10, }; +static const struct pruss_intc_match_data icssg_intc_data = { + .num_system_events = 160, + .num_host_events = 20, +}; + static const struct of_device_id pruss_intc_of_match[] = { { .compatible = "ti,pruss-intc", .data = &pruss_intc_data, }, + { + .compatible = "ti,icssg-intc", + .data = &icssg_intc_data, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, pruss_intc_of_match);