From patchwork Thu Sep 17 08:26:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 11781957 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CA662618 for ; Thu, 17 Sep 2020 08:27:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ABAF021D1B for ; Thu, 17 Sep 2020 08:27:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="jeRzzBbG" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726430AbgIQI1D (ORCPT ); Thu, 17 Sep 2020 04:27:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726362AbgIQI0e (ORCPT ); Thu, 17 Sep 2020 04:26:34 -0400 Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F0C1C06174A for ; Thu, 17 Sep 2020 01:26:34 -0700 (PDT) Received: by mail-pf1-x441.google.com with SMTP id w7so752665pfi.4 for ; Thu, 17 Sep 2020 01:26:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D6h+xKCe0NuczXnbv5vYewO0odIcXWf9WH9+tSHUU4s=; b=jeRzzBbGla5iVfHIc+qJ9qx4GzGPi/zWJQ4LIVyclPcn9BrNnPMvbWAcAFa2KDmwmT D7RcmoRqojesewmgDOr1s+NTJPLqP1odGzqJ60qq30YO0yiTGMec1QrnYd+V1Igc/F+g tzW1xtkI7QrIRm7Rhj4QsihBAn7X9LFT/blGUPz26kUoCacIyASTFxOI+P8qXLrcTnD8 1AmG6L27t75St2az44hf+92q3IPbpA1I171NADTszerBFuS7MC7cLkuaaXInGly43CQj fGx1NmqxEwqA3xb52c/RXOE0dhKnUZirxV0KrpOFo3Tk8ABQkSKBE0b9LXM/So58BAly 24MA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D6h+xKCe0NuczXnbv5vYewO0odIcXWf9WH9+tSHUU4s=; b=pcJU4N6h54WRcYkrqyC85xVtFEOPF/ZzIc3Hj/eZWf/i5zYnkq2NpED91qliAlfI03 5aGcCteeyimVqKuD3dsGMHWlLv5bkq3AnwY/vsQ2PxY2g4NAyWKwtC8F3nMplJ26RAFj 6qFoKnnA41u6po7Omj7v9VyTIXLgjlOug3et9bPIpsVVcApgaNUldemqTLRtb60zGdls C2PQJ1HOP9OrcyVOjD5PH1lECWPL3DUpmT7OtprLu6rFez6m8q5w4YB/wyW+QvC1l0tG cSpXdoacd9VqSx3F+De/F4euMo/jqdSRDm3ZOt70UWcITGYXn4UNohtAW6m80t1xntX5 tNAQ== X-Gm-Message-State: AOAM533GP43AdVTJGBQeVq6j93qsnCbFPPL4PY0OmyWkGX/cYOgxmqiH d5V8ZtENfP45CP/h5KYvAHAe X-Google-Smtp-Source: ABdhPJy9Y8OG1St1V82/Rim83Og6yn9eXU5MNTY3PLcUoiyZV1gPfNN7PwQa/rXhQMXAZ3qZcW0fLA== X-Received: by 2002:aa7:8ec7:0:b029:13e:d13d:a080 with SMTP id b7-20020aa78ec70000b029013ed13da080mr25243462pfr.23.1600331194008; Thu, 17 Sep 2020 01:26:34 -0700 (PDT) Received: from Mani-XPS-13-9360.localdomain ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id g129sm8233194pfb.9.2020.09.17.01.26.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2020 01:26:33 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, Jonathan Marek Subject: [PATCH 1/3] arm64: dts: qcom: sm8250: add apps_smmu node Date: Thu, 17 Sep 2020 13:56:20 +0530 Message-Id: <20200917082622.6823-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> References: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jonathan Marek Add the apps_smmu node for sm8250. For UFS, now that the kernel initializes the iommu, the stream mappings set by the bootloader are cleared. Adding the iommus property is required so that new mappings are created for UFS. Signed-off-by: Jonathan Marek --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 107 +++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 357e4bfba70c..3b3eae732da7 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1163,6 +1163,8 @@ power-domains = <&gcc UFS_PHY_GDSC>; + iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>; + clock-names = "core_clk", "bus_aggr_clk", @@ -2125,6 +2127,111 @@ }; }; + apps_smmu: iommu@15000000 { + compatible = "qcom,sm8250-smmu-500", "arm,mmu-500"; + reg = <0 0x15000000 0 0x100000>; + #iommu-cells = <2>; + #global-interrupts = <2>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + adsp: remoteproc@17300000 { compatible = "qcom,sm8250-adsp-pas"; reg = <0 0x17300000 0 0x100>; From patchwork Thu Sep 17 08:26:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 11781955 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 34DEE618 for ; Thu, 17 Sep 2020 08:27:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0F8B320715 for ; Thu, 17 Sep 2020 08:27:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="vPYDOcut" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726448AbgIQI1B (ORCPT ); Thu, 17 Sep 2020 04:27:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726380AbgIQI0i (ORCPT ); Thu, 17 Sep 2020 04:26:38 -0400 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C926CC061756 for ; Thu, 17 Sep 2020 01:26:37 -0700 (PDT) Received: by mail-pl1-x644.google.com with SMTP id q12so724421plr.12 for ; Thu, 17 Sep 2020 01:26:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=E9jyVu0k3eRY7h2H387hr4y+DVkcJDyudhDSHAOQrBM=; b=vPYDOcutscb6zurX/ZYNHhwdYROdWO0Bgz54XIcvmFBpmb60v7EbRiQYjw86KYMJqR PefGviww/sjtUIojtdhGxXBE0FVTsOuhWwrwKLig6xBqNtBubL/4ULkiePAN2tsyHzW9 79b4DHPNOm4m7L+NI17hTzfaRWnmvGWE6iVmDVF4/q4DUa19WpjLI4LDDMZ8FKtz4gy7 GT3aKVniKO+7eFojDq1kuLXw3QSqG9W3caxXcFLd9GEVR8jzomBJ1U0S57SQ065RoAUN b/DRQXjmCd/85vvqOZjOpfftUPL1vr36Svzi21w5/Vr7q+zprA0i19Q+lbJAFglzf4BX PAzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=E9jyVu0k3eRY7h2H387hr4y+DVkcJDyudhDSHAOQrBM=; b=nhEcT3wJI5cf/M/aABCahTulr88zb/PN9tO/XslgRYBCp7qFC9XkvEsG1IJPV8tyXH pz+Hq19VUR7K6QHW1SNf8l9VMaWwd3gUVaN7QlNzuE1eZ7fQHNzxzygfYg6s5Dg8lsfZ hljsMWYsXjWSEtweExi502ScgNoWGmrRodT+TUotnt6KZuk5UAsMb6rdsG2S8CRbsUP6 7owGTHGcZO88tG5r06rzewS4sC/0LCjJKq7O1vAe/ky9H0qlFKXyZtxpr+9jiKMz9gog EHR7S+HQAMUvwfH/4v4nMXyUNcUaDxdPgZgdz6cFAlQBq5JQfdMg5UiMPlrM6RPY/uwj dxcQ== X-Gm-Message-State: AOAM530GOx5RGoNJjwd8IgnJC1IsJFv1k2pFpjZglzEBlUq3cUaJiNHQ /eV54ZQgZJWC1jXMSscJLvwi X-Google-Smtp-Source: ABdhPJxwlScGvbtJLixIG/0H4Sah76nQyRKkUJXOriLjua5KbRPO9A5srlZeSp5mYhIUlaAbt6EJog== X-Received: by 2002:a17:90b:a44:: with SMTP id gw4mr7136357pjb.26.1600331197318; Thu, 17 Sep 2020 01:26:37 -0700 (PDT) Received: from Mani-XPS-13-9360.localdomain ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id g129sm8233194pfb.9.2020.09.17.01.26.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2020 01:26:36 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, Jonathan Marek Subject: [PATCH 2/3] arm64: dts: qcom: sm8250: Add USB and PHY device nodes Date: Thu, 17 Sep 2020 13:56:21 +0530 Message-Id: <20200917082622.6823-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> References: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jonathan Marek Add device nodes for the USB3 controller, QMP SS PHY and SNPS HS PHY. Signed-off-by: Jonathan Marek --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 180 +++++++++++++++++++++++++++ 1 file changed, 180 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 3b3eae732da7..815e66ce0b76 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1453,6 +1453,186 @@ }; }; + usb_1_hsphy: phy@88e3000 { + compatible = "qcom,sm8250-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; + reg = <0 0x088e3000 0 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + }; + + usb_2_hsphy: phy@88e4000 { + compatible = "qcom,sm8250-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; + reg = <0 0x088e4000 0 0x400>; + status = "disabled"; + #phy-cells = <0>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "ref"; + + resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; + }; + + usb_1_qmpphy: phy@88e9000 { + compatible = "qcom,sm8250-qmp-usb3-phy"; + reg = <0 0x088e9000 0 0x200>, + <0 0x088e8000 0 0x20>; + reg-names = "reg-base", "dp_com"; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; + clock-names = "aux", "ref_clk_src", "com_aux"; + + resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, + <&gcc GCC_USB3_PHY_PRIM_BCR>; + reset-names = "phy", "common"; + + usb_1_ssphy: lanes@88e9200 { + reg = <0 0x088e9200 0 0x200>, + <0 0x088e9400 0 0x200>, + <0 0x088e9c00 0 0x400>, + <0 0x088e9600 0 0x200>, + <0 0x088e9800 0 0x200>, + <0 0x088e9a00 0 0x100>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_phy_pipe_clk_src"; + }; + }; + + usb_2_qmpphy: phy@88eb000 { + compatible = "qcom,sm8250-qmp-usb3-uni-phy"; + reg = <0 0x088eb000 0 0x200>; + status = "disabled"; + #clock-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_EN>, + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; + clock-names = "aux", "ref_clk_src", "ref", "com_aux"; + + resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, + <&gcc GCC_USB3_PHY_SEC_BCR>; + reset-names = "phy", "common"; + + usb_2_ssphy: lane@88eb200 { + reg = <0 0x088eb200 0 0x200>, + <0 0x088eb400 0 0x200>, + <0 0x088eb800 0 0x800>; + #phy-cells = <0>; + clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + }; + }; + + usb_1: usb@a6f8800 { + compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; + reg = <0 0x0a6f8800 0 0x400>; + status = "disabled"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_EN>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep", "xo"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 15 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", + "dm_hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + usb_1_dwc3: dwc3@a600000 { + compatible = "snps,dwc3"; + reg = <0 0x0a600000 0 0xcd00>; + interrupts = ; + iommus = <&apps_smmu 0x0 0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + usb_2: usb@a8f8800 { + compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; + reg = <0 0x0a8f8800 0 0x400>; + status = "disabled"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_EN>; + clock-names = "cfg_noc", "core", "iface", "mock_utmi", + "sleep", "xo"; + + assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SEC_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 12 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", + "dm_hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB30_SEC_GDSC>; + + resets = <&gcc GCC_USB30_SEC_BCR>; + + usb_2_dwc3: dwc3@a800000 { + compatible = "snps,dwc3"; + reg = <0 0x0a800000 0 0xcd00>; + interrupts = ; + iommus = <&apps_smmu 0x20 0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_2_hsphy>, <&usb_2_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + dc_noc: interconnect@90c0000 { compatible = "qcom,sm8250-dc-noc"; reg = <0 0x090c0000 0 0x4200>; From patchwork Thu Sep 17 08:26:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 11781953 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C30DB112E for ; Thu, 17 Sep 2020 08:26:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A47FD221F1 for ; Thu, 17 Sep 2020 08:26:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="M9H5ftN4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726191AbgIQI0v (ORCPT ); Thu, 17 Sep 2020 04:26:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726397AbgIQI0l (ORCPT ); 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bh=Oi8lbN5PJDRQE+iSBWgwU9oDc6wIuFWvYfEWRaH/5pI=; b=Orf2slXaJjQzJYvPP7xYrV2zHoZD/BbD4vcOAtgql2DVpQdOKAiC83xcC8jMjZjDx1 DpW8hEjA0F8PRGfevEiKt+zuB9iNu+B67z+IsWfLET985o5C4MBL9zIyatlgz+LEncad Pl0Fo/i+wRDW/FLb3IBRKsiOk1AOlnZeNOpug2kRRlaPCcVE7QhHSLSJH+5oimMVNoYa Jlgm8b8Px4sUToUfPom3APisTGP/YPyYN+gNHO1lDgKtpo21iYKA6EahYFxgAW1AkGkP IpHwuKsMUQCDVKtxGfNt1n4t4rrtAzpkR0yQrOxwUHr++tknz3V/0s5UCDGFQlvyONKf gl/Q== X-Gm-Message-State: AOAM530C1CcvSNPhHryme6WIsQAVen6blmYElxe2n3DCvuhz5EM00cLx tknwcT1vUfq36updJbtwawA4 X-Google-Smtp-Source: ABdhPJxyAvFUcLLGLA+PHHamxiaJgNx9inQLxxyB39a/BJ6NeF3R8QCWDEDUgz3MUXumpKfbrCmZHQ== X-Received: by 2002:a17:90a:160f:: with SMTP id n15mr7325454pja.75.1600331200762; Thu, 17 Sep 2020 01:26:40 -0700 (PDT) Received: from Mani-XPS-13-9360.localdomain ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id g129sm8233194pfb.9.2020.09.17.01.26.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2020 01:26:40 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH 3/3] arm64: dts: qcom: qrb5165-rb5: Add USB support Date: Thu, 17 Sep 2020 13:56:22 +0530 Message-Id: <20200917082622.6823-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> References: <20200917082622.6823-1-manivannan.sadhasivam@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org RB5 makes use of the two USB controllers onboard. USB0 is connected to the Type C port and USB1 is connected to USB3.1 HUB which exposes following downstream ports: * 2 Type A ports * 2 HS/SS ports on the expansion connector * USB to LAN device Hence, enable these two controllers with the required PHYs. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 46 ++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 1528a865f1f8..e020013c1add 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -684,3 +684,49 @@ vdda-pll-supply = <&vreg_l9a_1p2>; vdda-pll-max-microamp = <18800>; }; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + status = "okay"; + + vdda-pll-supply = <&vreg_l5a_0p88>; + vdda33-supply = <&vreg_l2a_3p1>; + vdda18-supply = <&vreg_l12a_1p8>; +}; + +&usb_1_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l9a_1p2>; + vdda-pll-supply = <&vreg_l18a_0p92>; +}; + +&usb_2 { + status = "okay"; +}; + +&usb_2_dwc3 { + dr_mode = "host"; +}; + +&usb_2_hsphy { + status = "okay"; + + vdda-pll-supply = <&vreg_l5a_0p88>; + vdda33-supply = <&vreg_l2a_3p1>; + vdda18-supply = <&vreg_l12a_1p8>; +}; + +&usb_2_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l9a_1p2>; + vdda-pll-supply = <&vreg_l18a_0p92>; +};