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[153.199.2.183]) by smtp.googlemail.com with ESMTPSA id 131sm2857634pfy.5.2020.09.18.03.49.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 03:49:58 -0700 (PDT) From: Daniel Palmer To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] ARM: mstar: Select MStar intc Date: Fri, 18 Sep 2020 19:49:47 +0900 Message-Id: <20200918104949.3260823-2-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200918104949.3260823-1-daniel@0x0f.com> References: <20200918104949.3260823-1-daniel@0x0f.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200918_065001_678181_3E740AE8 X-CRM114-Status: GOOD ( 12.97 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:542 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, arnd@arndb.de, maz@kernel.org, Daniel Palmer , linux-kernel@vger.kernel.org, mark-pk.tsai@mediatek.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org MediaTek recently introduced support for the MStar interrupt controller that is also present in some of their chips as well as the MStar/Sigmastar chips. Almost all of the peripheral interrupts go through an instance of this controller in MStar/SigmaStar Arm v7 chips so we want to select it if CONFIG_ARCH_MSTARV7 is selected. Signed-off-by: Daniel Palmer --- arch/arm/mach-mstar/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-mstar/Kconfig b/arch/arm/mach-mstar/Kconfig index 52744fe32368..576d1ab293c8 100644 --- a/arch/arm/mach-mstar/Kconfig +++ b/arch/arm/mach-mstar/Kconfig @@ -3,6 +3,7 @@ menuconfig ARCH_MSTARV7 depends on ARCH_MULTI_V7 select ARM_GIC select ARM_HEAVY_MB + select MST_IRQ help Support for newer MStar/Sigmastar SoC families that are based on Armv7 cores like the Cortex A7 and share the same From patchwork Fri Sep 18 10:49:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11784673 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79C1C618 for ; Fri, 18 Sep 2020 10:50:39 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4BEC42072E for ; Fri, 18 Sep 2020 10:50:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="aucjVlOR"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="cltSYL9K" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4BEC42072E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=80HiYEgNps88CU+BnR7NegJZi/ec2oshQFjxcTC6cfw=; b=aucjVlORA81E9iQiRDt+zby8s 2mQsTH9zj83JvRlsEr1+urIRHPfcCRTa3IPPIoQgoc4hHGKa9NxokKBmYZiLPMqmcFVzl1FzCtpi1 hIMHGVrkQTBzaCaH0miZNU7kgmDoytk76Oq7iKHcN/TNfBk84XMAOVxVj1w+DO875JROuC9NjfiEA 5nAb+rxlk2fLcCzAS3QoDS+7ujBA7UjRsrCcXwmOJ15Nt0tSu304KGPbSGooEglAUZftKbiCMkPsw BvyRQOP/XMMcSamnvXC5uYg5HJv4frmTvZJi03DUM7YTKuMBWGr05oFTRQGYW5ANE/IVoZ/4V+wsL 6BTyCcYQw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJDyF-0006AS-C7; Fri, 18 Sep 2020 10:50:27 +0000 Received: from mail-pj1-x1041.google.com ([2607:f8b0:4864:20::1041]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kJDxs-00062b-5U for linux-arm-kernel@lists.infradead.org; Fri, 18 Sep 2020 10:50:05 +0000 Received: by mail-pj1-x1041.google.com with SMTP id v14so2815188pjd.4 for ; Fri, 18 Sep 2020 03:50:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kzXjI15ZtttHCXeQ3n0cYLMP2xI/9tBvTIvB8MmIIvU=; b=cltSYL9Kp5OpJFjDICGd+/2mu+5pmjD0yP3/WFLAMnhQ1BkMva5IDY0Ib1s5RDyz+j FzydGBg2dPxPJt63s5he+g/ZZIe2iPfkg4nYQoGQ05Mj+oGYJ3j7PrAPP5scKfV1A92J urK7ALIXF9MPDRv8Fxo3YSm9W8O2qN/vXkEGM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kzXjI15ZtttHCXeQ3n0cYLMP2xI/9tBvTIvB8MmIIvU=; b=k2MmifILNE5+jwJ0JwOdygwHpIh5J9vAGAdGptzgx+76PfpDKlJwCygt42Z5U6wo3A jL0KDq3k1db3UIYg7K7PTDsuS/VzPpuH0e4Qiz1X6/xc80nTz8mAq9vQai19ZZMmUXi9 rLCIgPscZEzQ1nJ4XXRfww1y4s541tvZrwwljpI00S8Usty8ANV2avngkP4WCppwtcIA FRV+3OnLRbRCsRwJs/RgWpEx8e1lcAnuyrhnu8K5bSinJFNikkYxl7ASulgCeKcw0WSB Nt2Gx9Gn9azPYlSqmmM8jrRmzL7thB4f1KvZotn1Sg7lHeXGWRO9MXziAlSXrnM+jpqk nlrQ== X-Gm-Message-State: AOAM532u1sDWD1Uwi8B0KEzzv6SE8XtfRUmQpQq6tHb7v/TOnz+7Qdri EhWbi+Jft3ZqBcUsKgkMB/pJq9RXrrXROFgY X-Google-Smtp-Source: ABdhPJxc3lT4Yd65/moY9HH8UgfN+MHB/mKWxx8tmHBFJqRh4B7jLhlnT0Bx2j21nIfMFSAZIXyeuA== X-Received: by 2002:a17:90b:88d:: with SMTP id bj13mr12394060pjb.80.1600426201478; Fri, 18 Sep 2020 03:50:01 -0700 (PDT) Received: from shiro.work (p532183-ipngn200506sizuokaden.shizuoka.ocn.ne.jp. [153.199.2.183]) by smtp.googlemail.com with ESMTPSA id 131sm2857634pfy.5.2020.09.18.03.49.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 03:50:00 -0700 (PDT) From: Daniel Palmer To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] ARM: mstar: Add interrupt controller to base dtsi Date: Fri, 18 Sep 2020 19:49:48 +0900 Message-Id: <20200918104949.3260823-3-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200918104949.3260823-1-daniel@0x0f.com> References: <20200918104949.3260823-1-daniel@0x0f.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200918_065004_319713_D92F147D X-CRM114-Status: GOOD ( 12.08 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1041 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, arnd@arndb.de, maz@kernel.org, Daniel Palmer , linux-kernel@vger.kernel.org, mark-pk.tsai@mediatek.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add the IRQ and FIQ intc instances to the base MStar/SigmaStar v7 dtsi. All of the known SoCs have both and at the same place with their common IPs using the same interrupt lines. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index 3b7b9b793736..aec841b52ca4 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -85,6 +85,25 @@ reboot { mask = <0x79>; }; + intc_fiq: interrupt-controller@201310 { + compatible = "mstar,mst-intc"; + reg = <0x201310 0x40>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + mstar,irqs-map-range = <96 127>; + }; + + intc_irq: interrupt-controller@201350 { + compatible = "mstar,mst-intc"; + reg = <0x201350 0x40>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + mstar,irqs-map-range = <32 95>; + mstar,intc-no-eoi; + }; + l3bridge: l3bridge@204400 { compatible = "mstar,l3bridge"; reg = <0x204400 0x200>; From patchwork Fri Sep 18 10:49:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11784677 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E55B5618 for ; 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[153.199.2.183]) by smtp.googlemail.com with ESMTPSA id 131sm2857634pfy.5.2020.09.18.03.50.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 03:50:03 -0700 (PDT) From: Daniel Palmer To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] ARM: mstar: Add interrupt to pm_uart Date: Fri, 18 Sep 2020 19:49:49 +0900 Message-Id: <20200918104949.3260823-4-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200918104949.3260823-1-daniel@0x0f.com> References: <20200918104949.3260823-1-daniel@0x0f.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200918_065007_174451_82ED7C6D X-CRM114-Status: GOOD ( 15.41 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:444 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, arnd@arndb.de, maz@kernel.org, Daniel Palmer , linux-kernel@vger.kernel.org, mark-pk.tsai@mediatek.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Since we now have support for the interrupt controller pm_uart's interrupt is routed through it make sense to wire up it's interrupt in the device tree. The interrupt is the same for all known chips so it goes in the base dtsi. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index aec841b52ca4..f07880561e11 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -113,6 +113,7 @@ pm_uart: uart@221000 { compatible = "ns16550a"; reg = <0x221000 0x100>; reg-shift = <3>; + interrupts-extended = <&intc_irq GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <172000000>; status = "disabled"; };