From patchwork Fri Sep 18 15:02:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11785257 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 339FA6CA for ; Fri, 18 Sep 2020 15:03:16 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 2D7A22311C; Fri, 18 Sep 2020 15:03:16 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-wm1-f66.google.com (mail-wm1-f66.google.com [209.85.128.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7BE0821973; Fri, 18 Sep 2020 15:03:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ue89Aq0z" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7BE0821973 Authentication-Results: mail.kernel.org; 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Fri, 18 Sep 2020 08:03:13 -0700 (PDT) Received: from localhost ([217.111.27.204]) by smtp.gmail.com with ESMTPSA id d23sm5082728wmb.6.2020.09.18.08.03.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 08:03:13 -0700 (PDT) From: Thierry Reding List-Id: To: arm@kernel.org, soc@kernel.org Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 2/6] soc/tegra: Changes for v5.10-rc1 Date: Fri, 18 Sep 2020 17:02:59 +0200 Message-Id: <20200918150303.3938852-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200918150303.3938852-1-thierry.reding@gmail.com> References: <20200918150303.3938852-1-thierry.reding@gmail.com> MIME-Version: 1.0 Hi ARM SoC maintainers, The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.10-soc for you to fetch changes up to 34e214a99689054e666cd4149500a37fa0c5ac98: soc/tegra: pmc: Add Tegra234 support (2020-09-18 15:55:37 +0200) Thanks, Thierry ---------------------------------------------------------------- soc/tegra: Changes for v5.10-rc1 These changes contain a bit of cleanup and chip support for the upcoming Tegra234 SoC. ---------------------------------------------------------------- Thierry Reding (6): soc/tegra: fuse: Extract tegra_get_platform() soc/tegra: fuse: Implement tegra_is_silicon() soc/tegra: fuse: Add Tegra234 support soc/tegra: misc: Add Tegra234 support soc/tegra: pmc: Reorder reset sources/levels definitions soc/tegra: pmc: Add Tegra234 support drivers/soc/tegra/fuse/fuse-tegra.c | 8 +- drivers/soc/tegra/fuse/fuse-tegra30.c | 30 +++++++ drivers/soc/tegra/fuse/fuse.h | 10 ++- drivers/soc/tegra/fuse/tegra-apbmisc.c | 26 ++++++ drivers/soc/tegra/pmc.c | 146 ++++++++++++++++++++++++--------- include/soc/tegra/fuse.h | 3 + 6 files changed, 181 insertions(+), 42 deletions(-) From patchwork Fri Sep 18 15:03:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11785261 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 05A9D6CB for ; Fri, 18 Sep 2020 15:03:19 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 0079B2311B; Fri, 18 Sep 2020 15:03:19 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-wm1-f66.google.com (mail-wm1-f66.google.com [209.85.128.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6351C235F9; Fri, 18 Sep 2020 15:03:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="u77fyfBc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6351C235F9 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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Fri, 18 Sep 2020 08:03:16 -0700 (PDT) Received: from localhost ([217.111.27.204]) by smtp.gmail.com with ESMTPSA id 97sm5578861wrm.15.2020.09.18.08.03.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 08:03:15 -0700 (PDT) From: Thierry Reding List-Id: To: arm@kernel.org, soc@kernel.org Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 3/6] firmware: tegra: Changes for v5.10-rc1 Date: Fri, 18 Sep 2020 17:03:00 +0200 Message-Id: <20200918150303.3938852-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200918150303.3938852-1-thierry.reding@gmail.com> References: <20200918150303.3938852-1-thierry.reding@gmail.com> MIME-Version: 1.0 Hi ARM SoC maintainers, The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.10-firmware for you to fetch changes up to 0ebdf11699d0491c0a1eee5bb5d920f4f36810ba: firmware: tegra: Enable BPMP support on Tegra234 (2020-09-18 15:57:04 +0200) Thanks, Thierry ---------------------------------------------------------------- firmware: tegra: Changes for v5.10-rc1 This is a minor change that implements a BPMP workaround for pre-silicon platforms and is needed to enable support for BPMP on Tegra234. ---------------------------------------------------------------- Thierry Reding (4): soc/tegra: fuse: Extract tegra_get_platform() soc/tegra: fuse: Implement tegra_is_silicon() Merge branch 'for-5.10/soc' into for-5.10/firmware firmware: tegra: Enable BPMP support on Tegra234 drivers/firmware/tegra/bpmp.c | 3 ++- drivers/mailbox/tegra-hsp.c | 9 ++++++++- drivers/soc/tegra/fuse/fuse-tegra.c | 2 +- drivers/soc/tegra/fuse/tegra-apbmisc.c | 24 ++++++++++++++++++++++++ include/soc/tegra/fuse.h | 2 ++ 5 files changed, 37 insertions(+), 3 deletions(-) From patchwork Fri Sep 18 15:03:01 2020 Content-Type: text/plain; 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Fri, 18 Sep 2020 08:03:18 -0700 (PDT) Received: from localhost ([217.111.27.204]) by smtp.gmail.com with ESMTPSA id w15sm5451958wro.46.2020.09.18.08.03.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 08:03:18 -0700 (PDT) From: Thierry Reding List-Id: To: arm@kernel.org, soc@kernel.org Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 4/6] ARM: tegra: Changes for v5.10-rc1 Date: Fri, 18 Sep 2020 17:03:01 +0200 Message-Id: <20200918150303.3938852-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200918150303.3938852-1-thierry.reding@gmail.com> References: <20200918150303.3938852-1-thierry.reding@gmail.com> MIME-Version: 1.0 Hi ARM SoC maintainers, The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.10-arm-dt for you to fetch changes up to c2ef3aa464a70f73f4fc763e6f54f689c2ee6d6a: ARM: tegra: nexus7: Add SMB347 battery charger (2020-09-17 18:09:40 +0200) Thanks, Thierry ---------------------------------------------------------------- ARM: tegra: Changes for v5.10-rc1 These changes extend support on the Nexus 7 and Acer A500 devices. ---------------------------------------------------------------- David Heidelberg (2): dt-bindings: power: supply: Add device-tree binding for Summit SMB3xx ARM: tegra: nexus7: Add SMB347 battery charger Dmitry Osipenko (8): ARM: tegra: nexus7: Add aliases for MMC ARM: tegra: acer-a500: Add aliases for MMC ARM: tegra: acer-a500: Remove atmel,cfg_name property ARM: tegra: acer-a500: Correct PINCTRL configuration ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHz ARM: tegra: acer-a500: Use PLLC for WiFi MMC clock parent ARM: tegra: nexus7: Use PLLC for WiFi MMC clock parent ARM: tegra: nexus7: Add touchscreen Thierry Reding (7): dt-bindings: misc: tegra-apbmisc: Add missing compatible strings dt-bindings: misc: tegra186-misc: Add missing compatible string dt-bindings: misc: tegra186-misc: Add Tegra234 support dt-bindings: tegra: Add Tegra234 VDK compatible dt-bindings: fuse: tegra: Add Tegra234 support dt-bindings: tegra: pmc: Add Tegra234 support Merge branch 'for-5.10/dt-bindings' into for-5.10/arm/dt Documentation/devicetree/bindings/arm/tegra.yaml | 4 + .../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 3 +- .../bindings/fuse/nvidia,tegra20-fuse.txt | 1 + .../bindings/misc/nvidia,tegra186-misc.txt | 8 +- .../bindings/misc/nvidia,tegra20-apbmisc.txt | 13 +- .../power/supply/summit,smb347-charger.yaml | 152 +++++++++++++++++++++ arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 30 ++-- .../dts/tegra30-asus-nexus7-grouper-common.dtsi | 54 +++++++- include/dt-bindings/power/summit,smb347-charger.h | 19 +++ 9 files changed, 264 insertions(+), 20 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml create mode 100644 include/dt-bindings/power/summit,smb347-charger.h From patchwork Fri Sep 18 15:03:02 2020 Content-Type: text/plain; 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Fri, 18 Sep 2020 08:03:21 -0700 (PDT) Received: from localhost ([217.111.27.204]) by smtp.gmail.com with ESMTPSA id f12sm5332971wmf.26.2020.09.18.08.03.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 08:03:20 -0700 (PDT) From: Thierry Reding List-Id: To: arm@kernel.org, soc@kernel.org Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 5/6] arm64: tegra: Changes for v5.10-rc1 Date: Fri, 18 Sep 2020 17:03:02 +0200 Message-Id: <20200918150303.3938852-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200918150303.3938852-1-thierry.reding@gmail.com> References: <20200918150303.3938852-1-thierry.reding@gmail.com> MIME-Version: 1.0 Hi ARM SoC maintainers, The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.10-arm64-dt for you to fetch changes up to 639448912ba17a9af9e759efbab37d36c6e29dea: arm64: tegra: Initial Tegra234 VDK support (2020-09-18 15:58:07 +0200) Thanks, Thierry ---------------------------------------------------------------- arm64: tegra: Changes for v5.10-rc1 This set of changes fixes some minor issues in existing device trees and adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled to allow them to be detected by software. It also adds support for the Tegra234 VDK board, which is a pre-silicon platform for the upcoming Orin SoC. ---------------------------------------------------------------- Jon Hunter (2): arm64: tegra: Add label properties for EEPROMs arm64: tegra: Populate EEPROMs for Jetson Xavier NX Sameer Pujar (2): arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano arm64: tegra: Add DT binding for AHUB components Thierry Reding (8): arm64: tegra: Add ID EEPROMs on Jetson AGX Xavier arm64: tegra: Wire up pinctrl states for all DPAUX controllers arm64: tegra: Add VBUS supply for micro USB port on Jetson Nano arm64: tegra: Disable SD card write-protection on Jetson Nano arm64: tegra: Describe display controller outputs for Tegra210 arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210 arm64: tegra: Properly size register regions for GPU on Tegra194 arm64: tegra: Initial Tegra234 VDK support arch/arm64/boot/dts/nvidia/Makefile | 1 + arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 1 + arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 1 + arch/arm64/boot/dts/nvidia/tegra186.dtsi | 217 +++++++++++++++++- arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 16 ++ arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 14 ++ .../dts/nvidia/tegra194-p3509-0000+p3668-0000.dts | 14 ++ .../arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi | 16 ++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 247 ++++++++++++++++++++- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 3 +- arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 1 + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 29 ++- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 150 ++++++++++++- arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts | 40 ++++ arch/arm64/boot/dts/nvidia/tegra234.dtsi | 189 ++++++++++++++++ drivers/soc/tegra/Kconfig | 10 + include/dt-bindings/clock/tegra234-clock.h | 14 ++ include/dt-bindings/reset/tegra234-reset.h | 10 + 18 files changed, 961 insertions(+), 12 deletions(-) create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts create mode 100644 arch/arm64/boot/dts/nvidia/tegra234.dtsi create mode 100644 include/dt-bindings/clock/tegra234-clock.h create mode 100644 include/dt-bindings/reset/tegra234-reset.h From patchwork Fri Sep 18 15:03:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 11785267 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 608886CB for ; Fri, 18 Sep 2020 15:03:26 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 5B39623719; Fri, 18 Sep 2020 15:03:26 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-wm1-f66.google.com (mail-wm1-f66.google.com [209.85.128.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E24F5235FA; Fri, 18 Sep 2020 15:03:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ecmiKztU" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E24F5235FA Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; 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Fri, 18 Sep 2020 08:03:23 -0700 (PDT) Received: from localhost ([217.111.27.204]) by smtp.gmail.com with ESMTPSA id u66sm20220846wme.1.2020.09.18.08.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 08:03:22 -0700 (PDT) From: Thierry Reding List-Id: To: arm@kernel.org, soc@kernel.org Cc: Thierry Reding , Jon Hunter , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [GIT PULL 6/6] arm64: tegra: Default configuration updates for v5.10-rc1 Date: Fri, 18 Sep 2020 17:03:03 +0200 Message-Id: <20200918150303.3938852-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200918150303.3938852-1-thierry.reding@gmail.com> References: <20200918150303.3938852-1-thierry.reding@gmail.com> MIME-Version: 1.0 Hi ARM SoC maintainers, The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.10-arm64-defconfig for you to fetch changes up to ff4c371d2bc0b4e5d3fe890b89a61ae049e613bf: arm64: defconfig: Build ADMA and ACONNECT driver (2020-09-02 11:38:48 +0200) Thanks, Thierry ---------------------------------------------------------------- arm64: tegra: Default configuration updates for v5.10-rc1 This pair of patches enable the ADMA, ACONNECT and AHUB drivers that are required for audio support on Tegra210 and later. ---------------------------------------------------------------- Sameer Pujar (2): arm64: defconfig: Build AHUB component drivers arm64: defconfig: Build ADMA and ACONNECT driver arch/arm64/configs/defconfig | 8 ++++++++ 1 file changed, 8 insertions(+)