From patchwork Fri Sep 25 02:41:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798679 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C5A0A6CB for ; Fri, 25 Sep 2020 02:41:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AD2FA2137B for ; Fri, 25 Sep 2020 02:41:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="hN6DhMb7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726998AbgIYClv (ORCPT ); Thu, 24 Sep 2020 22:41:51 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:49576 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726676AbgIYClv (ORCPT ); Thu, 24 Sep 2020 22:41:51 -0400 Received: from mailhost.synopsys.com (sv1-mailhost1.synopsys.com [10.205.2.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id B098DC0A93; Fri, 25 Sep 2020 02:41:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001710; bh=M+AmUbNU7VbWo3dsrgXe6QQWS3ueocNRiQDwfiq0WLE=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=hN6DhMb7Co/fTjPbaVDTV1M7lA/4W8sQmNYVLJdGHfuz7l27E8TqYks6oTZwoJ3C5 bqjOy7sz7IfQLmeqyjBy55AJiRrI9sB5nKGHhtIZa2KiG0e4gA3gf4R6CCgS1rVL7Z BfiZqPJko8oIyZQHjrNX76xusWmN/SoJHnvL1KsYquF0yRPH5HI0IXlbbsQzWmsy4Y 6E5Zza9WJo+pKrNLBlO8/GO7ORNfHBjV3xZpNQlFuGmPGHniZfnlrqV+UJttZW1Uui 3+kzj+PaVXDVTzL7m6EFQY2/CcuKHowd7dEAllJkGCzRIqnxn8kq/zsI8+FxYH+y9M Gp4WKn3syKSzA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 2DD91A01F2; Fri, 25 Sep 2020 02:41:49 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:41:49 -0700 Date: Thu, 24 Sep 2020 19:41:49 -0700 Message-Id: <069433c7c7dc08220cc4a4a2154cf36c57b411af.1601001199.git.Thinh.Nguyen@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 01/12] usb: ch9: Add sublink speed struct To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org USB 3.2 specification supports dual-lane for super-speed-plus. USB devices may operate at different sublink speeds. To avoid using magic numbers and capture the sublink speed better, introduce the usb_sublink_speed structure and various sublink speed attribute enum. See SSP BOS descriptor in USB 3.2 specification section 9.6.2.5 Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - None Changes in v2: - Move to include/linux/usb/ch9.h instead of under uapi include/linux/usb/ch9.h | 43 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h index 604c6c514a50..01191649a0ad 100644 --- a/include/linux/usb/ch9.h +++ b/include/linux/usb/ch9.h @@ -36,6 +36,49 @@ #include #include +/* USB 3.2 sublink speed attributes */ + +enum usb_lane_speed_exponent { + USB_LSE_BPS = 0, + USB_LSE_KBPS = 1, + USB_LSE_MBPS = 2, + USB_LSE_GBPS = 3, +}; + +enum usb_sublink_type { + USB_ST_SYMMETRIC_RX = 0, + USB_ST_ASYMMETRIC_RX = 1, + USB_ST_SYMMETRIC_TX = 2, + USB_ST_ASYMMETRIC_TX = 3, +}; + +enum usb_link_protocol { + USB_LP_SS = 0, + USB_LP_SSP = 1, +}; + +/** + * struct usb_sublink_speed - sublink speed attribute + * @id: sublink speed attribute ID (SSID) + * @mantissa: lane speed mantissa + * @exponent: lane speed exponent + * @type: sublink type + * @protocol: sublink protocol + * + * Super-speed-plus supports multiple lanes. Use the sublink speed attributes to + * describe the sublink speed. + * + * See USB 3.2 spec section 9.6.2.6 for super-speed-plus capability for more + * information. + */ +struct usb_sublink_speed { + u8 id; + u16 mantissa; + enum usb_lane_speed_exponent exponent; + enum usb_sublink_type type; + enum usb_link_protocol protocol; +}; + /** * usb_ep_type_string() - Returns human readable-name of the endpoint type. * @ep_type: The endpoint type to return human-readable name for. If it's not From patchwork Fri Sep 25 02:41:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798681 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5FBAF618 for ; Fri, 25 Sep 2020 02:41:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 45CA72137B for ; Fri, 25 Sep 2020 02:41:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="KVYbf/7a" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727001AbgIYCl4 (ORCPT ); Thu, 24 Sep 2020 22:41:56 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:50840 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726676AbgIYCl4 (ORCPT ); Thu, 24 Sep 2020 22:41:56 -0400 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 8986940624; Fri, 25 Sep 2020 02:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001716; bh=8l/GVZ17sZ3USu+VODs6NCh+KNQN9GtyfPnsp0Ql4ks=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=KVYbf/7aSGtVl9e+ZTxLuC+NMjW/xr6Ys2ErDTOwbO4WRf+tLvd8IV2lfOZe8zfVJ AT7llz6zrrOlmMfzfSfE83Ck8zbnw19WR1Ic/U3HAxowylw+1RBjRIuBK2C1teSPqX mL1t9P4eFvDjEMQ1Z3poenayCpQveWXfeA9l1t5zQlfRkOvmjBUxT+ZK8alkepbEV0 icUiekNI1ChEmgjdYnT7oWcQCelsDHF4BkF0csIBDgmYIpVm77D4jjGOy5IomUU9uN 8B3QhhY2Hp2QX+6fNLwqBJRVyUvhajtGaGvVyTANrs44BCOKJXETwpWj88MRbwe3Mf 7U2wonNiNEExw== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 6F979A0072; Fri, 25 Sep 2020 02:41:55 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:41:55 -0700 Date: Thu, 24 Sep 2020 19:41:55 -0700 Message-Id: <05d4a29c193a18ec7b1c3d020340972b6925a9d5.1601001199.git.Thinh.Nguyen@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 02/12] usb: gadget: composite: Avoid using magic numbers To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Magic numbers are difficult to read. Use macros for super-speed-plus BOS descriptor attributes in the composite driver. They're self-documented. So there's no need to provide comments as we did previously for the magic numbers. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - None Changes in v2: - None drivers/usb/gadget/composite.c | 41 +++++++++++++++++----------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index 05b176c82cc5..0aa4cb49aa53 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -743,32 +744,30 @@ static int bos_desc(struct usb_composite_dev *cdev) ssp_cap->bReserved = 0; ssp_cap->wReserved = 0; - /* SSAC = 1 (2 attributes) */ - ssp_cap->bmAttributes = cpu_to_le32(1); + ssp_cap->bmAttributes = + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, 1) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, 0)); - /* Min RX/TX Lane Count = 1 */ ssp_cap->wFunctionalitySupport = - cpu_to_le16((1 << 8) | (1 << 12)); + cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID, 0) | + FIELD_PREP(USB_SSP_MIN_RX_LANE_COUNT, 1) | + FIELD_PREP(USB_SSP_MIN_TX_LANE_COUNT, 1)); - /* - * bmSublinkSpeedAttr[0]: - * ST = Symmetric, RX - * LSE = 3 (Gbps) - * LP = 1 (SuperSpeedPlus) - * LSM = 10 (10 Gbps) - */ ssp_cap->bmSublinkSpeedAttr[0] = - cpu_to_le32((3 << 4) | (1 << 14) | (0xa << 16)); - /* - * bmSublinkSpeedAttr[1] = - * ST = Symmetric, TX - * LSE = 3 (Gbps) - * LP = 1 (SuperSpeedPlus) - * LSM = 10 (10 Gbps) - */ + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, + USB_ST_SYMMETRIC_RX) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); + ssp_cap->bmSublinkSpeedAttr[1] = - cpu_to_le32((3 << 4) | (1 << 14) | - (0xa << 16) | (1 << 7)); + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, + USB_ST_SYMMETRIC_TX) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); } return le16_to_cpu(bos->wTotalLength); From patchwork Fri Sep 25 02:42:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798683 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7A7BE618 for ; Fri, 25 Sep 2020 02:42:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6122A20888 for ; Fri, 25 Sep 2020 02:42:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="TmH8f4hm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727030AbgIYCmD (ORCPT ); Thu, 24 Sep 2020 22:42:03 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:49582 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726990AbgIYCmD (ORCPT ); Thu, 24 Sep 2020 22:42:03 -0400 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id B27D2C0A93; Fri, 25 Sep 2020 02:42:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001722; bh=77dUfacIhRN8HDEa/BFL/KRuRVFdCOUodZT/srfGE1s=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=TmH8f4hmxh0ID/5B5DfVQNdzPVBGvbZ4X5hHm3xNDXr5L0itsezF9MAnrN6WI2HCH DVW01zK1x9yrIYgvTxI++byBnGkdjSD2UOFLmEijlG/3oUebX/rA7IhfNEQx/tcXCP XqFd1fes5hnYLDy4ozGpI3MqfZnDHmWtgi3vkswy7Eg1m0HTiZlgj2wtMPj5VX07ms VKbIJlPGCK735AJypJG0PQHiJbaCLSNBRuGHfvz26UfudX9eu1Swd72MVIMB5RGFH2 6HUOpROjWNH6UvQqObF/YFvD1bm+g/nzHNtSc0wLy4v3DvH7Jyf/bDh1XSjPlbQx5g 8EAreieTc9Q1Q== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 82DF4A0072; Fri, 25 Sep 2020 02:42:01 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:01 -0700 Date: Thu, 24 Sep 2020 19:42:01 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 03/12] usb: gadget: Expose sublink speed attributes To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The USB 3.2 specification supports dual-lane and different transfer rates for super-speed-plus. Devices operating in super-speed-plus can be gen2x1, gen1x2, or gen2x2. A gadget driver may need to know the gadget's sublink speeds to properly setup its transfer requests and describe its capability in its descriptors. To describe the transfer rate in super-speed-plus fully, let's expose the lane count and sublink speed attributes when operating in super-speed-plus. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - Change unsigned fields to unsigned int Changes in v3: - None Changes in v2: - None include/linux/usb/gadget.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index e7351d64f11f..cd9433f5a602 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -339,6 +339,15 @@ struct usb_gadget_ops { * @speed: Speed of current connection to USB host. * @max_speed: Maximal speed the UDC can handle. UDC must support this * and all slower speeds. + * @num_lanes: Number of lanes in use. + * @max_num_lanes: Maximum number of lanes the UDC supports. + * @ssac: Sublink speed attribute count. The number of sublink speed + * attributes is ssac + 1. + * @sublink_speed: Array of sublink speed attributes the UDC supports. Sublink + * speed attributes are paired, and an RX followed by a TX attribute. + * @speed_ssid: Current sublink speed attribute ID in use. + * @min_speed_ssid: Sublink speed attribute ID with the minimum speed. + * @max_speed_ssid: Sublink speed attribute ID with the maximum speed. * @state: the state we are now (attached, suspended, configured, etc) * @name: Identifies the controller hardware type. Used in diagnostics * and sometimes configuration. @@ -406,6 +415,17 @@ struct usb_gadget { struct list_head ep_list; /* of usb_ep */ enum usb_device_speed speed; enum usb_device_speed max_speed; + + /* SSP only */ + unsigned int num_lanes; + unsigned int max_num_lanes; + unsigned int ssac; +#define USB_GADGET_MAX_SSAC 3 + struct usb_sublink_speed sublink_speed[USB_GADGET_MAX_SSAC + 1]; + unsigned int speed_ssid; + unsigned int min_speed_ssid; + unsigned int max_speed_ssid; + enum usb_device_state state; const char *name; struct device dev; From patchwork Fri Sep 25 02:42:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798689 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C7B7B618 for ; Fri, 25 Sep 2020 02:42:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A6C7220EDD for ; Fri, 25 Sep 2020 02:42:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="lPJZz2hU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727032AbgIYCmK (ORCPT ); Thu, 24 Sep 2020 22:42:10 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:50854 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726829AbgIYCmJ (ORCPT ); Thu, 24 Sep 2020 22:42:09 -0400 Received: from mailhost.synopsys.com (sv2-mailhost2.synopsys.com [10.205.2.134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 485A540624; Fri, 25 Sep 2020 02:42:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001729; bh=TBeZIl7QPvmU04DUqCJEnXFPm+UzA1btzjRp1kVqZgM=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=lPJZz2hUVqHgxGo7PNHBlZ8Yv3lGrmA/kaymSufXHrJUcwzpN9n33Bsoe21pMFZ2V aXpjJ0MlbcheyCTh9XAU8R443EjjZG06FtL3pPoabUqxCcqaQgI/cDL19njHK9vjlO mNFEEnzddDMP+uQqAcjvP5XytlpzfgpOo+UeDI7rXQo9ErpzkkRsjbIY49S4aWIC4F a48VraHfc71+e05Cv/RCaX5Zu9TitHeIMS2uApzy1FhRN+qGOT/PmWN8dP3vcqXna0 oDt5qbFicOzRAEZtGVT0wNqHG7p4cGHd4a61C/SWX86SbDLy0F7ORzMfrPS4eZluly eKnk4YYEFmTtA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 9883CA0099; Fri, 25 Sep 2020 02:42:07 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:07 -0700 Date: Thu, 24 Sep 2020 19:42:07 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 04/12] usb: gadget: Set max speed for SSP devices To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org, Peter Chen , Lee Jones , Alan Stern , Dejin Zheng , Jun Li , Marek Szyprowski Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org A super-speed-plus device may operate at different sublink speeds (e.g. gen2x2, gen1x2, or gen2x1). If the USB device supports different sublink speeds at super-speed-plus, set the device to operate at the maximum number of lanes and sublink speed possible. Introduce gadget ops udc_set_num_lanes_and_speed to set the lane count and sublink speed for super-speed-plus capable devices. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - Add identifier name for usb_gadget in gadget ops (*udc_set_num_lanes_and_speed) to avoid checkpatch warning Changes in v3: - None Changes in v2: - None drivers/usb/gadget/udc/core.c | 24 +++++++++++++++++++----- include/linux/usb/gadget.h | 3 +++ 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c index debf54205d22..10c0903cf311 100644 --- a/drivers/usb/gadget/udc/core.c +++ b/drivers/usb/gadget/udc/core.c @@ -1117,12 +1117,26 @@ static inline void usb_gadget_udc_stop(struct usb_udc *udc) static inline void usb_gadget_udc_set_speed(struct usb_udc *udc, enum usb_device_speed speed) { - if (udc->gadget->ops->udc_set_speed) { - enum usb_device_speed s; + struct usb_gadget *gadget = udc->gadget; + enum usb_device_speed s; - s = min(speed, udc->gadget->max_speed); - udc->gadget->ops->udc_set_speed(udc->gadget, s); - } + if (speed == USB_SPEED_UNKNOWN) + s = gadget->max_speed; + else + s = min(speed, gadget->max_speed); + + /* + * If the UDC supports super-speed-plus and different sublink speeds, + * then set the gadget to the max possible sublink speed for + * super-speed-plus symmetric lanes. + */ + if (s == USB_SPEED_SUPER_PLUS && + gadget->ops->udc_set_num_lanes_and_speed) + gadget->ops->udc_set_num_lanes_and_speed(gadget, + gadget->max_num_lanes, + gadget->max_speed_ssid); + else if (gadget->ops->udc_set_speed) + gadget->ops->udc_set_speed(gadget, s); } /** diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index cd9433f5a602..cccf3b0fba0a 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -323,6 +323,9 @@ struct usb_gadget_ops { struct usb_gadget_driver *); int (*udc_stop)(struct usb_gadget *); void (*udc_set_speed)(struct usb_gadget *, enum usb_device_speed); + void (*udc_set_num_lanes_and_speed)(struct usb_gadget *gadget, + unsigned int num_lanes, + unsigned int ssid); struct usb_ep *(*match_ep)(struct usb_gadget *, struct usb_endpoint_descriptor *, struct usb_ss_ep_comp_descriptor *); From patchwork Fri Sep 25 02:42:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798691 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5B53D6CB for ; Fri, 25 Sep 2020 02:42:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 42F5F2137B for ; Fri, 25 Sep 2020 02:42:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="Eka6jWkX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727035AbgIYCmP (ORCPT ); Thu, 24 Sep 2020 22:42:15 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:50866 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726829AbgIYCmP (ORCPT ); Thu, 24 Sep 2020 22:42:15 -0400 Received: from mailhost.synopsys.com (sv1-mailhost1.synopsys.com [10.205.2.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 7EEBD408D3; Fri, 25 Sep 2020 02:42:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001735; bh=NsKC0NOipmiCvThxY3rTEBe+guJI/7VBpBjzzrO/W84=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=Eka6jWkXB+xQPxAl6hexWh2947N0A8VdsTHuMi5dpaw15Bc2NQVihzEh3rLaOTb5r KctgrJrGbu0ueZnNDXp+1k4Gr2+a+G8L0KJUzLUbeBnMrYIEEe/Xd8rq7Z8/EjWMGn FZnV0cAPyL/UOCm0vkbWk8HRDxaxDBBVH7ce+PQ6hseqZNRTsAdixnutoRNH7UezLr prsboFxrj1VakZn7XHi4e0wNgpcxrniLooJtdDpNkO9YLlPveQWPUc6cL3+qwzFCdM j9kcPZw+HB8Qk+sBDA2+ywyCQjHSsi806doidgT49Yy6Uqe6tIVfPbbx/0qGbnshKu 4dt1/sZb8DPOA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 44EA8A01F3; Fri, 25 Sep 2020 02:42:14 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:14 -0700 Date: Thu, 24 Sep 2020 19:42:14 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 05/12] usb: composite: Properly report sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Use the max sublink speed attributes reported in the gadget structure to write to the super-speed-plus BOS descriptor if available. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - None Changes in v2: - None drivers/usb/gadget/composite.c | 76 +++++++++++++++++++++++----------- 1 file changed, 52 insertions(+), 24 deletions(-) diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index 0aa4cb49aa53..2d0b7af4b08f 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -729,45 +729,73 @@ static int bos_desc(struct usb_composite_dev *cdev) /* The SuperSpeedPlus USB Device Capability descriptor */ if (gadget_is_superspeed_plus(cdev->gadget)) { struct usb_ssp_cap_descriptor *ssp_cap; + unsigned int ssac = 1; + unsigned int ssic = 0; + unsigned int min_ssid = 0; + int i; + + if (cdev->gadget->ssac) { + ssac = cdev->gadget->ssac; + + /* + * Paired RX and TX sublink speed attributes share + * the same SSID. + */ + ssic = (ssac + 1) / 2 - 1; + min_ssid = cdev->gadget->min_speed_ssid; + } ssp_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength); bos->bNumDeviceCaps++; - /* - * Report typical values. - */ - - le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SSP_CAP_SIZE(1)); - ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(1); + le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SSP_CAP_SIZE(ssac)); + ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(ssac); ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE; ssp_cap->bReserved = 0; ssp_cap->wReserved = 0; ssp_cap->bmAttributes = - cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, 1) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, 0)); + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, ssac) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, ssic)); ssp_cap->wFunctionalitySupport = - cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID, 0) | + cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID, min_ssid) | FIELD_PREP(USB_SSP_MIN_RX_LANE_COUNT, 1) | FIELD_PREP(USB_SSP_MIN_TX_LANE_COUNT, 1)); - ssp_cap->bmSublinkSpeedAttr[0] = - cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, - USB_ST_SYMMETRIC_RX) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); - - ssp_cap->bmSublinkSpeedAttr[1] = - cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, 0) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, USB_LSE_GBPS) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, - USB_ST_SYMMETRIC_TX) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, USB_LP_SSP) | - FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, 10)); + /* + * If the sublink speed attributes are not specified, then the + * default will be a pair symmetric RX/TX sublink speed + * attributes of 10 Gbps. + */ + for (i = 0; i < ssac + 1; i++) { + struct usb_sublink_speed default_ssa; + struct usb_sublink_speed *ptr; + + if (cdev->gadget->ssac) { + ptr = &cdev->gadget->sublink_speed[i]; + } else { + default_ssa.id = i / 2; + default_ssa.protocol = USB_LP_SSP; + default_ssa.exponent = USB_LSE_GBPS; + default_ssa.mantissa = 10; + + if (i % 2) + default_ssa.type = USB_ST_SYMMETRIC_TX; + else + default_ssa.type = USB_ST_SYMMETRIC_RX; + + ptr = &default_ssa; + } + + ssp_cap->bmSublinkSpeedAttr[i] = + cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, ptr->id) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, ptr->exponent) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, ptr->type) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, ptr->protocol) | + FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, ptr->mantissa)); + } } return le16_to_cpu(bos->wTotalLength); From patchwork Fri Sep 25 02:42:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798693 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 93AB56CB for ; Fri, 25 Sep 2020 02:42:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 78AF620EDD for ; Fri, 25 Sep 2020 02:42:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="kANvUler" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727036AbgIYCmW (ORCPT ); Thu, 24 Sep 2020 22:42:22 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:50874 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbgIYCmV (ORCPT ); Thu, 24 Sep 2020 22:42:21 -0400 Received: from mailhost.synopsys.com (sv1-mailhost1.synopsys.com [10.205.2.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 6F8FB408D3; Fri, 25 Sep 2020 02:42:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001741; bh=9j9IOKYQ+2iz0WIvVdK47pVCx84Ln+dxrwyZJRqySVo=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=kANvUlerY5g2/SX2sECo+zhu2+JGOmKmHHNLux27ibSD3jLi/5qM+JGPnZDzuscXJ 1sO6HFnpwddPHPTbnHhXblPwn9MVeKm5vjpqDYHruOwTDzyBv34sKZjDQxMBl+BiRo cyCdPH3SmY7vAGBUTvKKOy83+77Qq2PPDop5EzZ/tfyIQC1DaOg/avhORkARkOOSrj jlf3V5nARDi07dX4LlaHX9btAa/X1nJiAborY+0K2n6s8gumLdi2nPkqeQfpTV10VA JdoMGh7B7l8+y+M9x3OXP36+DMki/kWwFQ7mLQw7VvbUFw5HHgmB6UENxd4675o0DT NxJhJ2+YrTQ3Q== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 576E7A01F1; Fri, 25 Sep 2020 02:42:20 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:20 -0700 Date: Thu, 24 Sep 2020 19:42:20 -0700 Message-Id: <675520b99f9648e8d4f08dd389b1d93c580ffabd.1601001199.git.Thinh.Nguyen@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 06/12] usb: devicetree: Include USB SSP Gen X x Y To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org According to the USB 3.2 spec, a super-speed-plus device can operate at gen2x2, gen2x1, or gen1x2. If the USB controller device supports multiple lanes at different transfer rates, the user can specify the HW capability via these new speed strings: "super-speed-plus-gen2x2" "super-speed-plus-gen2x1" "super-speed-plus-gen1x2" If the argument is simply "super-speed-plus", USB controllers should default to their maximum transfer rate and number of lanes. Reviewed-by: Rob Herring Signed-off-by: Thinh Nguyen --- Changes in v5: - Add Reviewed-by: Rob Herring - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - Use "maximum-speed" to include both the num-lane and transfer rate for SSP - Remove "num-lanes" and "lane-speed-mantissa-gbps" properties Changes in v2: - Make "num-lanes" and "lane-speed-mantissa-gbps" common USB properties Documentation/devicetree/bindings/usb/generic.txt | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/generic.txt b/Documentation/devicetree/bindings/usb/generic.txt index ba472e7aefc9..8541b9571f2f 100644 --- a/Documentation/devicetree/bindings/usb/generic.txt +++ b/Documentation/devicetree/bindings/usb/generic.txt @@ -3,10 +3,13 @@ Generic USB Properties Optional properties: - maximum-speed: tells USB controllers we want to work up to a certain speed. Valid arguments are "super-speed-plus", - "super-speed", "high-speed", "full-speed" and - "low-speed". In case this isn't passed via DT, USB - controllers should default to their maximum HW - capability. + "super-speed-plus-gen2x2", "super-speed-plus-gen2x1", + "super-speed-plus-gen1x2", "super-speed", "high-speed", + "full-speed" and "low-speed". In case this isn't passed + via DT, USB controllers should default to their maximum + HW capability. Similarly, if the argument is + "super-speed-plus", USB controllers should default to + their maximum transfer rate and number of lanes. - dr_mode: tells Dual-Role USB controllers that we want to work on a particular mode. Valid arguments are "host", "peripheral" and "otg". In case this attribute isn't From patchwork Fri Sep 25 02:42:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798695 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 92EC6618 for ; Fri, 25 Sep 2020 02:42:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 77F372137B for ; Fri, 25 Sep 2020 02:42:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="WdulwM8v" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727039AbgIYCm2 (ORCPT ); Thu, 24 Sep 2020 22:42:28 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:50882 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbgIYCm1 (ORCPT ); Thu, 24 Sep 2020 22:42:27 -0400 Received: from mailhost.synopsys.com (sv2-mailhost2.synopsys.com [10.205.2.134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 820E9409E3; Fri, 25 Sep 2020 02:42:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001747; bh=h9Xwf0J43xLa6QHPltBUdAuGjj2TaDoKU/QghT5cA0o=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=WdulwM8v5OUpeHCTt6zESVkAGbJ5PlSZugoMV2MjBZrANRAIFoFs7GTki5DpWhO9E VNOw+58UbM2hk4AwQas6KRc8QEAs5gDc9MyAVMKdFhkvd1yr+VfAa5kdeIj3aW+Iq+ dat68h4Khkh1jVEszKTDt9uGWTJUYqEJ3DuLrT1v1XOeMqVpMDDftHr6Fs1FdJ0Oq2 ooQXeDMH9oo570cZNn1xfDXF31elxBNHTmONueg3uXwuUwrRxJEovnfmUjOcFSSvLa WfG+ULKWVv5ihUzYtgEvcmVT8vy+8gwALgMVkX6MK4awRdR1qD+HjvNgBjNOCo5y2V lS8ynCKf1iiJw== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 6B1EAA0099; Fri, 25 Sep 2020 02:42:26 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:26 -0700 Date: Thu, 24 Sep 2020 19:42:26 -0700 Message-Id: <4e7420d94d109a073d635172778dacf394fbe9aa.1601001199.git.Thinh.Nguyen@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 07/12] usb: common: Add and update common functions for SSP speeds To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The USB "maximum-speed" property now can take these new strings for super-speed-plus: "super-speed-plus-gen2x2" "super-speed-plus-gen2x1" "super-speed-plus-gen1x2" As a result, let's do the follow: * Update usb_get_maximum_speed() to parse these new speed strings * Add 2 new common functions to get the Gen number and number of lanes Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - Create 2 functions to get the SSP gen and number of lanes from "maximum-speed" property - Update usb_get_maximum_speed() to check new SSP strings with genXxY - Update commit message and subject title to reflect the new changes Changes in v3: - Add new function to parse "maximum-speed" for lanes and transfer rate - Remove separate functions getting num_lanes and transfer rate properties Changes in v2: - New commit drivers/usb/common/common.c | 46 ++++++++++++++++++++++++++++++++++++- include/linux/usb/ch9.h | 30 ++++++++++++++++++++++++ 2 files changed, 75 insertions(+), 1 deletion(-) diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c index 1433260d99b4..b3b3972d5be7 100644 --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c @@ -86,12 +86,56 @@ enum usb_device_speed usb_get_maximum_speed(struct device *dev) if (ret < 0) return USB_SPEED_UNKNOWN; - ret = match_string(speed_names, ARRAY_SIZE(speed_names), maximum_speed); + if (strncmp("super-speed-plus-gen2x2", maximum_speed, 23) == 0 || + strncmp("super-speed-plus-gen2x1", maximum_speed, 23) == 0 || + strncmp("super-speed-plus-gen1x2", maximum_speed, 23) == 0) + return USB_SPEED_SUPER_PLUS; + ret = match_string(speed_names, ARRAY_SIZE(speed_names), maximum_speed); return (ret < 0) ? USB_SPEED_UNKNOWN : ret; } EXPORT_SYMBOL_GPL(usb_get_maximum_speed); +u8 usb_get_ssp_num_lanes(struct device *dev) +{ + const char *maximum_speed; + int ret; + + ret = device_property_read_string(dev, "maximum-speed", &maximum_speed); + if (ret < 0) + return 0; + + if (strncmp("super-speed-plus-gen2x1", maximum_speed, 23) == 0) + return 1; + + if (strncmp("super-speed-plus-gen2x2", maximum_speed, 23) == 0 || + strncmp("super-speed-plus-gen1x2", maximum_speed, 23) == 0) + return 2; + + return 0; +} +EXPORT_SYMBOL_GPL(usb_get_ssp_num_lanes); + +enum usb_phy_gen usb_get_ssp_phy_gen(struct device *dev) +{ + const char *maximum_speed; + int ret; + + ret = device_property_read_string(dev, "maximum-speed", &maximum_speed); + if (ret < 0) + return USB_PHY_GEN_UNKNOWN; + + if (strncmp("super-speed-plus-gen1x2", maximum_speed, 23) == 0) + return USB_PHY_GEN_1; + + if (strncmp("super-speed-plus-gen2x2", maximum_speed, 23) == 0 || + strncmp("super-speed-plus-gen2x1", maximum_speed, 23) == 0) + return USB_PHY_GEN_2; + + return USB_PHY_GEN_UNKNOWN; +} +EXPORT_SYMBOL_GPL(usb_get_ssp_phy_gen); + const char *usb_state_string(enum usb_device_state state) { static const char *const names[] = { diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h index 01191649a0ad..bd13d27551e5 100644 --- a/include/linux/usb/ch9.h +++ b/include/linux/usb/ch9.h @@ -57,6 +57,13 @@ enum usb_link_protocol { USB_LP_SSP = 1, }; +/* USB phy signaling rate generation */ +enum usb_phy_gen { + USB_PHY_GEN_UNKNOWN, + USB_PHY_GEN_1, + USB_PHY_GEN_2, +}; + /** * struct usb_sublink_speed - sublink speed attribute * @id: sublink speed attribute ID (SSID) @@ -105,6 +112,29 @@ extern const char *usb_speed_string(enum usb_device_speed speed); */ extern enum usb_device_speed usb_get_maximum_speed(struct device *dev); +/** + * usb_get_ssp_num_lanes - Get requested number of lanes for a given + * super-speed-plus capable USB controller. + * @dev: Pointer to the given USB controller device + * + * If the string from "maximum-speed" property is super-speed-plus-genXxY where + * 'Y' is the number of lanes, then this function returns 1 for single lane and + * 2 for dual-lane base on 'Y'. If the number of lanes is not specified, then it + * returns 0. + */ +extern u8 usb_get_ssp_num_lanes(struct device *dev); + +/** + * usb_get_ssp_phy_gen - Get requested phy signaling rate generation for a given + * super-speed-plus capable USB controller. + * @dev: Pointer to the given USB controller device + * + * If the string from "maximum-speed" property is super-speed-plus-genXxY where + * 'X' is the Gen number, then this function returns the corresponding enum + * usb_phy_gen base on 'X'. + */ +extern enum usb_phy_gen usb_get_ssp_phy_gen(struct device *dev); + /** * usb_state_string - Returns human readable name for the state. * @state: The state to return a human-readable name for. If it's not From patchwork Fri Sep 25 02:42:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798697 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DAEBD6CB for ; Fri, 25 Sep 2020 02:42:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C0C7920EDD for ; Fri, 25 Sep 2020 02:42:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="QD5glZFx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727043AbgIYCme (ORCPT ); Thu, 24 Sep 2020 22:42:34 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:50896 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbgIYCme (ORCPT ); Thu, 24 Sep 2020 22:42:34 -0400 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 936D3402B8; Fri, 25 Sep 2020 02:42:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001753; bh=y4u84g/113wiag3sp+ax7YlPusCCWmtle61tl7AZIEM=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=QD5glZFxEzd1H8Xzw3g3fDXAlUXou5DiCxN1k7Ew26qoIQma5Pbyvjni+b/bs/eML lcDmiy9asO5gGBGiWhllzlolHMWL7m6VCzl+98y2u6db3ozdodRvBPpUw4tuFONM1d 9g91JLhkl+HHant5TIFoGSKmH6T+Q0kW7v8srAlJeHbGxwrPiPW/6GM2fqD6qP17cs OKFtdqy8cNffnB0/nfLT+m/R8BtVHbDXkXLjgobEo40CK6iB7psdr3odr4RPZDav1O nz5cWaqKCT6IFRaWNChKNwRpKhs/yDtrcNRMQOyfIQ95NwE0Dd7xmidelkNhxza9XW mRkVoCEBZ6oIA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 7D760A0072; Fri, 25 Sep 2020 02:42:32 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:32 -0700 Date: Thu, 24 Sep 2020 19:42:32 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 08/12] usb: dwc3: Initialize lane count and sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org DWC_usb32 supports dual-lane operating at different sublink speeds. Initialize and validate the maximum number of lanes and speed the controller supports in the maximum_speed property. Currently the controller has no visibility into the HW parameter to determine the maximum number of lanes the HW supports. If the number of lanes is not specified, then set the default to 2 for DWC_usb32 and 1 for DWC_usb31 for SSP. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - Use new common funtions to get SSP Gen and number of lanes Changes in v3: - Use new common function to get maximum-speed - Remove num_lanes and lsm validation since they are no longer separate properties - Replace dwc->maxmum_lsm field with dwc->maximum_ssp_rate for gen1/gen2 Changes in v2: - Use common functions to get num_lanes and lsm properties drivers/usb/dwc3/core.c | 29 +++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 6 ++++++ 2 files changed, 35 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 385262f6747d..ea8d57749ea7 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1267,6 +1267,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) hird_threshold = 12; dwc->maximum_speed = usb_get_maximum_speed(dev); + dwc->maximum_phy_gen = usb_get_ssp_phy_gen(dev); + dwc->maximum_num_lanes = usb_get_ssp_num_lanes(dev); dwc->dr_mode = usb_get_dr_mode(dev); dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); @@ -1435,6 +1437,33 @@ static void dwc3_check_params(struct dwc3 *dwc) } break; } + + /* + * Currently the controller does not have visibility into the HW + * parameter to determine the maximum number of lanes the HW + * supports. If the number of lanes is not specified in the + * device property, then set the default to 2 for DWC_usb32 and + * 1 for DWC_usb31 for super-speed-plus. + */ + if (dwc->maximum_speed == USB_SPEED_SUPER_PLUS) { + if (DWC3_IP_IS(DWC32)) { + if (dwc->maximum_phy_gen == USB_PHY_GEN_UNKNOWN) + dwc->maximum_phy_gen = USB_PHY_GEN_2; + + if (!dwc->maximum_num_lanes) + dwc->maximum_num_lanes = 2; + + } else if (DWC3_IP_IS(DWC31)) { + if (dwc->maximum_num_lanes > 1) + dev_warn(dev, "UDC doesn't support multi-lanes\n"); + + dwc->maximum_phy_gen = USB_PHY_GEN_2; + dwc->maximum_num_lanes = 1; + } + } else { + dwc->maximum_phy_gen = USB_PHY_GEN_UNKNOWN; + dwc->maximum_num_lanes = 0; + } } static int dwc3_probe(struct platform_device *pdev) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 83b6c871d58d..585a83ada270 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -959,6 +959,8 @@ struct dwc3_scratchpad_array { * @nr_scratch: number of scratch buffers * @u1u2: only used on revisions <1.83a for workaround * @maximum_speed: maximum speed requested (mainly for testing purposes) + * @maximum_phy_gen: maximum phy signaling rate + * @maximum_num_lanes: maximum number of lanes * @ip: controller's ID * @revision: controller's version of an IP * @version_type: VERSIONTYPE register contents, a sub release of a revision @@ -989,6 +991,7 @@ struct dwc3_scratchpad_array { * @ep0state: state of endpoint zero * @link_state: link state * @speed: device speed (super, high, full, low) + * @num_lanes: number of connected lanes * @hwparams: copy of hwparams registers * @root: debugfs root folder pointer * @regset: debugfs pointer to regdump file @@ -1120,6 +1123,8 @@ struct dwc3 { u32 nr_scratch; u32 u1u2; u32 maximum_speed; + enum usb_phy_gen maximum_phy_gen; + u8 maximum_num_lanes; u32 ip; @@ -1185,6 +1190,7 @@ struct dwc3 { u8 u1pel; u8 speed; + u8 num_lanes; u8 num_eps; From patchwork Fri Sep 25 02:42:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798699 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1ACB0618 for ; Fri, 25 Sep 2020 02:42:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F0E5720888 for ; Fri, 25 Sep 2020 02:42:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="Ch/ZbjYx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727046AbgIYCmk (ORCPT ); Thu, 24 Sep 2020 22:42:40 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:49610 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbgIYCmk (ORCPT ); Thu, 24 Sep 2020 22:42:40 -0400 Received: from mailhost.synopsys.com (sv2-mailhost2.synopsys.com [10.205.2.134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id BE330C0A93; Fri, 25 Sep 2020 02:42:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001759; bh=0ldPI2+q7Mni43Qe9GTShZz12zaLHpc0anQqI/M/3qA=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=Ch/ZbjYxRn3iKQGTeD27ZZ+vf7Eg0XZBKYnCXPLzNdwdQTVuEs5Yf7G5Av8PxQOBw X09gmfbJdnND1oOIwuCiYxBROkdKzP6a0XCHVzyj78JFMP3EL+Bq5RTXAxC/WRXsAR gzTKTmKy/1mbK669rd5jQvnis1diGxs3sqs0Tq7bnsu77EN8I2taKsDuIroS2RhBH3 WvpY7I8/Re+zshmZSETeCgxWAelnzuVYs9RrGcahCOwaArGKZCgN4eC5vIP5M/Ub44 Ao5Icn9vJBOm1JVrdV4YX0bIHSFt+306/WG03HBCOu1Q2z5Z6OvoYXwkz4nfuv7olG lfwWHli9MAUeQ== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id 8F7E0A0099; Fri, 25 Sep 2020 02:42:38 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:38 -0700 Date: Thu, 24 Sep 2020 19:42:38 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 09/12] usb: dwc3: gadget: Report sublink speed capability To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Report the sublink speed attributes to the usb_gadget structure based on the HW capability from the device maximum_speed property. Only DWC_usb32 supports 2 sublink speeds if it can operate with 2 lanes. (i.e. at SSP, it can operate as gen1x2) Note: the SSID DWC3_SSP_SSID_GEN2 and DWC3_SSP_SSID_GEN1 are arbitrary. There's no standard according to the USB 3.2 spec as long as they are unique and within 0-15. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - Update commit with updated field name - No longer use DWC3_LSM_5/10_GBPS macros Changes in v2: - Fix missing check for gen1x2 when writing to sublink speed attributes - Minor fix in commit message (first commit sentence ended with comma) drivers/usb/dwc3/core.h | 4 ++++ drivers/usb/dwc3/gadget.c | 49 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 585a83ada270..c4a33545530d 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -40,6 +40,10 @@ #define DWC3_XHCI_RESOURCES_NUM 2 #define DWC3_ISOC_MAX_RETRIES 5 +/* Sublink Speed Attribute ID */ +#define DWC3_SSP_SSID_GEN2 2 +#define DWC3_SSP_SSID_GEN1 1 + #define DWC3_SCRATCHBUF_SIZE 4096 /* each buffer is assumed to be 4KiB */ #define DWC3_EVENT_BUFFERS_SIZE 4096 #define DWC3_EVENT_TYPE_MASK 0xfe diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 82bc075ba97c..e60161205bf9 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -3779,6 +3779,55 @@ int dwc3_gadget_init(struct dwc3 *dwc) dwc->revision); dwc->gadget->max_speed = dwc->maximum_speed; + dwc->gadget->max_num_lanes = dwc->maximum_num_lanes; + + if (dwc->maximum_speed == USB_SPEED_SUPER_PLUS) { + struct usb_sublink_speed *ssa; + int i; + + /* + * Multiple sublink speeds are only available to DWC_usb32 + * devices that can operate at gen2x2 max. + */ + if (dwc->maximum_phy_gen == USB_PHY_GEN_2 && + dwc->maximum_num_lanes == 2) { + dwc->gadget->ssac = 3; + dwc->gadget->min_speed_ssid = DWC3_SSP_SSID_GEN1; + dwc->gadget->max_speed_ssid = DWC3_SSP_SSID_GEN2; + } else if (dwc->maximum_phy_gen == USB_PHY_GEN_1 && + dwc->maximum_num_lanes == 2) { + dwc->gadget->ssac = 1; + dwc->gadget->min_speed_ssid = DWC3_SSP_SSID_GEN1; + dwc->gadget->max_speed_ssid = DWC3_SSP_SSID_GEN1; + } else { + dwc->gadget->ssac = 1; + dwc->gadget->min_speed_ssid = DWC3_SSP_SSID_GEN2; + dwc->gadget->max_speed_ssid = DWC3_SSP_SSID_GEN2; + } + + for (i = 0; i < dwc->gadget->ssac + 1; i++) { + ssa = &dwc->gadget->sublink_speed[i]; + + if (dwc->gadget->ssac > 1 && i > 1) + ssa->id = dwc->gadget->max_speed_ssid; + else + ssa->id = dwc->gadget->min_speed_ssid; + + if (ssa->id == DWC3_SSP_SSID_GEN1) + ssa->mantissa = 5; + else + ssa->mantissa = 10; + + /* First attribute is RX followed by TX */ + if (i % 2) + ssa->type = USB_ST_SYMMETRIC_TX; + else + ssa->type = USB_ST_SYMMETRIC_RX; + + ssa->exponent = USB_LSE_GBPS; + ssa->protocol = USB_LP_SSP; + } + } /* * REVISIT: Here we should clear all pending IRQs to be From patchwork Fri Sep 25 02:42:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798701 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7DB1618 for ; Fri, 25 Sep 2020 02:42:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CE87820EDD for ; Fri, 25 Sep 2020 02:42:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="eYRVNzvE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727048AbgIYCmq (ORCPT ); Thu, 24 Sep 2020 22:42:46 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:50906 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbgIYCmq (ORCPT ); Thu, 24 Sep 2020 22:42:46 -0400 Received: from mailhost.synopsys.com (sv2-mailhost1.synopsys.com [10.205.2.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id D0F2B409E3; Fri, 25 Sep 2020 02:42:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001765; bh=8dZuPgZ9N3HkdsphAA2Z+KsusJis8CVVF6M0eieZqpw=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=eYRVNzvE7eOuFPriYlvoPYLf7Gc51mo7HtI9lqES5DPiBTmFafKnlH9MEpz7yhfId yINhlEYMdBPkAvTZDhEEzzIMECWOmdFTesFrl1UR47JxkuDsMffyVFwKY+nQ0SUVyM vOK5pvuKjwuoOIga03o1Cu7RA1aDslenKX6btj5SQ9DiiNCvMye8nPIdDx1VpFPvr+ 2hrh2iaKILoMGfG4IUlz6tZByNHHcYUno+QdaLYmboVlvpJjFkWLRVB3TLG0KfuI+x Dp+j2ZMiM7w7IueIK4UtD5wHWCEsGlBB9oB1OMnJZk1IYpLEQ9idb9dHSSqb4tuNbl fbp+B+B/ayNjQ== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id A6685A0096; Fri, 25 Sep 2020 02:42:44 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:44 -0700 Date: Thu, 24 Sep 2020 19:42:44 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 10/12] usb: dwc3: gadget: Implement setting of sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Implement gadget ops udc_set_num_lanes_and_speed. This allows the gadget/core driver to select number of lanes to use and the sublink speed the controller supports. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - None Changes in v2: - None drivers/usb/dwc3/core.h | 2 ++ drivers/usb/dwc3/gadget.c | 64 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index c4a33545530d..f456de5f551c 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -385,6 +385,8 @@ #define DWC3_GUCTL2_RST_ACTBITLATER BIT(14) /* Device Configuration Register */ +#define DWC3_DCFG_NUMLANES(n) (((n) & 0x3) << 30) /* DWC_usb32 only */ + #define DWC3_DCFG_DEVADDR(addr) ((addr) << 3) #define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index e60161205bf9..12399abd12fa 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2384,6 +2384,62 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, spin_unlock_irqrestore(&dwc->lock, flags); } +static void dwc3_gadget_set_num_lanes_and_speed(struct usb_gadget *g, + unsigned int num_lanes, + unsigned int ssid) +{ + struct dwc3 *dwc = gadget_to_dwc(g); + struct usb_sublink_speed *ssa = NULL; + unsigned int lanes; + unsigned long flags; + u32 reg; + int i; + + spin_lock_irqsave(&dwc->lock, flags); + if (dwc->maximum_speed < USB_SPEED_SUPER_PLUS) + goto done; + + for (i = 0; i < g->ssac + 1; i++) { + if (g->sublink_speed[i].id == ssid) { + ssa = &g->sublink_speed[i]; + break; + } + } + + if (!ssa) { + dev_err(dwc->dev, "SSID not found (%d)\n", ssid); + goto done; + } + + reg = dwc3_readl(dwc->regs, DWC3_DCFG); + reg &= ~DWC3_DCFG_SPEED_MASK; + + switch (ssa->mantissa) { + case 5: + reg |= DWC3_DCFG_SUPERSPEED; + break; + case 10: + reg |= DWC3_DCFG_SUPERSPEED_PLUS; + break; + default: + dev_err(dwc->dev, "invalid lane speed mantissa (%d)\n", + ssa->mantissa); + goto done; + } + + /* Lane configuration is only available to DWC_usb32 */ + if (DWC3_IP_IS(DWC32)) { + lanes = clamp_t(unsigned int, num_lanes, 1, + dwc->maximum_num_lanes); + reg &= ~DWC3_DCFG_NUMLANES(~0); + reg |= DWC3_DCFG_NUMLANES(lanes - 1); + } + + dwc3_writel(dwc->regs, DWC3_DCFG, reg); +done: + spin_unlock_irqrestore(&dwc->lock, flags); +} + static const struct usb_gadget_ops dwc3_gadget_ops = { .get_frame = dwc3_gadget_get_frame, .wakeup = dwc3_gadget_wakeup, @@ -2392,6 +2448,7 @@ static const struct usb_gadget_ops dwc3_gadget_ops = { .udc_start = dwc3_gadget_start, .udc_stop = dwc3_gadget_stop, .udc_set_speed = dwc3_gadget_set_speed, + .udc_set_num_lanes_and_speed = dwc3_gadget_set_num_lanes_and_speed, .get_config_params = dwc3_gadget_config_params, }; @@ -3844,7 +3901,12 @@ int dwc3_gadget_init(struct dwc3 *dwc) goto err5; } - dwc3_gadget_set_speed(dwc->gadget, dwc->maximum_speed); + if (DWC3_IP_IS(DWC32) && dwc->maximum_speed == USB_SPEED_SUPER_PLUS) + dwc3_gadget_set_num_lanes_and_speed(dwc->gadget, + dwc->maximum_num_lanes, + dwc->gadget->max_speed_ssid); + else + dwc3_gadget_set_speed(dwc->gadget, dwc->maximum_speed); return 0; From patchwork Fri Sep 25 02:42:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 11798703 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8EC1D6CB for ; Fri, 25 Sep 2020 02:42:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 72EDF20888 for ; Fri, 25 Sep 2020 02:42:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="e02anmTb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727052AbgIYCmx (ORCPT ); Thu, 24 Sep 2020 22:42:53 -0400 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:49624 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726764AbgIYCmw (ORCPT ); Thu, 24 Sep 2020 22:42:52 -0400 Received: from mailhost.synopsys.com (sv1-mailhost1.synopsys.com [10.205.2.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 08AEAC0A94; Fri, 25 Sep 2020 02:42:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1601001772; bh=N8B/ahzlDKfLaa0JDHERNFsxnj+xAApFPjbboFlztJI=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=e02anmTbT4gYe9ZmE4BH8ZqczUZ7bsPPi4L43zFwA0hssXloUDVNAsMjOLOyK4xjz Mf1E8GTv24abkMRQ/4ovDtmwDWqvxjqNsMJo92g0Fr/oxqbVkGxB33GMQBuQHZtJXA acsmd3rqHzLfWwE2NFIwClSA+1dQmDdrbtFg2eV3GgixwUTHv1apsUbrotG4N8sbG1 sIz5AbdQ2FGvmPVqiTpfs7zImwUNJfrilUpgj1rQQolkD/t7PjNfJYI3WvAz4jPvgb mhnUHoSrED3M2Weo9+APYil66l8uP7FD1WNLTb1QuQvwf+blNuy5d7J3KtpZWf2jtJ I/kpvQP+oGmCA== Received: from te-lab16 (nanobot.internal.synopsys.com [10.10.186.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPSA id CD875A01F1; Fri, 25 Sep 2020 02:42:50 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:42:50 -0700 Date: Thu, 24 Sep 2020 19:42:50 -0700 Message-Id: In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 11/12] usb: dwc3: gadget: Track connected lane and sublink speed To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Track the number of lanes connected in gadget->num_lanes and track the current sublink speed attribute ID for super-speed-plus operations. Note: if the device is running in gen1x2, set the gadget->speed to USB_SPEED_SUPER_PLUS. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - None Changes in v2: - None drivers/usb/dwc3/core.h | 2 ++ drivers/usb/dwc3/gadget.c | 21 ++++++++++++++++++++- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index f456de5f551c..d304acd5fce0 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -460,6 +460,8 @@ #define DWC3_DEVTEN_USBRSTEN BIT(1) #define DWC3_DEVTEN_DISCONNEVTEN BIT(0) +#define DWC3_DSTS_CONNLANES(n) (((n) >> 30) & 0x3) /* DWC_usb32 only */ + /* Device Status Register */ #define DWC3_DSTS_DCNRD BIT(29) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 12399abd12fa..66b4ea8473a6 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2379,6 +2379,10 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, reg |= DWC3_DCFG_SUPERSPEED_PLUS; } } + + if (DWC3_IP_IS(DWC32) && speed < USB_SPEED_SUPER_PLUS) + reg &= ~DWC3_DCFG_NUMLANES(~0); + dwc3_writel(dwc->regs, DWC3_DCFG, reg); spin_unlock_irqrestore(&dwc->lock, flags); @@ -3275,12 +3279,19 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) struct dwc3_ep *dep; int ret; u32 reg; + u8 lanes = 1; u8 speed; reg = dwc3_readl(dwc->regs, DWC3_DSTS); speed = reg & DWC3_DSTS_CONNECTSPD; dwc->speed = speed; + if (DWC3_IP_IS(DWC32)) + lanes = DWC3_DSTS_CONNLANES(reg) + 1; + + dwc->gadget->num_lanes = lanes; + dwc->gadget->speed_ssid = 0; + /* * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed * each time on Connect Done. @@ -3295,6 +3306,7 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); dwc->gadget->ep0->maxpacket = 512; dwc->gadget->speed = USB_SPEED_SUPER_PLUS; + dwc->gadget->speed_ssid = DWC3_SSP_SSID_GEN2; break; case DWC3_DSTS_SUPERSPEED: /* @@ -3315,7 +3327,13 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); dwc->gadget->ep0->maxpacket = 512; - dwc->gadget->speed = USB_SPEED_SUPER; + + if (lanes > 1) { + dwc->gadget->speed = USB_SPEED_SUPER_PLUS; + dwc->gadget->speed_ssid = DWC3_SSP_SSID_GEN1; + } else { + dwc->gadget->speed = USB_SPEED_SUPER; + } break; case DWC3_DSTS_HIGHSPEED: dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64); @@ -3813,6 +3831,7 @@ int dwc3_gadget_init(struct dwc3 *dwc) dwc->gadget->sg_supported = true; dwc->gadget->name = "dwc3-gadget"; dwc->gadget->lpm_capable = true; + dwc->gadget->num_lanes = 1; /* * FIXME We might be setting max_speed to X-Patchwork-Id: 11798707 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DB08A618 for ; Fri, 25 Sep 2020 02:44:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BAC6920EDD for ; Fri, 25 Sep 2020 02:44:37 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Fri, 25 Sep 2020 02:44:35 +0000 (UTC) Received: by te-lab16 (sSMTP sendmail emulation); Thu, 24 Sep 2020 19:44:35 -0700 Date: Thu, 24 Sep 2020 19:44:35 -0700 Message-Id: <592cc3c2555a50b3e43cb5bf771079dc6f7037fa.1601001199.git.Thinh.Nguyen@synopsys.com> In-Reply-To: References: X-SNPS-Relay: synopsys.com From: Thinh Nguyen Subject: [PATCH v5 12/12] usb: dwc3: gadget: Set speed only up to the max supported To: Felipe Balbi , Greg Kroah-Hartman , Thinh.Nguyen@synopsys.com, linux-usb@vger.kernel.org Cc: John Youn Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The setting of device speed should be limited by the device's maximum_speed. This patch adds a check and prevent the driver from attempting to configure higher than the maximum_speed. Signed-off-by: Thinh Nguyen --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - None Changes in v3: - None Changes in v2: - None drivers/usb/dwc3/gadget.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 66b4ea8473a6..b90df29cc23f 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2327,6 +2327,7 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, enum usb_device_speed speed) { struct dwc3 *dwc = gadget_to_dwc(g); + enum usb_device_speed selected_speed = speed; unsigned long flags; u32 reg; @@ -2351,7 +2352,10 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, !dwc->dis_metastability_quirk) { reg |= DWC3_DCFG_SUPERSPEED; } else { - switch (speed) { + if (speed > dwc->maximum_speed) + selected_speed = dwc->maximum_speed; + + switch (selected_speed) { case USB_SPEED_LOW: reg |= DWC3_DCFG_LOWSPEED; break; @@ -2371,7 +2375,8 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, reg |= DWC3_DCFG_SUPERSPEED_PLUS; break; default: - dev_err(dwc->dev, "invalid speed (%d)\n", speed); + dev_err(dwc->dev, "invalid speed (%d)\n", + selected_speed); if (DWC3_IP_IS(DWC3)) reg |= DWC3_DCFG_SUPERSPEED; @@ -2380,7 +2385,7 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g, } } - if (DWC3_IP_IS(DWC32) && speed < USB_SPEED_SUPER_PLUS) + if (DWC3_IP_IS(DWC32) && selected_speed < USB_SPEED_SUPER_PLUS) reg &= ~DWC3_DCFG_NUMLANES(~0); dwc3_writel(dwc->regs, DWC3_DCFG, reg);