From patchwork Fri Oct 2 13:34:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11813555 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 53A52139F for ; Fri, 2 Oct 2020 13:34:38 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 4E3EA21D94; Fri, 2 Oct 2020 13:34:38 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pj1-f65.google.com (mail-pj1-f65.google.com [209.85.216.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D38D022207 for ; Fri, 2 Oct 2020 13:34:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="oCMWc6Jj" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D38D022207 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pj1-f65.google.com with SMTP id t7so827245pjd.3 for ; Fri, 02 Oct 2020 06:34:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6W9k3ndaa9cRCwcQ1M/asEuo1OK8FOTIyDJ+tvTfSmU=; b=oCMWc6Jj4ktZjU2Abv3j8Jo7vqF5s3w07Ee2so2ulyh/HCR9TQnPRmZsGt75tpet1z znJdIuBUpgrqVS4Obqt7rsJhrsQhorjU6izHw4x3tQI1D79kvecwXfPOtQSf9Yv/6WPt yz+zJu/NROjZFu+JUO9rJ145yw15SArOMUKek= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6W9k3ndaa9cRCwcQ1M/asEuo1OK8FOTIyDJ+tvTfSmU=; b=ry7SEVRo6EPbCdlXoUipCDr2Zy4AL2ISNMMnjzcKTTliS6dpQynSeJmcjLLoK7UCZR SzYzWSjxAHQyIAzDQUzEx3s+5dXyHK+H8CRoDtvnc3K0/wvrK4//YFI5s4qqRKs+93mQ SMHTAV70UOhN+GyIBpIUVjnypnhwRg9WMidoSkZOyLtegnBmXf/YKVNGZzXMutI0GFq3 GgLO7xNY3l9/wVwmtCn0viLo7yIl4AceJRmYIJu+Eop6PxccfI5/W8Yh8OcRbdMRj5PB 7MLAsdONjpuIpBoMwyM8oabiHlSqiVRvuHqRfZAvF+9n1lzjJOKgEqQARE/6ahuSU+ov 0Ilw== X-Gm-Message-State: AOAM530VLoE5aC+uVgzsY0mjTeEez9ltOujac1XB0Tv5Zm/zxoxYNzGE Ho869vBQ/24Wad5zG/HG2xCX9/8RkKsRPA== X-Google-Smtp-Source: ABdhPJwSI1/I/1oq6fVw/wrmjpIzo5Uq4okkncEKBWITlbuxGxkjLW+1YPYtbxPqs3I2cpdnlbwklw== X-Received: by 2002:a17:90a:8d05:: with SMTP id c5mr2757642pjo.222.1601645676968; Fri, 02 Oct 2020 06:34:36 -0700 (PDT) Received: from shiro.work (p1268123-ipngn200803sizuokaden.shizuoka.ocn.ne.jp. [118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:36 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, Daniel Palmer Subject: [PATCH v2 1/5] ARM: mstar: Select MStar intc Date: Fri, 2 Oct 2020 22:34:14 +0900 Message-Id: <20201002133418.2250277-2-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 MediaTek recently introduced support for the MStar interrupt controller that is also present in some of their chips as well as the MStar/Sigmastar chips. Almost all of the peripheral interrupts go through an instance of this controller in MStar/SigmaStar Arm v7 chips so we want to select it if CONFIG_ARCH_MSTARV7 is selected. Signed-off-by: Daniel Palmer --- arch/arm/mach-mstar/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-mstar/Kconfig b/arch/arm/mach-mstar/Kconfig index 52744fe32368..576d1ab293c8 100644 --- a/arch/arm/mach-mstar/Kconfig +++ b/arch/arm/mach-mstar/Kconfig @@ -3,6 +3,7 @@ menuconfig ARCH_MSTARV7 depends on ARCH_MULTI_V7 select ARM_GIC select ARM_HEAVY_MB + select MST_IRQ help Support for newer MStar/Sigmastar SoC families that are based on Armv7 cores like the Cortex A7 and share the same From patchwork Fri Oct 2 13:34:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11813557 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DB19C112E for ; Fri, 2 Oct 2020 13:34:40 +0000 (UTC) Received: by mail.kernel.org (Postfix) id D5A1F22207; Fri, 2 Oct 2020 13:34:40 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pj1-f67.google.com (mail-pj1-f67.google.com [209.85.216.67]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C77A2220D for ; Fri, 2 Oct 2020 13:34:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="IgAPyLPh" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8C77A2220D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pj1-f67.google.com with SMTP id p21so839394pju.0 for ; Fri, 02 Oct 2020 06:34:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kzXjI15ZtttHCXeQ3n0cYLMP2xI/9tBvTIvB8MmIIvU=; b=IgAPyLPh0DLJmXt5xhnfVxXCfPj6O6jmDdV42a7glMLjKv2OtUZoRUkD4tSCN83ifi zmRzkcWRxhFbZ3Wsy0OqmseYh9ofBJhgwS2VBztlZEe33t138l0z8l4j5qY9QnoL/34X Iv1Te6dkP5J11PB089qvQYskoWblvll+96a5I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kzXjI15ZtttHCXeQ3n0cYLMP2xI/9tBvTIvB8MmIIvU=; b=hYPtLg/Ev4VgMP+Ym6pfeG/Vf04xiMt5nYRVN17ruTmRfMcuupp4IkC5KLO9GfJT7V hW0hcMgs552iqZl+vwskp0W3s6uKQSL7/YusBGZ4mqllAx6cSQK0mx/MNZ82LqGTZN8W YbdqXnBX+DckXIEO35brKkd8R6QE8wr0Dpg9lkyMJUDdkZES16t+iS3k2CQlTm+DAT/S hdvl/uOKVPrUdiOrYbkIzPNj+JaegpjNf9Wt3B2DIm8PP9VwoKqyTbV+Kbhk/+LkqP7A c4xp9TXie07NDlBqkhtQ6kJCVoqzRTBejwpga28559cuFZepEk0ewE6lzBq7Pg9veBHh 30NQ== X-Gm-Message-State: AOAM530M+SIv/9rswavYed9OE6Db9dFrPvAHiplMo2/yIdWLND2GW2vf TEUN/Nc0yqjJ9hKAp4x+RFuml9l5a0h+5A== X-Google-Smtp-Source: ABdhPJxzY+wQTKmU2f4036sr9ZNsSKMCauT7ECH8g+qEwbrTDG7ZWCcPqqlZJuV6LMMXhPkQPjIeTA== X-Received: by 2002:a17:90b:ecc:: with SMTP id gz12mr2723292pjb.219.1601645679700; Fri, 02 Oct 2020 06:34:39 -0700 (PDT) Received: from shiro.work (p1268123-ipngn200803sizuokaden.shizuoka.ocn.ne.jp. [118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:39 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, Daniel Palmer Subject: [PATCH v2 2/5] ARM: mstar: Add interrupt controller to base dtsi Date: Fri, 2 Oct 2020 22:34:15 +0900 Message-Id: <20201002133418.2250277-3-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 Add the IRQ and FIQ intc instances to the base MStar/SigmaStar v7 dtsi. All of the known SoCs have both and at the same place with their common IPs using the same interrupt lines. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index 3b7b9b793736..aec841b52ca4 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -85,6 +85,25 @@ reboot { mask = <0x79>; }; + intc_fiq: interrupt-controller@201310 { + compatible = "mstar,mst-intc"; + reg = <0x201310 0x40>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + mstar,irqs-map-range = <96 127>; + }; + + intc_irq: interrupt-controller@201350 { + compatible = "mstar,mst-intc"; + reg = <0x201350 0x40>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&gic>; + mstar,irqs-map-range = <32 95>; + mstar,intc-no-eoi; + }; + l3bridge: l3bridge@204400 { compatible = "mstar,l3bridge"; reg = <0x204400 0x200>; From patchwork Fri Oct 2 13:34:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11813559 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF590139F for ; Fri, 2 Oct 2020 13:34:43 +0000 (UTC) Received: by mail.kernel.org (Postfix) id A9E1F2226A; Fri, 2 Oct 2020 13:34:43 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pj1-f68.google.com (mail-pj1-f68.google.com [209.85.216.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 764DC221EC for ; Fri, 2 Oct 2020 13:34:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="p3DPytT8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 764DC221EC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pj1-f68.google.com with SMTP id i3so792863pjz.4 for ; Fri, 02 Oct 2020 06:34:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7SjJAe3oHt3KB6nicp1+OfBnUkZSTnnqwPcXU79zsAk=; b=p3DPytT8DeuuG6FrFfwq8QVj6Thw52fCHJtg16Yzn/f1150ENXnCYXUmMTn0bb/TvY QHIcbyRM7PJGaCyvUIUFcik7Y3ZVineOWajY6LOi9+JSLEYTMs/igZP9LHigINWVLRss E+vjO0+TnSuEmGg+/vFPgQRQQTtDB0SZ1Va6U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7SjJAe3oHt3KB6nicp1+OfBnUkZSTnnqwPcXU79zsAk=; b=rWcSDsVYUk4vn3c3YOOl3+yZpDF3mDarU7ocuOhS8Kj5YeyYD7dO4fWRE2gKULqio4 7me1LaM4Km8kex6H8Oy9M0ESoWneXOC6NdnkAw/fJJu2Cn+5DXRSBR7XH9ABIu/1hnow 03/+fXvQRND11HVg86/x+yNNSXT8AncwTWMgIHOg/4XSQxGKKiSJoWja/7SqwKeav/ht XwnhmGkSnOwiFdD7GlYUdyx9+8O+7sob7SqywMW65o87UFzs2eDiPkmB2vc6gojvfcux epukYOhbZFs4zt32q6fpM7GF+t8hzZLGiZORcaRnnd44pGTtI/MfGNu7If+jpHguXViO rTBQ== X-Gm-Message-State: AOAM531aPM4zWboeboqj/GyKT3rd9x3EPf3V5s0pkKnj9wtdOq41G4vO KG/a7TnC03lYudVibJT5bamZ+hhp13idzQ== X-Google-Smtp-Source: ABdhPJzMTBwZsb/Y2+eq6Msc5C1q7HCNQmFZGjUYpcaiSLsx7P7qjBYtUIoacUOMboWKq2Xmv13uQw== X-Received: by 2002:a17:90a:dd46:: with SMTP id u6mr3030119pjv.67.1601645682380; Fri, 02 Oct 2020 06:34:42 -0700 (PDT) Received: from shiro.work (p1268123-ipngn200803sizuokaden.shizuoka.ocn.ne.jp. [118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:41 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, Daniel Palmer Subject: [PATCH v2 3/5] ARM: mstar: Add interrupt to pm_uart Date: Fri, 2 Oct 2020 22:34:16 +0900 Message-Id: <20201002133418.2250277-4-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 Since we now have support for the interrupt controller pm_uart's interrupt is routed through it make sense to wire up it's interrupt in the device tree. The interrupt is the same for all known chips so it goes in the base dtsi. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index aec841b52ca4..f07880561e11 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -113,6 +113,7 @@ pm_uart: uart@221000 { compatible = "ns16550a"; reg = <0x221000 0x100>; reg-shift = <3>; + interrupts-extended = <&intc_irq GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <172000000>; status = "disabled"; }; From patchwork Fri Oct 2 13:34:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11813561 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5EB42112E for ; Fri, 2 Oct 2020 13:34:46 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 594FC21D92; Fri, 2 Oct 2020 13:34:46 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pj1-f67.google.com (mail-pj1-f67.google.com [209.85.216.67]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 04C5E21D94 for ; Fri, 2 Oct 2020 13:34:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="kQvXISJu" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 04C5E21D94 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pj1-f67.google.com with SMTP id t7so827531pjd.3 for ; Fri, 02 Oct 2020 06:34:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8Yw3W1wDo04qc6EU7K5/0CbVdh78C1ldrffh52yrkp0=; b=kQvXISJuXT+ovAT9zSv0PSOxMHVxVy3w5VW0E0FsJCkp4C3uc4jmGbfcBVN4LEmlKl AeUg5Y2DEMvQZr2+LKRHzsOeMMnxJITQNyS35KNlRn+pzNnFH91smLo2VlNFyrK1VZME DrKOilkSpKrG0rSSpZK49+WEoQTBXIU9KWt5g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8Yw3W1wDo04qc6EU7K5/0CbVdh78C1ldrffh52yrkp0=; b=UVxxJ1DLfF+yB7wtKU3B2CNtsXtac5XJw3B2RsGHIDdeh9xjxzOv9yT8ImfFfBCloT bZ8lKJP9P804m8rjIOxKPeLytho6zF/7igVkhOJGoA8gvmcwq8wRSfOfCioALB8qTU4T xJ+OP9EWPZWRcVDyWhmnU85yYBcvpbU+DfiX536ZaZTdlaGPtkJtc5U9Da1g7tePMEJL ZIpph9qtL1FPz7QBPqP65iPlryK0oKyX4zHHzNiZrih7ScZUWo+pjDc8rdvsWsUuuW/5 kFvWA3G9aT/OiJ4pGH0hEB5Y2HST/zd7Fm4j45rAWlhmpwGrV/cEXXa6UrGUfGjKCX1I 5n8g== X-Gm-Message-State: AOAM532H4rOgBgfUzXtAzBvJE7kzzEZ52JpRLWVMJi9Vfq62/qdiizZO b4CRWG02yc9XXtphj4u5pKfL0JRtwzuG8A== X-Google-Smtp-Source: ABdhPJw0Dn6yc42PCt2Iv6CbUx9stjkWZTT4RawfnU9Fbb0oikjrZ0MRZytZUX4oziayz2EC0J4STw== X-Received: by 2002:a17:90b:4394:: with SMTP id in20mr2974367pjb.70.1601645685048; Fri, 02 Oct 2020 06:34:45 -0700 (PDT) Received: from shiro.work (p1268123-ipngn200803sizuokaden.shizuoka.ocn.ne.jp. [118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:44 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, Daniel Palmer Subject: [PATCH v2 4/5] ARM: mstar: Add mstar prefix to all of the dtsi/dts files Date: Fri, 2 Oct 2020 22:34:17 +0900 Message-Id: <20201002133418.2250277-5-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 Based on Arnd's comment[0] all of the MStar dtsi/dts files should have had a prefix. This moves the files, fixes the Makefile that generates dtbs and fixes up the MAINTAINERS entry. Fixing up some includes in the files themselves is left for a later commit as rolling it into this commit resulted in a confusing diff. 0 - https://lore.kernel.org/linux-arm-kernel/CAK8P3a0maQhfaerwG4KgFZOrUPwueKOp2+MOeG9C=+8ZNzc2Kg@mail.gmail.com/ Signed-off-by: Daniel Palmer --- MAINTAINERS | 4 +--- arch/arm/boot/dts/Makefile | 6 +++--- ...e_crust.dts => mstar-infinity-msc313-breadbee_crust.dts} | 0 .../{infinity-msc313.dtsi => mstar-infinity-msc313.dtsi} | 0 arch/arm/boot/dts/{infinity.dtsi => mstar-infinity.dtsi} | 0 ...3e-breadbee.dts => mstar-infinity3-msc313e-breadbee.dts} | 0 ...{infinity3-msc313e.dtsi => mstar-infinity3-msc313e.dtsi} | 0 arch/arm/boot/dts/{infinity3.dtsi => mstar-infinity3.dtsi} | 0 ...idrived08.dts => mstar-mercury5-ssc8336n-midrived08.dts} | 0 ...{mercury5-ssc8336n.dtsi => mstar-mercury5-ssc8336n.dtsi} | 0 arch/arm/boot/dts/{mercury5.dtsi => mstar-mercury5.dtsi} | 0 11 files changed, 4 insertions(+), 6 deletions(-) rename arch/arm/boot/dts/{infinity-msc313-breadbee_crust.dts => mstar-infinity-msc313-breadbee_crust.dts} (100%) rename arch/arm/boot/dts/{infinity-msc313.dtsi => mstar-infinity-msc313.dtsi} (100%) rename arch/arm/boot/dts/{infinity.dtsi => mstar-infinity.dtsi} (100%) rename arch/arm/boot/dts/{infinity3-msc313e-breadbee.dts => mstar-infinity3-msc313e-breadbee.dts} (100%) rename arch/arm/boot/dts/{infinity3-msc313e.dtsi => mstar-infinity3-msc313e.dtsi} (100%) rename arch/arm/boot/dts/{infinity3.dtsi => mstar-infinity3.dtsi} (100%) rename arch/arm/boot/dts/{mercury5-ssc8336n-midrived08.dts => mstar-mercury5-ssc8336n-midrived08.dts} (100%) rename arch/arm/boot/dts/{mercury5-ssc8336n.dtsi => mstar-mercury5-ssc8336n.dtsi} (100%) rename arch/arm/boot/dts/{mercury5.dtsi => mstar-mercury5.dtsi} (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 45ec9df85a64..89cf1e4cffb0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2150,9 +2150,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained W: http://linux-chenxing.org/ F: Documentation/devicetree/bindings/arm/mstar/* -F: arch/arm/boot/dts/infinity*.dtsi -F: arch/arm/boot/dts/mercury*.dtsi -F: arch/arm/boot/dts/mstar-v7.dtsi +F: arch/arm/boot/dts/mstar-* F: arch/arm/mach-mstar/ ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4572db3fa5ae..d80d20e6ce9e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1356,9 +1356,9 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt8135-evbp1.dtb dtb-$(CONFIG_ARCH_MILBEAUT) += milbeaut-m10v-evb.dtb dtb-$(CONFIG_ARCH_MSTARV7) += \ - infinity-msc313-breadbee_crust.dtb \ - infinity3-msc313e-breadbee.dtb \ - mercury5-ssc8336n-midrived08.dtb + mstar-infinity-msc313-breadbee_crust.dtb \ + mstar-infinity3-msc313e-breadbee.dtb \ + mstar-mercury5-ssc8336n-midrived08.dtb dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-ast2500-evb.dtb \ diff --git a/arch/arm/boot/dts/infinity-msc313-breadbee_crust.dts b/arch/arm/boot/dts/mstar-infinity-msc313-breadbee_crust.dts similarity index 100% rename from arch/arm/boot/dts/infinity-msc313-breadbee_crust.dts rename to arch/arm/boot/dts/mstar-infinity-msc313-breadbee_crust.dts diff --git a/arch/arm/boot/dts/infinity-msc313.dtsi b/arch/arm/boot/dts/mstar-infinity-msc313.dtsi similarity index 100% rename from arch/arm/boot/dts/infinity-msc313.dtsi rename to arch/arm/boot/dts/mstar-infinity-msc313.dtsi diff --git a/arch/arm/boot/dts/infinity.dtsi b/arch/arm/boot/dts/mstar-infinity.dtsi similarity index 100% rename from arch/arm/boot/dts/infinity.dtsi rename to arch/arm/boot/dts/mstar-infinity.dtsi diff --git a/arch/arm/boot/dts/infinity3-msc313e-breadbee.dts b/arch/arm/boot/dts/mstar-infinity3-msc313e-breadbee.dts similarity index 100% rename from arch/arm/boot/dts/infinity3-msc313e-breadbee.dts rename to arch/arm/boot/dts/mstar-infinity3-msc313e-breadbee.dts diff --git a/arch/arm/boot/dts/infinity3-msc313e.dtsi b/arch/arm/boot/dts/mstar-infinity3-msc313e.dtsi similarity index 100% rename from arch/arm/boot/dts/infinity3-msc313e.dtsi rename to arch/arm/boot/dts/mstar-infinity3-msc313e.dtsi diff --git a/arch/arm/boot/dts/infinity3.dtsi b/arch/arm/boot/dts/mstar-infinity3.dtsi similarity index 100% rename from arch/arm/boot/dts/infinity3.dtsi rename to arch/arm/boot/dts/mstar-infinity3.dtsi diff --git a/arch/arm/boot/dts/mercury5-ssc8336n-midrived08.dts b/arch/arm/boot/dts/mstar-mercury5-ssc8336n-midrived08.dts similarity index 100% rename from arch/arm/boot/dts/mercury5-ssc8336n-midrived08.dts rename to arch/arm/boot/dts/mstar-mercury5-ssc8336n-midrived08.dts diff --git a/arch/arm/boot/dts/mercury5-ssc8336n.dtsi b/arch/arm/boot/dts/mstar-mercury5-ssc8336n.dtsi similarity index 100% rename from arch/arm/boot/dts/mercury5-ssc8336n.dtsi rename to arch/arm/boot/dts/mstar-mercury5-ssc8336n.dtsi diff --git a/arch/arm/boot/dts/mercury5.dtsi b/arch/arm/boot/dts/mstar-mercury5.dtsi similarity index 100% rename from arch/arm/boot/dts/mercury5.dtsi rename to arch/arm/boot/dts/mstar-mercury5.dtsi From patchwork Fri Oct 2 13:34:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11813563 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EE32F139F for ; Fri, 2 Oct 2020 13:34:48 +0000 (UTC) Received: by mail.kernel.org (Postfix) id E92012220C; Fri, 2 Oct 2020 13:34:48 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B556021D94 for ; Fri, 2 Oct 2020 13:34:48 +0000 (UTC) Authentication-Results: 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[118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:47 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, Daniel Palmer Subject: [PATCH v2 5/5] ARM: mstar: Fix up the fallout from moving the dts/dtsi files Date: Fri, 2 Oct 2020 22:34:18 +0900 Message-Id: <20201002133418.2250277-6-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 Since the dtsi/dts files have been moved some includes are now broken so this fixes up the includes so the dtbs build again. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-infinity-msc313-breadbee_crust.dts | 2 +- arch/arm/boot/dts/mstar-infinity-msc313.dtsi | 2 +- arch/arm/boot/dts/mstar-infinity3-msc313e-breadbee.dts | 2 +- arch/arm/boot/dts/mstar-infinity3-msc313e.dtsi | 2 +- arch/arm/boot/dts/mstar-infinity3.dtsi | 2 +- arch/arm/boot/dts/mstar-mercury5-ssc8336n-midrived08.dts | 2 +- arch/arm/boot/dts/mstar-mercury5-ssc8336n.dtsi | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/mstar-infinity-msc313-breadbee_crust.dts b/arch/arm/boot/dts/mstar-infinity-msc313-breadbee_crust.dts index f24c5580d3e4..f9db2ff86f2d 100644 --- a/arch/arm/boot/dts/mstar-infinity-msc313-breadbee_crust.dts +++ b/arch/arm/boot/dts/mstar-infinity-msc313-breadbee_crust.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include "infinity-msc313.dtsi" +#include "mstar-infinity-msc313.dtsi" / { model = "BreadBee Crust"; diff --git a/arch/arm/boot/dts/mstar-infinity-msc313.dtsi b/arch/arm/boot/dts/mstar-infinity-msc313.dtsi index 42f2b5552c77..3499fde263be 100644 --- a/arch/arm/boot/dts/mstar-infinity-msc313.dtsi +++ b/arch/arm/boot/dts/mstar-infinity-msc313.dtsi @@ -4,7 +4,7 @@ * Author: Daniel Palmer */ -#include "infinity.dtsi" +#include "mstar-infinity.dtsi" / { memory@20000000 { diff --git a/arch/arm/boot/dts/mstar-infinity3-msc313e-breadbee.dts b/arch/arm/boot/dts/mstar-infinity3-msc313e-breadbee.dts index 1f93401c8530..f0eda80a95cc 100644 --- a/arch/arm/boot/dts/mstar-infinity3-msc313e-breadbee.dts +++ b/arch/arm/boot/dts/mstar-infinity3-msc313e-breadbee.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include "infinity3-msc313e.dtsi" +#include "mstar-infinity3-msc313e.dtsi" / { model = "BreadBee"; diff --git a/arch/arm/boot/dts/mstar-infinity3-msc313e.dtsi b/arch/arm/boot/dts/mstar-infinity3-msc313e.dtsi index 4e7239afd823..f581b6f89555 100644 --- a/arch/arm/boot/dts/mstar-infinity3-msc313e.dtsi +++ b/arch/arm/boot/dts/mstar-infinity3-msc313e.dtsi @@ -4,7 +4,7 @@ * Author: Daniel Palmer */ -#include "infinity3.dtsi" +#include "mstar-infinity3.dtsi" / { memory@20000000 { diff --git a/arch/arm/boot/dts/mstar-infinity3.dtsi b/arch/arm/boot/dts/mstar-infinity3.dtsi index 9b918c802654..9857e2a9934d 100644 --- a/arch/arm/boot/dts/mstar-infinity3.dtsi +++ b/arch/arm/boot/dts/mstar-infinity3.dtsi @@ -4,7 +4,7 @@ * Author: Daniel Palmer */ -#include "infinity.dtsi" +#include "mstar-infinity.dtsi" &imi { reg = <0xa0000000 0x20000>; diff --git a/arch/arm/boot/dts/mstar-mercury5-ssc8336n-midrived08.dts b/arch/arm/boot/dts/mstar-mercury5-ssc8336n-midrived08.dts index f24bd8cb8e60..7306b737d9c4 100644 --- a/arch/arm/boot/dts/mstar-mercury5-ssc8336n-midrived08.dts +++ b/arch/arm/boot/dts/mstar-mercury5-ssc8336n-midrived08.dts @@ -5,7 +5,7 @@ */ /dts-v1/; -#include "mercury5-ssc8336n.dtsi" +#include "mstar-mercury5-ssc8336n.dtsi" / { model = "70mai Midrive D08"; diff --git a/arch/arm/boot/dts/mstar-mercury5-ssc8336n.dtsi b/arch/arm/boot/dts/mstar-mercury5-ssc8336n.dtsi index 7d4a4630c25c..3f5a4c029744 100644 --- a/arch/arm/boot/dts/mstar-mercury5-ssc8336n.dtsi +++ b/arch/arm/boot/dts/mstar-mercury5-ssc8336n.dtsi @@ -4,7 +4,7 @@ * Author: Daniel Palmer */ -#include "mercury5.dtsi" +#include "mstar-mercury5.dtsi" / { memory@20000000 {