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Tue, 06 Oct 2020 02:26:30 -0700 (PDT) Date: Tue, 6 Oct 2020 14:56:15 +0530 From: Syed Nayyar Waris To: linus.walleij@linaro.org, akpm@linux-foundation.org Subject: [PATCH v11 4/4] gpio: xilinx: Utilize generic bitmap_get_value and _set_value Message-ID: <3e27882cfa1eebc2905c0fa9aecfd2326d82c305.1601974764.git.syednwaris@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201006_052632_601918_40D4F2DD X-CRM114-Status: GOOD ( 18.79 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [syednwaris[at]gmail.com] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:543 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, vilhelm.gray@gmail.com, michal.simek@xilinx.com, bgolaszewski@baylibre.com, andriy.shevchenko@linux.intel.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch reimplements the xgpio_set_multiple function in drivers/gpio/gpio-xilinx.c to use the new generic functions: bitmap_get_value and bitmap_set_value. The code is now simpler to read and understand. Moreover, instead of looping for each bit in xgpio_set_multiple function, now we can check each channel at a time and save cycles. Cc: Bartosz Golaszewski Cc: Michal Simek Signed-off-by: Syed Nayyar Waris Signed-off-by: William Breathitt Gray --- Changes in v11: - Change variable name 'flag' to 'flags'. Changes in v10: - No change. Changes in v9: - Remove looping of 'for_each_set_clump' and instead process two halves of a 64-bit bitmap separately or individually. Use normal spin_lock call for second inner lock. And take the spin_lock_init call outside the 'if' condition in the 'probe' function of driver. Changes in v8: - No change. Changes in v7: - No change. Changes in v6: - No change. Changes in v5: - Minor change: Inline values '32' and '64' in code for better code readability. Changes in v4: - Minor change: Inline values '32' and '64' in code for better code readability. Changes in v3: - No change. Changes in v2: - No change drivers/gpio/gpio-xilinx.c | 64 +++++++++++++++++++------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 67f9f82e0db0..f86bee271246 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -138,37 +138,37 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, { unsigned long flags; struct xgpio_instance *chip = gpiochip_get_data(gc); - int index = xgpio_index(chip, 0); - int offset, i; - - spin_lock_irqsave(&chip->gpio_lock[index], flags); - - /* Write to GPIO signals */ - for (i = 0; i < gc->ngpio; i++) { - if (*mask == 0) - break; - /* Once finished with an index write it out to the register */ - if (index != xgpio_index(chip, i)) { - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + - index * XGPIO_CHANNEL_OFFSET, - chip->gpio_state[index]); - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); - index = xgpio_index(chip, i); - spin_lock_irqsave(&chip->gpio_lock[index], flags); - } - if (__test_and_clear_bit(i, mask)) { - offset = xgpio_offset(chip, i); - if (test_bit(i, bits)) - chip->gpio_state[index] |= BIT(offset); - else - chip->gpio_state[index] &= ~BIT(offset); - } - } - - xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + - index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]); - - spin_unlock_irqrestore(&chip->gpio_lock[index], flags); + u32 *const state = chip->gpio_state; + unsigned int *const width = chip->gpio_width; + + DECLARE_BITMAP(old, 64); + DECLARE_BITMAP(new, 64); + DECLARE_BITMAP(changed, 64); + + spin_lock_irqsave(&chip->gpio_lock[0], flags); + spin_lock(&chip->gpio_lock[1]); + + bitmap_set_value(old, state[0], 0, width[0]); + bitmap_set_value(old, state[1], width[0], width[1]); + bitmap_replace(new, old, bits, mask, gc->ngpio); + + bitmap_set_value(old, state[0], 0, 32); + bitmap_set_value(old, state[1], 32, 32); + state[0] = bitmap_get_value(new, 0, width[0]); + state[1] = bitmap_get_value(new, width[0], width[1]); + bitmap_set_value(new, state[0], 0, 32); + bitmap_set_value(new, state[1], 32, 32); + bitmap_xor(changed, old, new, 64); + + if (((u32 *)changed)[0]) + xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET, + state[0]); + if (((u32 *)changed)[1]) + xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + + XGPIO_CHANNEL_OFFSET, state[1]); + + spin_unlock(&chip->gpio_lock[1]); + spin_unlock_irqrestore(&chip->gpio_lock[0], flags); } /** @@ -292,6 +292,7 @@ static int xgpio_probe(struct platform_device *pdev) chip->gpio_width[0] = 32; spin_lock_init(&chip->gpio_lock[0]); + spin_lock_init(&chip->gpio_lock[1]); if (of_property_read_u32(np, "xlnx,is-dual", &is_dual)) is_dual = 0; @@ -314,7 +315,6 @@ static int xgpio_probe(struct platform_device *pdev) &chip->gpio_width[1])) chip->gpio_width[1] = 32; - spin_lock_init(&chip->gpio_lock[1]); } chip->gc.base = -1;