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[24.155.109.49]) by smtp.googlemail.com with ESMTPSA id t20sm8316526oot.22.2020.10.09.12.53.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Oct 2020 12:53:31 -0700 (PDT) From: Rob Herring To: linux-pci@vger.kernel.org Subject: [PATCH] PCI: Move Rockchip driver to Cadence directory Date: Fri, 9 Oct 2020 14:53:30 -0500 Message-Id: <20201009195330.396775-1-robh@kernel.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201009_155336_964186_3F17DB23 X-CRM114-Status: GOOD ( 17.34 ) X-Spam-Score: 0.5 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:341 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [robherring2[at]gmail.com] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [robherring2[at]gmail.com] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Heiko Stuebner , Shawn Lin , linux-rockchip@lists.infradead.org, Tom Joseph , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org The Rockchip PCIe host controller is in fact a Cadence based PCIe host. This is most evident by comparing the address translation registers. As a first step to merge the Rockchip driver into the Cadence driver, let's just move the Rockchip driver into the Cadence directoy. This at least makes the relationship obvious. Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Tom Joseph Cc: Heiko Stuebner Cc: Shawn Lin Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Signed-off-by: Rob Herring --- This is going to conflict at least with 'PCI: rockchip: Fix bus checks in rockchip_pcie_valid_device()' and the common ECAM defines. drivers/pci/controller/Kconfig | 28 ------------------- drivers/pci/controller/Makefile | 3 -- drivers/pci/controller/cadence/Kconfig | 28 +++++++++++++++++++ drivers/pci/controller/cadence/Makefile | 3 ++ .../{ => cadence}/pcie-rockchip-ep.c | 0 .../{ => cadence}/pcie-rockchip-host.c | 2 +- .../controller/{ => cadence}/pcie-rockchip.c | 2 +- .../controller/{ => cadence}/pcie-rockchip.h | 0 8 files changed, 33 insertions(+), 33 deletions(-) rename drivers/pci/controller/{ => cadence}/pcie-rockchip-ep.c (100%) rename drivers/pci/controller/{ => cadence}/pcie-rockchip-host.c (99%) rename drivers/pci/controller/{ => cadence}/pcie-rockchip.c (99%) rename drivers/pci/controller/{ => cadence}/pcie-rockchip.h (100%) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index f18c3725ef80..3ffc4ad01a33 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -202,34 +202,6 @@ config PCI_HOST_THUNDER_ECAM help Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs. -config PCIE_ROCKCHIP - bool - depends on PCI - -config PCIE_ROCKCHIP_HOST - tristate "Rockchip PCIe host controller" - depends on ARCH_ROCKCHIP || COMPILE_TEST - depends on OF - depends on PCI_MSI_IRQ_DOMAIN - select MFD_SYSCON - select PCIE_ROCKCHIP - help - Say Y here if you want internal PCI support on Rockchip SoC. - There is 1 internal PCIe port available to support GEN2 with - 4 slots. - -config PCIE_ROCKCHIP_EP - bool "Rockchip PCIe endpoint controller" - depends on ARCH_ROCKCHIP || COMPILE_TEST - depends on OF - depends on PCI_ENDPOINT - select MFD_SYSCON - select PCIE_ROCKCHIP - help - Say Y here if you want to support Rockchip PCIe controller in - endpoint mode on Rockchip SoC. There is 1 internal PCIe port - available to support GEN2 with 4 slots. - config PCIE_MEDIATEK tristate "MediaTek PCIe controller" depends on ARCH_MEDIATEK || COMPILE_TEST diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile index bcdbf49ab1e4..1c03d1178df0 100644 --- a/drivers/pci/controller/Makefile +++ b/drivers/pci/controller/Makefile @@ -23,9 +23,6 @@ obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o -obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o -obj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o -obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o obj-$(CONFIG_VMD) += vmd.o diff --git a/drivers/pci/controller/cadence/Kconfig b/drivers/pci/controller/cadence/Kconfig index 5d30564190e1..2bdf6eb03ed8 100644 --- a/drivers/pci/controller/cadence/Kconfig +++ b/drivers/pci/controller/cadence/Kconfig @@ -65,4 +65,32 @@ config PCI_J721E_EP Say Y here if you want to support the TI J721E PCIe platform controller in endpoint mode. TI J721E PCIe controller uses Cadence PCIe core. + +config PCIE_ROCKCHIP + bool + +config PCIE_ROCKCHIP_HOST + tristate "Rockchip PCIe host controller" + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on OF + depends on PCI_MSI_IRQ_DOMAIN + select MFD_SYSCON + select PCIE_ROCKCHIP + help + Say Y here if you want internal PCI support on Rockchip SoC. + There is 1 internal PCIe port available to support GEN2 with + 4 slots. + +config PCIE_ROCKCHIP_EP + bool "Rockchip PCIe endpoint controller" + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on OF + depends on PCI_ENDPOINT + select MFD_SYSCON + select PCIE_ROCKCHIP + help + Say Y here if you want to support Rockchip PCIe controller in + endpoint mode on Rockchip SoC. There is 1 internal PCIe port + available to support GEN2 with 4 slots. + endmenu diff --git a/drivers/pci/controller/cadence/Makefile b/drivers/pci/controller/cadence/Makefile index 9bac5fb2f13d..eb1aeae6c52b 100644 --- a/drivers/pci/controller/cadence/Makefile +++ b/drivers/pci/controller/cadence/Makefile @@ -4,3 +4,6 @@ obj-$(CONFIG_PCIE_CADENCE_HOST) += pcie-cadence-host.o obj-$(CONFIG_PCIE_CADENCE_EP) += pcie-cadence-ep.o obj-$(CONFIG_PCIE_CADENCE_PLAT) += pcie-cadence-plat.o obj-$(CONFIG_PCI_J721E) += pci-j721e.o +obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o +obj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o +obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/cadence/pcie-rockchip-ep.c similarity index 100% rename from drivers/pci/controller/pcie-rockchip-ep.c rename to drivers/pci/controller/cadence/pcie-rockchip-ep.c diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/cadence/pcie-rockchip-host.c similarity index 99% rename from drivers/pci/controller/pcie-rockchip-host.c rename to drivers/pci/controller/cadence/pcie-rockchip-host.c index 0bb2fb3e8a0b..1ee409d7b7e5 100644 --- a/drivers/pci/controller/pcie-rockchip-host.c +++ b/drivers/pci/controller/cadence/pcie-rockchip-host.c @@ -36,7 +36,7 @@ #include #include -#include "../pci.h" +#include "../../pci.h" #include "pcie-rockchip.h" static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip) diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/cadence/pcie-rockchip.c similarity index 99% rename from drivers/pci/controller/pcie-rockchip.c rename to drivers/pci/controller/cadence/pcie-rockchip.c index 904dec0d3a88..72ba71bab8e9 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/cadence/pcie-rockchip.c @@ -19,7 +19,7 @@ #include #include -#include "../pci.h" +#include "../../pci.h" #include "pcie-rockchip.h" int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/cadence/pcie-rockchip.h similarity index 100% rename from drivers/pci/controller/pcie-rockchip.h rename to drivers/pci/controller/cadence/pcie-rockchip.h