From patchwork Tue Oct 13 10:32:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Billy Tsai X-Patchwork-Id: 11835381 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2BE8192C for ; Tue, 13 Oct 2020 10:36:10 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D091D20870 for ; Tue, 13 Oct 2020 10:36:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="2HWvkWlC"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="U+guyJE5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D091D20870 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vsRntDRfhoxxe9bEjZvm2BHPQqGsms9+7EkNuD+nfJI=; b=2HWvkWlCjSvFjXE2IN7TDiALy uKgTU7hLZOVKbxdPoi+9ba9WAd30gHZH9zN1LpY6ye5HmzKsG8E/TXeg7zElB1HuhrlMSNYThFl3w jXnSjY490AXYfowDQ2FO5+7ta+BQNR8kJzZAZG9LADEssrIqGS4ePqm61GA0MdMxnk7169kpU2FK5 K5i5IYq2H/zZHMkc8juADSnboeJphJ5T99L53FPDHbVeSubxAWzUJC69UrO8LgbH9koKUucHLLdKR jjR6Eb1DfTogJFzWl8hu4N/PW4i683wppVHfzHr5DGxyEqCQkgnSaJqovsMZRtiMcGFghEgCQHgAt XjHuwyFHQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kSHdj-00045X-Ke; Tue, 13 Oct 2020 10:34:43 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kSHdh-00044l-KP for linux-arm-kernel@merlin.infradead.org; Tue, 13 Oct 2020 10:34:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=BJI6DpCi3I2Wh1OQRC2i8jUpiHsXc/R0KSLDZdyloZs=; b=U+guyJE5IDRTppc/vW3G2T178y /hT46ocEKLODw1cixcQAbdJ2uETpKAVtwJYZcDMncpvcY6NU/E5IZ1Pr4Q7gIaUGRsrei+mAKY3RJ q+9TAlAR4CZhWskRBg67yJ5bPfo9KHmIEZyY96yEvQALz/bE6lSu3cc+zM3e52wJCfPW5So1xPkds Efw0Q5psWviA5795vTO8lT9lnCPkfdZfazF/VHf6hpLJK2ieXMijphu1y7/82d6JFcehQR0wAWbn5 5vpbBlcAUo/wfBzUAcr0vYdDy3kZ3Imfp+IBGzExaJPPUYQS8PBm+Bm1OWiNejSBzuDj58byOIMZP RQPaabcw==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by casper.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kSHck-0006qI-8C for linux-arm-kernel@lists.infradead.org; Tue, 13 Oct 2020 10:34:40 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 09DAUguY010592; Tue, 13 Oct 2020 18:30:42 +0800 (GMT-8) (envelope-from billy_tsai@aspeedtech.com) Received: from localhost.localdomain (192.168.10.9) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 13 Oct 2020 18:32:57 +0800 From: Billy Tsai To: , , , , , , , , , , , , , , Subject: [PATCH 1/3] iio: adc: aspeed: Orgnaize and add the define of adc Date: Tue, 13 Oct 2020 18:32:43 +0800 Message-ID: <20201013103245.16723-2-billy_tsai@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201013103245.16723-1-billy_tsai@aspeedtech.com> References: <20201013103245.16723-1-billy_tsai@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.10.9] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 09DAUguY010592 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201013_113344_590673_956EA544 X-CRM114-Status: UNSURE ( 8.94 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.4 on casper.infradead.org summary: Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 SPF_FAIL SPF: sender does not match SPF record (fail) [SPF failed: Please see http://www.openspf.org/Why?s=mfrom; id=billy_tsai%40aspeedtech.com; ip=211.20.114.71; r=casper.infradead.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: BMC-SW@aspeedtech.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch organizes the define of adc to multiple partitions and adds the new bit field define for ast2600 driver. Signed-off-by: Billy Tsai --- drivers/iio/adc/aspeed_adc.c | 42 ++++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index 1e5375235cfe..ae400c4d6d40 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -21,23 +21,57 @@ #include #include +/********************************************************** + * ADC feature define + *********************************************************/ #define ASPEED_RESOLUTION_BITS 10 #define ASPEED_CLOCKS_PER_SAMPLE 12 +/********************************************************** + * ADC HW register offset define + *********************************************************/ #define ASPEED_REG_ENGINE_CONTROL 0x00 #define ASPEED_REG_INTERRUPT_CONTROL 0x04 #define ASPEED_REG_VGA_DETECT_CONTROL 0x08 #define ASPEED_REG_CLOCK_CONTROL 0x0C +#define ASPEED_REG_COMPENSATION_TRIM 0xC4 #define ASPEED_REG_MAX 0xC0 +/********************************************************** + * ADC register Bit field + *********************************************************/ +/*ENGINE_CONTROL */ +/* [0] */ +#define ASPEED_ENGINE_ENABLE BIT(0) +/* [3:1] */ #define ASPEED_OPERATION_MODE_POWER_DOWN (0x0 << 1) #define ASPEED_OPERATION_MODE_STANDBY (0x1 << 1) #define ASPEED_OPERATION_MODE_NORMAL (0x7 << 1) - -#define ASPEED_ENGINE_ENABLE BIT(0) - +/* [4] */ +#define ASPEED_CTRL_COMPENSATION BIT(4) +/* [5] */ +#define ASPEED_AUTOPENSATING BIT(5) +/* [7:6] */ +#define ASPEED_REF_VOLTAGE_2500mV (0 << 6) +#define ASPEED_REF_VOLTAGE_1200mV (1 << 6) +#define ASPEED_REF_VOLTAGE_EXT_HIGH (2 << 6) +#define ASPEED_REF_VOLTAGE_EXT_LOW (3 << 6) +#define ASPEED_BATTERY_SENSING_VOL_DIVIDE_2_3 (0 << 6) +#define ASPEED_BATTERY_SENSING_VOL_DIVIDE_1_3 (1 << 6) +/* [8] */ #define ASPEED_ADC_CTRL_INIT_RDY BIT(8) - +/* [12] */ +#define ASPEED_ADC_CH7_VOLTAGE_NORMAL (0 << 12) +#define ASPEED_ADC_CH7_VOLTAGE_BATTERY (1 << 12) +/* [13] */ +#define ASPEED_ADC_EN_BATTERY_SENSING BIT(13) +/* [31:16] */ +#define ASPEED_ADC_CTRL_CH_EN(n) (1 << (16 + n)) +#define ASPEED_ADC_CTRL_CH_EN_ALL GENMASK(31, 16) + +/********************************************************** + * Software setting + *********************************************************/ #define ASPEED_ADC_INIT_POLLING_TIME 500 #define ASPEED_ADC_INIT_TIMEOUT 500000 From patchwork Tue Oct 13 10:32:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Billy Tsai X-Patchwork-Id: 11835375 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 19AE9109B for ; Tue, 13 Oct 2020 10:34:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BCF8820870 for ; Tue, 13 Oct 2020 10:34:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="GklB6hpP"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="tH/acgP7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BCF8820870 Authentication-Results: mail.kernel.org; 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Received: from twspam01.aspeedtech.com ([211.20.114.71]) by casper.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kSHck-0006qE-9Q for linux-arm-kernel@lists.infradead.org; Tue, 13 Oct 2020 10:34:40 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 09DAUg2e010593; Tue, 13 Oct 2020 18:30:42 +0800 (GMT-8) (envelope-from billy_tsai@aspeedtech.com) Received: from localhost.localdomain (192.168.10.9) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 13 Oct 2020 18:32:57 +0800 From: Billy Tsai To: , , , , , , , , , , , , , , Subject: [PATCH 2/3] iio: adc: aspeed: Modify driver for ast2600 Date: Tue, 13 Oct 2020 18:32:44 +0800 Message-ID: <20201013103245.16723-3-billy_tsai@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201013103245.16723-1-billy_tsai@aspeedtech.com> References: <20201013103245.16723-1-billy_tsai@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.10.9] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 09DAUg2e010593 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201013_113344_647218_6FF4C7EC X-CRM114-Status: GOOD ( 23.80 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.4 on casper.infradead.org summary: Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 SPF_FAIL SPF: sender does not match SPF record (fail) [SPF failed: Please see http://www.openspf.org/Why?s=mfrom; id=billy_tsai%40aspeedtech.com; ip=211.20.114.71; r=casper.infradead.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: BMC-SW@aspeedtech.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch is used to handle the difference between ast2600 and previous versions. Signed-off-by: Billy Tsai --- drivers/iio/adc/aspeed_adc.c | 129 ++++++++++++++++++++++++++--------- 1 file changed, 95 insertions(+), 34 deletions(-) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index ae400c4d6d40..fc4bbccf9348 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Aspeed AST2400/2500 ADC + * Aspeed AST2400/2500/2600 ADC * * Copyright (C) 2017 Google, Inc. */ @@ -81,6 +81,7 @@ struct aspeed_adc_model_data { unsigned int max_sampling_rate; // Hz unsigned int vref_voltage; // mV bool wait_init_sequence; + int num_channels; }; struct aspeed_adc_data { @@ -90,6 +91,7 @@ struct aspeed_adc_data { struct clk_hw *clk_prescaler; struct clk_hw *clk_scaler; struct reset_control *rst; + unsigned int vref_voltage; // mV }; #define ASPEED_CHAN(_idx, _data_reg_addr) { \ @@ -126,8 +128,6 @@ static int aspeed_adc_read_raw(struct iio_dev *indio_dev, int *val, int *val2, long mask) { struct aspeed_adc_data *data = iio_priv(indio_dev); - const struct aspeed_adc_model_data *model_data = - of_device_get_match_data(data->dev); switch (mask) { case IIO_CHAN_INFO_RAW: @@ -135,7 +135,7 @@ static int aspeed_adc_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: - *val = model_data->vref_voltage; + *val = data->vref_voltage; *val2 = ASPEED_RESOLUTION_BITS; return IIO_VAL_FRACTIONAL_LOG2; @@ -208,8 +208,13 @@ static int aspeed_adc_probe(struct platform_device *pdev) struct aspeed_adc_data *data; const struct aspeed_adc_model_data *model_data; const char *clk_parent_name; + char prescaler_clk_name[32]; + char scaler_clk_name[32]; int ret; u32 adc_engine_control_reg_val; + u32 ref_voltage_cfg = 0; + + model_data = of_device_get_match_data(&pdev->dev); indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*data)); if (!indio_dev) @@ -225,29 +230,75 @@ static int aspeed_adc_probe(struct platform_device *pdev) /* Register ADC clock prescaler with source specified by device tree. */ spin_lock_init(&data->clk_lock); clk_parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0); + snprintf(prescaler_clk_name, sizeof(prescaler_clk_name), + "prescaler-%s", pdev->name); + snprintf(scaler_clk_name, sizeof(scaler_clk_name), + "scaler-%s", pdev->name); + if (!strcmp(model_data->model_name, "ast2400-adc") || + !strcmp(model_data->model_name, "ast2500-adc")) { + /* Divider config */ + data->clk_prescaler = clk_hw_register_divider( + &pdev->dev, prescaler_clk_name, clk_parent_name, + 0, + data->base + ASPEED_REG_CLOCK_CONTROL, 17, 15, + CLK_DIVIDER_ONE_BASED, &data->clk_lock); + if (IS_ERR(data->clk_prescaler)) + return PTR_ERR(data->clk_prescaler); - data->clk_prescaler = clk_hw_register_divider( - &pdev->dev, "prescaler", clk_parent_name, 0, - data->base + ASPEED_REG_CLOCK_CONTROL, - 17, 15, 0, &data->clk_lock); - if (IS_ERR(data->clk_prescaler)) - return PTR_ERR(data->clk_prescaler); - - /* - * Register ADC clock scaler downstream from the prescaler. Allow rate - * setting to adjust the prescaler as well. - */ - data->clk_scaler = clk_hw_register_divider( - &pdev->dev, "scaler", "prescaler", - CLK_SET_RATE_PARENT, - data->base + ASPEED_REG_CLOCK_CONTROL, - 0, 10, 0, &data->clk_lock); - if (IS_ERR(data->clk_scaler)) { - ret = PTR_ERR(data->clk_scaler); - goto scaler_error; + /* + * Register ADC clock scaler downstream from the prescaler. Allow rate + * setting to adjust the prescaler as well. + */ + data->clk_scaler = clk_hw_register_divider( + &pdev->dev, scaler_clk_name, prescaler_clk_name, + CLK_SET_RATE_PARENT, + data->base + ASPEED_REG_CLOCK_CONTROL, 0, 10, + CLK_DIVIDER_ONE_BASED, &data->clk_lock); + if (IS_ERR(data->clk_scaler)) { + ret = PTR_ERR(data->clk_scaler); + goto scaler_error; + } + /* Get ref_voltage */ + data->vref_voltage = model_data->vref_voltage; + } else if (!strcmp(model_data->model_name, "ast2600-adc")) { + /* Divider config */ + data->clk_scaler = clk_hw_register_divider( + &pdev->dev, scaler_clk_name, clk_parent_name, + CLK_SET_RATE_UNGATE, + data->base + ASPEED_REG_CLOCK_CONTROL, 0, 16, + CLK_DIVIDER_ONE_BASED, &data->clk_lock); + if (IS_ERR(data->clk_scaler)) + return PTR_ERR(data->clk_scaler); + /* + * Get ref_voltage: + * If reference voltage is between 1550~1650mv, we can set + * fields either ASPEED_REF_VOLTAGE_EXT_HIGH or ASPEED_REF_VOLTAGE_EXT_LOW. + * In this place, we select ASPEED_REF_VOLTAGE_EXT_HIGH as higher priority. + */ + if (!of_property_read_u32(pdev->dev.of_node, "ref_voltage", + &data->vref_voltage)) { + if (data->vref_voltage == 2500) + ref_voltage_cfg = ASPEED_REF_VOLTAGE_2500mV; + else if (data->vref_voltage == 1200) + ref_voltage_cfg = ASPEED_REF_VOLTAGE_1200mV; + else if ((data->vref_voltage >= 1550) && + (data->vref_voltage <= 2700)) + ref_voltage_cfg = ASPEED_REF_VOLTAGE_EXT_HIGH; + else if ((data->vref_voltage >= 900) && + (data->vref_voltage <= 1650)) + ref_voltage_cfg = ASPEED_REF_VOLTAGE_EXT_LOW; + else { + dev_err(&pdev->dev, "ref_voltage property is out of range: %d\n", + data->vref_voltage); + return -EINVAL; + } + } else { + dev_err(&pdev->dev, "Couldn't read ref_voltage property\n"); + return -EINVAL; + } } - data->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL); + data->rst = devm_reset_control_get_shared(&pdev->dev, NULL); if (IS_ERR(data->rst)) { dev_err(&pdev->dev, "invalid or missing reset controller device tree entry"); @@ -256,13 +307,14 @@ static int aspeed_adc_probe(struct platform_device *pdev) } reset_control_deassert(data->rst); - model_data = of_device_get_match_data(&pdev->dev); + adc_engine_control_reg_val = readl(data->base + ASPEED_REG_ENGINE_CONTROL); + /* Enable engine in normal mode and set ref_voltage */ + adc_engine_control_reg_val |= (ASPEED_OPERATION_MODE_NORMAL | + ASPEED_ENGINE_ENABLE | ref_voltage_cfg); + writel(adc_engine_control_reg_val, + data->base + ASPEED_REG_ENGINE_CONTROL); if (model_data->wait_init_sequence) { - /* Enable engine in normal mode. */ - writel(ASPEED_OPERATION_MODE_NORMAL | ASPEED_ENGINE_ENABLE, - data->base + ASPEED_REG_ENGINE_CONTROL); - /* Wait for initial sequence complete. */ ret = readl_poll_timeout(data->base + ASPEED_REG_ENGINE_CONTROL, adc_engine_control_reg_val, @@ -279,18 +331,16 @@ static int aspeed_adc_probe(struct platform_device *pdev) if (ret) goto clk_enable_error; - adc_engine_control_reg_val = GENMASK(31, 16) | - ASPEED_OPERATION_MODE_NORMAL | ASPEED_ENGINE_ENABLE; + adc_engine_control_reg_val |= ASPEED_ADC_CTRL_CH_EN_ALL; writel(adc_engine_control_reg_val, data->base + ASPEED_REG_ENGINE_CONTROL); - model_data = of_device_get_match_data(&pdev->dev); indio_dev->name = model_data->model_name; indio_dev->dev.parent = &pdev->dev; indio_dev->info = &aspeed_adc_iio_info; indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->channels = aspeed_adc_iio_channels; - indio_dev->num_channels = ARRAY_SIZE(aspeed_adc_iio_channels); + indio_dev->num_channels = model_data->num_channels; ret = iio_device_register(indio_dev); if (ret) @@ -333,6 +383,7 @@ static const struct aspeed_adc_model_data ast2400_model_data = { .vref_voltage = 2500, // mV .min_sampling_rate = 10000, .max_sampling_rate = 500000, + .num_channels = 16, }; static const struct aspeed_adc_model_data ast2500_model_data = { @@ -341,11 +392,21 @@ static const struct aspeed_adc_model_data ast2500_model_data = { .min_sampling_rate = 1, .max_sampling_rate = 1000000, .wait_init_sequence = true, + .num_channels = 16, +}; + +static const struct aspeed_adc_model_data ast2600_model_data = { + .model_name = "ast2600-adc", + .min_sampling_rate = 1, + .max_sampling_rate = 1000000, + .wait_init_sequence = true, + .num_channels = 8, }; static const struct of_device_id aspeed_adc_matches[] = { { .compatible = "aspeed,ast2400-adc", .data = &ast2400_model_data }, { .compatible = "aspeed,ast2500-adc", .data = &ast2500_model_data }, + { .compatible = "aspeed,ast2600-adc", .data = &ast2600_model_data }, {}, }; MODULE_DEVICE_TABLE(of, aspeed_adc_matches); @@ -362,5 +423,5 @@ static struct platform_driver aspeed_adc_driver = { module_platform_driver(aspeed_adc_driver); MODULE_AUTHOR("Rick Altherr "); -MODULE_DESCRIPTION("Aspeed AST2400/2500 ADC Driver"); +MODULE_DESCRIPTION("Aspeed AST2400/2500/2600 ADC Driver"); MODULE_LICENSE("GPL"); From patchwork Tue Oct 13 10:32:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Billy Tsai X-Patchwork-Id: 11835377 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 987911592 for ; Tue, 13 Oct 2020 10:35:13 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 67E3020870 for ; Tue, 13 Oct 2020 10:35:13 +0000 (UTC) Authentication-Results: mail.kernel.org; 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id=billy_tsai%40aspeedtech.com; ip=211.20.114.71; r=casper.infradead.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: BMC-SW@aspeedtech.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org At ast2600 ref_voltage becomes configurable and this property is board dependency. Signed-off-by: Billy Tsai --- .../devicetree/bindings/iio/adc/aspeed_adc.txt | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt index 034fc2ba100e..0ba1980c4e06 100644 --- a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt +++ b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt @@ -3,8 +3,11 @@ Aspeed ADC This device is a 10-bit converter for 16 voltage channels. All inputs are single ended. +At ast2600, this device split into two individual IPs and each contains 8 voltage channels. + +Chip level dtsi: Required properties: -- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc" +- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc" or "aspeed,ast2600-adc" - reg: memory window mapping address and length - clocks: Input clock used to derive the sample clock. Expected to be the SoC's APB clock. @@ -20,3 +23,14 @@ Example: resets = <&syscon ASPEED_RESET_ADC>; #io-channel-cells = <1>; }; + +Board level dts: +Required properties: +- ref_voltage: (ast2600 only) + - Reference voltage in millivolts for the conversions. + - The range of value is 900 to 2700 mv. + +Example: +&adc0 { + ref_voltage = <2500>; +}; \ No newline at end of file