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Tue, 30 Oct 2018 08:42:38 +0000 From: Joakim Zhang To: "shawnguo@kernel.org" , "s.hauer@pengutronix.de" Subject: [PATCH V2 1/3] ARM: dts: imx6sx-sdb: Add flexcan support Thread-Topic: [PATCH V2 1/3] ARM: dts: imx6sx-sdb: Add flexcan support Thread-Index: AQHUcCyDhSho9jiNaEyC5yT7iVjQXg== Date: Tue, 30 Oct 2018 08:42:38 +0000 Message-ID: <20181030083954.26440-2-qiangqing.zhang@nxp.com> References: <20181030083954.26440-1-qiangqing.zhang@nxp.com> In-Reply-To: <20181030083954.26440-1-qiangqing.zhang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.17.1 x-clientproxiedby: SG2PR0302CA0022.apcprd03.prod.outlook.com (2603:1096:3:2::32) To DB7PR04MB4618.eurprd04.prod.outlook.com (2603:10a6:5:36::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=qiangqing.zhang@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [92.121.68.129] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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Dong" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Joakim Zhang , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , Fabio Estevam , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dong Aisheng CAN transceiver is different on RevA and RevB board. It's active high on RevA while active low on Rev B. Signed-off-by: Dong Aisheng Signed-off-by: Joakim Zhang --- arch/arm/boot/dts/imx6sx-sdb-reva.dts | 12 ++++++++ arch/arm/boot/dts/imx6sx-sdb.dts | 5 ++++ arch/arm/boot/dts/imx6sx-sdb.dtsi | 42 +++++++++++++++++++++++++++ 3 files changed, 59 insertions(+) diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts b/arch/arm/boot/dts/imx6sx-sdb-reva.dts index 9cc6ff206aea..d98dcf00b9c4 100644 --- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts +++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts @@ -10,6 +10,18 @@ / { model = "Freescale i.MX6 SoloX SDB RevA Board"; + + /* Transceiver EN/STBY is active high on RevA board */ + reg_can_en: regulator-can-en { + gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_stby: regulator-can-stby { + gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_en>; + }; }; &i2c1 { diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts index 6dd9bebfe027..092b8de142a8 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dts +++ b/arch/arm/boot/dts/imx6sx-sdb.dts @@ -10,6 +10,11 @@ / { model = "Freescale i.MX6 SoloX SDB RevB Board"; + + /* Transceiver EN/STBY is active low on RevB board */ + reg_can_stby: regulator-can-stby { + gpio = <&gpio4 27 GPIO_ACTIVE_LOW>; + }; }; &i2c1 { diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi index 53b3408b5fab..4de2473293aa 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi @@ -138,6 +138,20 @@ regulator-max-microvolt = <5000000>; }; + reg_can_en: regulator-can-en { + compatible = "regulator-fixed"; + regulator-name = "can-en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_can_stby: regulator-can-stby { + compatible = "regulator-fixed"; + regulator-name = "can-stby"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + sound { compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962"; model = "wm8962-audio"; @@ -204,6 +218,20 @@ status = "okay"; }; +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -399,6 +427,20 @@ >; }; + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020 + MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020 + MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020 + >; + }; + pinctrl_gpio_keys: gpio_keysgrp { fsl,pins = < MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059 From patchwork Tue Oct 30 08:42:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 10661231 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 55ACE13A4 for ; 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Dong" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Joakim Zhang , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , Fabio Estevam , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dong Aisheng The CAN transceiver on MX6SX Sabreauto board seems in sleep mode by default after power up the board. User has to press the wakeup key on ARD baseboard before using the transceiver, or it may not work properly when power up the board at the first time(warm reset does not have such issue). This patch operates the wake pin too besides stby/en pins by chaining them together in regulator mode. Signed-off-by: Dong Aisheng Signed-off-by: Joakim Zhang --- arch/arm/boot/dts/imx6sx-sabreauto.dts | 57 ++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts index 841a27f3198f..8f3319e7692f 100644 --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts @@ -36,6 +36,35 @@ gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + reg_can_wake: regulator-can-wake { + compatible = "regulator-fixed"; + regulator-name = "can-wake"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_en: regulator-can-en { + compatible = "regulator-fixed"; + regulator-name = "can-en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_wake>; + }; + + reg_can_stby: regulator-can-stby { + compatible = "regulator-fixed"; + regulator-name = "can-stby"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&max7310_b 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_en>; + }; }; &anaclk2 { @@ -75,6 +104,20 @@ status = "okay"; }; +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; @@ -149,6 +192,20 @@ >; }; + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020 + MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020 + MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1 From patchwork Tue Oct 30 08:42:47 2018 Content-Type: text/plain; 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Tue, 30 Oct 2018 08:42:47 +0000 From: Joakim Zhang To: "shawnguo@kernel.org" , "s.hauer@pengutronix.de" Subject: [PATCH V2 3/3] ARM: dts: sabreauto: Add flexcan support Thread-Topic: [PATCH V2 3/3] ARM: dts: sabreauto: Add flexcan support Thread-Index: AQHUcCyIGORNf3a2+UCEyOg35tyqnQ== Date: Tue, 30 Oct 2018 08:42:47 +0000 Message-ID: <20181030083954.26440-4-qiangqing.zhang@nxp.com> References: <20181030083954.26440-1-qiangqing.zhang@nxp.com> In-Reply-To: <20181030083954.26440-1-qiangqing.zhang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.17.1 x-clientproxiedby: SG2PR0302CA0022.apcprd03.prod.outlook.com (2603:1096:3:2::32) To DB7PR04MB4618.eurprd04.prod.outlook.com (2603:10a6:5:36::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=qiangqing.zhang@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [92.121.68.129] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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Dong" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Joakim Zhang , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , Fabio Estevam , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dong Aisheng The flexcan1 is pin conflict with fec. So we add a new dts file with flexcan1 enabled with fec disabled for user to use. Signed-off-by: Dong Aisheng Signed-off-by: Joakim Zhang --- .../boot/dts/imx6dl-sabreauto-flexcan1.dts | 14 ++++++ .../arm/boot/dts/imx6q-sabreauto-flexcan1.dts | 14 ++++++ arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 47 +++++++++++++++++++ 3 files changed, 75 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-sabreauto-flexcan1.dts create mode 100644 arch/arm/boot/dts/imx6q-sabreauto-flexcan1.dts diff --git a/arch/arm/boot/dts/imx6dl-sabreauto-flexcan1.dts b/arch/arm/boot/dts/imx6dl-sabreauto-flexcan1.dts new file mode 100644 index 000000000000..4ebcc283f549 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-sabreauto-flexcan1.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2013 Freescale Semiconductor, Inc. + +#include "imx6dl-sabreauto.dts" + +&can1{ + status = "okay"; +}; + +&fec { + /* pin conflict with flexcan1 */ + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx6q-sabreauto-flexcan1.dts b/arch/arm/boot/dts/imx6q-sabreauto-flexcan1.dts new file mode 100644 index 000000000000..e7e684656f09 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-sabreauto-flexcan1.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2013 Freescale Semiconductor, Inc. + +#include "imx6q-sabreauto.dts" + +&can1{ + status = "okay"; +}; + +&fec { + /* pin conflict with flexcan1 */ + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index a10f0ad0bfb1..c1111b972b46 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -101,6 +101,25 @@ enable-active-high; }; + reg_can_en: regulator-can-en { + compatible = "regulator-fixed"; + regulator-name = "can-en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&max7310_b 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_stby: regulator-can-stby { + compatible = "regulator-fixed"; + regulator-name = "can-stby"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_en>; + }; + sound-cs42888 { compatible = "fsl,imx6-sabreauto-cs42888", "fsl,imx-audio-cs42888"; @@ -279,6 +298,20 @@ status = "okay"; }; +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_stby>; + status = "disabled"; /* pin conflict with fec */ +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; @@ -494,6 +527,20 @@ >; }; + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x17059 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x17059 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x17059 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x17059 + >; + }; + pinctrl_gpio_keys: gpiokeysgrp { fsl,pins = < MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0