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dmarc=none action=none header.from=nxp.com; Received: from DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) by DBAPR04MB7333.eurprd04.prod.outlook.com (2603:10a6:10:1b2::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3455.21; Fri, 16 Oct 2020 05:43:00 +0000 Received: from DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc]) by DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc%9]) with mapi id 15.20.3477.021; Fri, 16 Oct 2020 05:43:00 +0000 From: Joakim Zhang To: mkl@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, peng.fan@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/6] firmware: imx: always export SCU symbols Date: Fri, 16 Oct 2020 21:43:15 +0800 Message-Id: <20201016134320.20321-2-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201016134320.20321-1-qiangqing.zhang@nxp.com> References: <20201016134320.20321-1-qiangqing.zhang@nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) To DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: Nn2OuamZEOff9hTH15XcBFljwAYmY5JlX3D6tLIOSuHkpDwBXZMAxXVzTkUoIuC3qnDLiEd5XxMYugI6HRmOB6c9SARLdP45QWTU36QZtU3bAWMGzyq6Uk0wpsvD2UCcmODitcOhiMInpHGG5w37DEn7HTySLJIAyK732j1E30Hc0ktWx+J6bdsEiWpp6QVlM1AQzdt1BasR03c3peqcv6HBqWTpD8FzfvsNrfpPL5a07bSD67n2Vf1x/zC24gQsYtUyIf/7mYPv0PvJF0W9fo+VFvG52w6J1IplAduuKAFBgBkrBsgvS1pZ0sCG+/Kfy9X7FK3KHDhGp3SENLH9z7nlp4qACTEznEVzXeH0bdLDYtoxoWTHlOGwDOXgp/3TYdNPOv1Lhk7EauDHeZ/th984KUOdlbQN7hfDvibpqbQ6ypfHjF8JjnITOrhXqOst+TMo7klfOVdliIQ90OVyhESQgYr+xlefr0oZQ/Iqn7FpvvQcJDNQJS4Yma+m+03EAPQmtxPpzDsli/mu/VRGVhTae/ENvBsiTRIwTwPQOeGwKlU6ZPuo4bHu90RMOK0loghJwx1Ac4b2nCyQY6j+b5nr+/ATAkkedrEZJ1h/j+FtfLaRHRvsEoqM+XkXiZ0dMmY9tdK01mUyxTgH2avoZw== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 13a9bd34-94cd-47c8-9123-08d8719657dc X-MS-Exchange-CrossTenant-AuthSource: DB8PR04MB6795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2020 05:43:00.8420 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: SHkB26GYl2BjizHcB8eYHSfdvBmuMemH+uXmMKLkcqxT5+Jwg7KK8bzLF+ULBdT5vAb9sgZEnk4ePavUcABIsg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR04MB7333 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Liu Ying Always export SCU symbols for both SCU SoCs and non-SCU SoCs to avoid build error. Signed-off-by: Liu Ying Signed-off-by: Peng Fan Signed-off-by: Joakim Zhang --- include/linux/firmware/imx/ipc.h | 15 +++++++++++++++ include/linux/firmware/imx/svc/misc.h | 23 +++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/include/linux/firmware/imx/ipc.h b/include/linux/firmware/imx/ipc.h index 891057434858..300fa253fc30 100644 --- a/include/linux/firmware/imx/ipc.h +++ b/include/linux/firmware/imx/ipc.h @@ -34,6 +34,7 @@ struct imx_sc_rpc_msg { uint8_t func; }; +#if IS_ENABLED(CONFIG_IMX_SCU) /* * This is an function to send an RPC message over an IPC channel. * It is called by client-side SCFW API function shims. @@ -55,4 +56,18 @@ int imx_scu_call_rpc(struct imx_sc_ipc *ipc, void *msg, bool have_resp); * @return Returns an error code (0 = success, failed if < 0) */ int imx_scu_get_handle(struct imx_sc_ipc **ipc); + +#else +static inline int +imx_scu_call_rpc(struct imx_sc_ipc *ipc, void *msg, bool have_resp) +{ + return -EIO; +} + +static inline int imx_scu_get_handle(struct imx_sc_ipc **ipc) +{ + return -EIO; +} +#endif + #endif /* _SC_IPC_H */ diff --git a/include/linux/firmware/imx/svc/misc.h b/include/linux/firmware/imx/svc/misc.h index 031dd4d3c766..d255048f17de 100644 --- a/include/linux/firmware/imx/svc/misc.h +++ b/include/linux/firmware/imx/svc/misc.h @@ -46,6 +46,7 @@ enum imx_misc_func { * Control Functions */ +#if IS_ENABLED(CONFIG_IMX_SCU) int imx_sc_misc_set_control(struct imx_sc_ipc *ipc, u32 resource, u8 ctrl, u32 val); @@ -55,4 +56,26 @@ int imx_sc_misc_get_control(struct imx_sc_ipc *ipc, u32 resource, int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 resource, bool enable, u64 phys_addr); +#else +static inline int +imx_sc_misc_set_control(struct imx_sc_ipc *ipc, u32 resource, + u8 ctrl, u32 val) +{ + return -EIO; +} + +static inline int +imx_sc_misc_get_control(struct imx_sc_ipc *ipc, u32 resource, + u8 ctrl, u32 *val) +{ + return -EIO; +} + +static inline int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 resource, + bool enable, u64 phys_addr) +{ + return -EIO; +} +#endif + #endif /* _SC_MISC_API_H */ From patchwork Fri Oct 16 13:43:16 2020 Content-Type: text/plain; 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Fri, 16 Oct 2020 05:43:05 +0000 From: Joakim Zhang To: mkl@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, peng.fan@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/6] dt-bindings: can: flexcan: fix fsl,clk-source property Date: Fri, 16 Oct 2020 21:43:16 +0800 Message-Id: <20201016134320.20321-3-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201016134320.20321-1-qiangqing.zhang@nxp.com> References: <20201016134320.20321-1-qiangqing.zhang@nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) To DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; 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Fixes: 9d733992772d ("dt-bindings: can: flexcan: add PE clock source property to device tree") Signed-off-by: Joakim Zhang --- Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index e10b6eb955e1..6af67f5e581c 100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -53,5 +53,5 @@ Example: interrupts = <48 0x2>; interrupt-parent = <&mpic>; clock-frequency = <200000000>; // filled in by bootloader - fsl,clk-source = <0>; // select clock source 0 for PE + fsl,clk-source = /bits/ 8 <0>; // select clock source 0 for PE }; From patchwork Fri Oct 16 13:43:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11840893 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.9 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9AADC433DF for ; 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Signed-off-by: Joakim Zhang --- Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index 6af67f5e581c..839c0c0064a2 100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -43,6 +43,10 @@ Optional properties: 0: clock source 0 (oscillator clock) 1: clock source 1 (peripheral clock) +- fsl,can-index: The index of CAN instance. + For SoCs with SCU support, need setup stop mode via SCU firmware, + so this property can help indicate a resource. + - wakeup-source: enable CAN remote wakeup Example: @@ -54,4 +58,5 @@ Example: interrupt-parent = <&mpic>; clock-frequency = <200000000>; // filled in by bootloader fsl,clk-source = /bits/ 8 <0>; // select clock source 0 for PE + fsl,can-index = /bits/ 8 <1>; // the second CAN instance }; From patchwork Fri Oct 16 13:43:18 2020 Content-Type: text/plain; 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Fri, 16 Oct 2020 05:43:14 +0000 From: Joakim Zhang To: mkl@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, peng.fan@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/6] can: flexcan: rename macro FLEXCAN_QUIRK_SETUP_STOP_MODE -> FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR Date: Fri, 16 Oct 2020 21:43:18 +0800 Message-Id: <20201016134320.20321-5-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201016134320.20321-1-qiangqing.zhang@nxp.com> References: <20201016134320.20321-1-qiangqing.zhang@nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) To DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: vWQkW+4AXkDds1yoUqlWb8lFPF7iVZucqBti59ZgQ792k5fOAl/6zWdUD4jnA5SoKPbAPWk0Rt0jLMJGBPzacawo4O5/kCV0Fxjzf2k0VqkeFGMhsmzls9Dl/L4IKr6h7/OxLugmoTM5kgkjuVhboa1mJuvswHX/4DurL95DmSYfKalq6y9tPXbuj/E23voH5BSOyPRmw8d8zQgpgcpiB3kU2svLe1RYywlEZXI9MaqJaRdJGhJcGCVvWSLew5EvujXDvAei+QMGaIETsMwxF6jvp7gqUaTV3mzIJpgmsFocpxA+K6fTe9nMW4dnYpOEtG6GifsCeKqA9+rnu9BurhvH5NgMcU6Ytx+DPS49kFg396ciaqBaeRK9smT4FcOcDop3vuyfmHkgxU18lqNOefOjBMye6TMoNvfkhQcxZDwPXIEt7kvv/FrLaX1WwhKqeKRCsUjLaA1dEfwBf5W2cozScAP2VZdqRninNGTCx8YPzbqq4G1RwrvHIq8/LXPvVxD0Q4ImCIyoklhyyYW/ZpZveZ56Kw594DV7WnIsK7N5VSxaYUdfKyEJZp9CwM5dKYIjDK9yl+uDZr3iY8oC6OPxFwlD9YQT55r+pZakdPcJl2NjZ0LGAGu/Rl8eOrig7r10gtt2fVWb7FlVRZO2Nw== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: eafbac88-e13b-4994-0bc7-08d871965fe4 X-MS-Exchange-CrossTenant-AuthSource: DB8PR04MB6795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2020 05:43:14.3297 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ilV5T0MAMbxWU7xnEmLg23Uz38RwON72vjk+vHs4bTEwg9PXERRsQWGKXLeo0uUydOlG66aFIGOquYtWpvN+vA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR04MB7333 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org This patch intends to rename FLEXCAN_QUIRK_SETUP_STOP_MODE quirk to FLEXCAN_QUIRK_SETUP_STOP_MODE_GRP for non-scu SoCs, coming patch will add quirk for scu SoCs. For non-scu SoCs, setup stop mode with GPR register. For scu SoCs, setup stop mode with SCU firmware. Signed-off-by: Joakim Zhang --- drivers/net/can/flexcan.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index 4d594e977497..e708e7bf28db 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -236,8 +236,8 @@ #define FLEXCAN_QUIRK_BROKEN_PERR_STATE BIT(6) /* default to BE register access */ #define FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN BIT(7) -/* Setup stop mode to support wakeup */ -#define FLEXCAN_QUIRK_SETUP_STOP_MODE BIT(8) +/* Setup stop mode with GPR to support wakeup */ +#define FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR BIT(8) /* Support CAN-FD mode */ #define FLEXCAN_QUIRK_SUPPORT_FD BIT(9) /* support memory detection and correction */ @@ -381,7 +381,7 @@ static const struct flexcan_devtype_data fsl_imx28_devtype_data = { static const struct flexcan_devtype_data fsl_imx6q_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | FLEXCAN_QUIRK_BROKEN_PERR_STATE | - FLEXCAN_QUIRK_SETUP_STOP_MODE, + FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR, }; static const struct flexcan_devtype_data fsl_imx8qm_devtype_data = { @@ -393,7 +393,7 @@ static const struct flexcan_devtype_data fsl_imx8qm_devtype_data = { static struct flexcan_devtype_data fsl_imx8mp_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | - FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SETUP_STOP_MODE | + FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR | FLEXCAN_QUIRK_SUPPORT_FD | FLEXCAN_QUIRK_SUPPORT_ECC, }; @@ -2043,7 +2043,7 @@ static int flexcan_probe(struct platform_device *pdev) of_can_transceiver(dev); devm_can_led_init(dev); - if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE) { + if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) { err = flexcan_setup_stop_mode(pdev); if (err) dev_dbg(&pdev->dev, "failed to setup stop-mode\n"); From patchwork Fri Oct 16 13:43:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11840897 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.9 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAC30C43457 for ; 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dkim=none (message not signed) header.d=none;pengutronix.de; dmarc=none action=none header.from=nxp.com; Received: from DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) by DBAPR04MB7333.eurprd04.prod.outlook.com (2603:10a6:10:1b2::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3455.21; Fri, 16 Oct 2020 05:43:20 +0000 Received: from DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc]) by DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc%9]) with mapi id 15.20.3477.021; Fri, 16 Oct 2020 05:43:19 +0000 From: Joakim Zhang To: mkl@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, peng.fan@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/6] can: flexcan: add CAN wakeup function for i.MX8QM Date: Fri, 16 Oct 2020 21:43:19 +0800 Message-Id: <20201016134320.20321-6-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201016134320.20321-1-qiangqing.zhang@nxp.com> References: <20201016134320.20321-1-qiangqing.zhang@nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) To DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: V7f/+5j5uBLQ9WccAzOGiCmeFkX7ifPJ3oZRuRDmy1I26+waLi/QIiGcAyYBEyk6m3kgBgS7XsjmO0plhGU5OPdNxMhwB4ExCvM4BJ/BQPWgUXB5lY6tjpcJyXLAEfxBMBGKRemYQHW109ovROuKuvriyc2YJkI9wSINSY71W8NUO2NJXEm/mMIHZUKjy2W9MUZxBBpJztOTQ38Aw8gp6T+518eMssoGPkf22ZIgkS+1aFaYklCiK+O+zvG/v19gxadMcr/baoMpaDtPaYXdrW9YfWLpERT3bgMAdLzTIiItnXitnaXxKf7GPKU95Zc49J6oGZWJV3uXm0ww5/X/YCx4hWWkQzmQci+OANxj4IhxudO4TtpNsX8F8ZyY0rCMNtVMjVTZAyr6oIGtg9fo5XTbzjtjZER6cdDfx0aem43ZNLvD9S3wV52mYGAtt6FP4M6lPTCkSpTCGEUuSkbSjr6M9GaPORi7BZe8kXjbTEKuf/ewUBWKdP6HJgqIfcxvqY5mKH6HhtEnVZJEvYUN3ZTRtlix51nf/ITRz+EH1iz3HOAFHx4v7u+t2z8rSM0ooqdV2/HpRAiGek03pXVsvYlSdDqYqdnuDMRIXdsSm5+owpw5jXV7l2q/rDWTkkgO58FlxO+FJeZTlsYwUVVIEQ== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: dd5c06f9-319e-4495-746c-08d871966327 X-MS-Exchange-CrossTenant-AuthSource: DB8PR04MB6795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2020 05:43:19.8594 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Ewryjsx3hx+d8jbOivWfveTfXO6kRmV2XZZ8WAq5UfW4vMg3oAhLXBu3oPFIoYMycXtQWs9lEoW9/IjvBMbaaw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR04MB7333 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The System Controller Firmware (SCFW) is a low-level system function which runs on a dedicated Cortex-M core to provide power, clock, and resource management. It exists on some i.MX8 processors. e.g. i.MX8QM (QM, QP), and i.MX8QX (QXP, DX). SCU driver manages the IPC interface between host CPU and the SCU firmware running on M4. For i.MX8QM, stop mode request is controlled by System Controller Unit(SCU) firmware, this patch introduces FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW quirk for this function. Signed-off-by: Joakim Zhang --- drivers/net/can/flexcan.c | 125 ++++++++++++++++++++++++++++++++------ 1 file changed, 107 insertions(+), 18 deletions(-) diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index e708e7bf28db..a55ea8f27f7c 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -9,6 +9,7 @@ // // Based on code originally by Andrey Volkov +#include #include #include #include @@ -17,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -242,6 +244,8 @@ #define FLEXCAN_QUIRK_SUPPORT_FD BIT(9) /* support memory detection and correction */ #define FLEXCAN_QUIRK_SUPPORT_ECC BIT(10) +/* Setup stop mode with SCU firmware to support wakeup */ +#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW BIT(11) /* Structure of the message buffer */ struct flexcan_mb { @@ -347,6 +351,7 @@ struct flexcan_priv { u8 mb_count; u8 mb_size; u8 clk_src; /* clock source of CAN Protocol Engine */ + u8 can_idx; u64 rx_mask; u64 tx_mask; @@ -358,6 +363,9 @@ struct flexcan_priv { struct regulator *reg_xceiver; struct flexcan_stop_mode stm; + /* IPC handle when setup stop mode by System Controller firmware(scfw) */ + struct imx_sc_ipc *sc_ipc_handle; + /* Read and Write APIs */ u32 (*read)(void __iomem *addr); void (*write)(u32 val, void __iomem *addr); @@ -387,7 +395,7 @@ static const struct flexcan_devtype_data fsl_imx6q_devtype_data = { static const struct flexcan_devtype_data fsl_imx8qm_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | FLEXCAN_QUIRK_BROKEN_PERR_STATE | - FLEXCAN_QUIRK_SUPPORT_FD, + FLEXCAN_QUIRK_SUPPORT_FD | FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW, }; static struct flexcan_devtype_data fsl_imx8mp_devtype_data = { @@ -546,18 +554,46 @@ static void flexcan_enable_wakeup_irq(struct flexcan_priv *priv, bool enable) priv->write(reg_mcr, ®s->mcr); } +static int flexcan_stop_mode_enable_scfw(struct flexcan_priv *priv, bool enabled) +{ + u8 idx = priv->can_idx; + u32 rsrc_id, val; + + if (idx == 0) + rsrc_id = IMX_SC_R_CAN_0; + else if (idx == 1) + rsrc_id = IMX_SC_R_CAN_1; + else + rsrc_id = IMX_SC_R_CAN_2; + + if (enabled) + val = 1; + else + val = 0; + + /* stop mode request via scu firmware */ + return imx_sc_misc_set_control(priv->sc_ipc_handle, rsrc_id, IMX_SC_C_IPG_STOP, val); +} + static inline int flexcan_enter_stop_mode(struct flexcan_priv *priv) { struct flexcan_regs __iomem *regs = priv->regs; u32 reg_mcr; + int ret; reg_mcr = priv->read(®s->mcr); reg_mcr |= FLEXCAN_MCR_SLF_WAK; priv->write(reg_mcr, ®s->mcr); /* enable stop request */ - regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, - 1 << priv->stm.req_bit, 1 << priv->stm.req_bit); + if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) { + ret = flexcan_stop_mode_enable_scfw(priv, true); + if (ret < 0) + return ret; + } else { + regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, + 1 << priv->stm.req_bit, 1 << priv->stm.req_bit); + } return flexcan_low_power_enter_ack(priv); } @@ -566,10 +602,17 @@ static inline int flexcan_exit_stop_mode(struct flexcan_priv *priv) { struct flexcan_regs __iomem *regs = priv->regs; u32 reg_mcr; + int ret; /* remove stop request */ - regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, - 1 << priv->stm.req_bit, 0); + if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) { + ret = flexcan_stop_mode_enable_scfw(priv, false); + if (ret < 0) + return ret; + } else { + regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, + 1 << priv->stm.req_bit, 0); + } reg_mcr = priv->read(®s->mcr); reg_mcr &= ~FLEXCAN_MCR_SLF_WAK; @@ -1838,7 +1881,7 @@ static void unregister_flexcandev(struct net_device *dev) unregister_candev(dev); } -static int flexcan_setup_stop_mode(struct platform_device *pdev) +static int flexcan_setup_stop_mode_gpr(struct platform_device *pdev) { struct net_device *dev = platform_get_drvdata(pdev); struct device_node *np = pdev->dev.of_node; @@ -1883,11 +1926,6 @@ static int flexcan_setup_stop_mode(struct platform_device *pdev) "gpr %s req_gpr=0x02%x req_bit=%u\n", gpr_np->full_name, priv->stm.req_gpr, priv->stm.req_bit); - device_set_wakeup_capable(&pdev->dev, true); - - if (of_property_read_bool(np, "wakeup-source")) - device_set_wakeup_enable(&pdev->dev, true); - return 0; out_put_node: @@ -1895,6 +1933,56 @@ static int flexcan_setup_stop_mode(struct platform_device *pdev) return ret; } +static int flexcan_setup_stop_mode_scfw(struct platform_device *pdev) +{ + struct net_device *dev = platform_get_drvdata(pdev); + struct flexcan_priv *priv; + int ret; + + priv = netdev_priv(dev); + + /* this function could be defer probe, return -EPROBE_DEFER */ + ret = imx_scu_get_handle(&priv->sc_ipc_handle); + if (ret < 0) + dev_dbg(&pdev->dev, "get ipc handle used by SCU failed\n"); + + return ret; +} + +/* flexcan_setup_stop_mode - Setup stop mode + * + * Return: 0 setup stop mode successfully or doesn't support this feature + * -EPROBE_DEFER defer probe + * < 0 fail to setup stop mode + */ +static int flexcan_setup_stop_mode(struct platform_device *pdev) +{ + struct net_device *dev = platform_get_drvdata(pdev); + struct flexcan_priv *priv; + int ret; + + priv = netdev_priv(dev); + + if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) + ret = flexcan_setup_stop_mode_scfw(pdev); + else if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) + ret = flexcan_setup_stop_mode_gpr(pdev); + else + /* return 0 directly if stop mode is unsupport */ + return 0; + + if (ret) { + dev_warn(&pdev->dev, "failed to setup stop mode\n"); + } else { + device_set_wakeup_capable(&pdev->dev, true); + + if (of_property_read_bool(pdev->dev.of_node, "wakeup-source")) + device_set_wakeup_enable(&pdev->dev, true); + } + + return ret; +} + static const struct of_device_id flexcan_of_match[] = { { .compatible = "fsl,imx8qm-flexcan", .data = &fsl_imx8qm_devtype_data, }, { .compatible = "fsl,imx8mp-flexcan", .data = &fsl_imx8mp_devtype_data, }, @@ -1927,7 +2015,7 @@ static int flexcan_probe(struct platform_device *pdev) struct clk *clk_ipg = NULL, *clk_per = NULL; struct flexcan_regs __iomem *regs; int err, irq; - u8 clk_src = 1; + u8 clk_src = 1, can_idx = 0; u32 clock_freq = 0; reg_xceiver = devm_regulator_get_optional(&pdev->dev, "xceiver"); @@ -1943,6 +2031,8 @@ static int flexcan_probe(struct platform_device *pdev) "clock-frequency", &clock_freq); of_property_read_u8(pdev->dev.of_node, "fsl,clk-source", &clk_src); + of_property_read_u8(pdev->dev.of_node, + "fsl,can-index", &can_idx); } if (!clock_freq) { @@ -2019,6 +2109,7 @@ static int flexcan_probe(struct platform_device *pdev) priv->clk_src = clk_src; priv->devtype_data = devtype_data; priv->reg_xceiver = reg_xceiver; + priv->can_idx = can_idx; if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SUPPORT_FD) { priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD | @@ -2030,6 +2121,10 @@ static int flexcan_probe(struct platform_device *pdev) priv->can.bittiming_const = &flexcan_bittiming_const; } + err = flexcan_setup_stop_mode(pdev); + if (err == -EPROBE_DEFER) + return -EPROBE_DEFER; + pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); @@ -2043,12 +2138,6 @@ static int flexcan_probe(struct platform_device *pdev) of_can_transceiver(dev); devm_can_led_init(dev); - if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) { - err = flexcan_setup_stop_mode(pdev); - if (err) - dev_dbg(&pdev->dev, "failed to setup stop-mode\n"); - } - return 0; failed_register: From patchwork Fri Oct 16 13:43:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11840899 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.9 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 231C7C433DF for ; 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dkim=none (message not signed) header.d=none;pengutronix.de; dmarc=none action=none header.from=nxp.com; Received: from DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) by DBAPR04MB7333.eurprd04.prod.outlook.com (2603:10a6:10:1b2::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3455.21; Fri, 16 Oct 2020 05:43:25 +0000 Received: from DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc]) by DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc%9]) with mapi id 15.20.3477.021; Fri, 16 Oct 2020 05:43:24 +0000 From: Joakim Zhang To: mkl@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, peng.fan@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/6] can: flexcan: fix ECC function on LS1021A/LX2160A Date: Fri, 16 Oct 2020 21:43:20 +0800 Message-Id: <20201016134320.20321-7-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201016134320.20321-1-qiangqing.zhang@nxp.com> References: <20201016134320.20321-1-qiangqing.zhang@nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) To DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: EguAOlHjoxgedeTEUPygzYalZvoDlANpeTbLMZ9pxOBHGnv3lRnRblyJSBFz0MG9YbG69qM1pzJJA+1iCa2ll1Gcq5P+VNomEoDWL4gX9f/WWKUO2ESCoKVYD0veruFyJW9ipaNByEE9erIAoK4r6CaHU+bCXHhSVLwrRrN6HFmM7Sge2jbTcVNvxeoh70LJt6uavop+oBi00eaDQEEFBV9bFIxxnR9whZ7hV3lI1EK5WolsiOw664UKkw7bLfwcLIUNvL8dKs2ejziLbDQFcpQRgSQ6LJPj6C9cQyjWtJwz2rY86v6xeDpadFxx3ewIRKVHELv/dgHMRqEosZ3/sWroGNboCAVf2xIwez2K82poTvUV+dfBoVggyUVRM3Rs8gXf80xUkLvF+PAwseMXs3p9f6Enq0fLSPxduLXP3oW5oBDZrCzkCaHnRw2VCVzshzAtlFULNg9RE9LYPD+sV5GSikegiM1+Mat/IfXQQAPmm+xth4NFSyANy0J3IE/8ND/ODvgg++dFinqoIpvgefWMjK6ljxjyBQM8WjuYliQWNDS8oCHxM0+fC4ZxKH4MDEpPVkKDOoUo6zFUbLbcMPSqSRETkxUrYR21+haBSA1Fj8wOL0ZUA10ZZk+TfJoaAeiSYpPjeSEQA0fu00CUVA== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e08a2a8e-e6b4-4bfe-67dd-08d8719665a8 X-MS-Exchange-CrossTenant-AuthSource: DB8PR04MB6795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2020 05:43:24.0012 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fpxDGS+D20yn9xz9S3C/koyVrz22IXObl+7gZJN5WKPfZXtaq4iziGq0D9/VE8f3J1fGORv8tomoxGzfd6PGqA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR04MB7333 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org After double check with Layerscape CAN owner (Pankaj Bansal), confirm that LS1021A doesn't support ECC, and LX2160A indeed supports ECC. For SoCs with ECC supported, even use FLEXCAN_QUIRK_DISABLE_MECR quirk to disable non-correctable errors interrupt and freeze mode, had better use FLEXCAN_QUIRK_SUPPORT_ECC quirk to initialize all memory. Signed-off-by: Joakim Zhang --- drivers/net/can/flexcan.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index a55ea8f27f7c..7b0eb608fc9d 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -219,7 +219,7 @@ * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes * VF610 FlexCAN3 ? no yes no yes yes? no * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no - * LX2160A FlexCAN3 03.00.23.00 no yes no no yes yes + * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes * * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. */ @@ -408,19 +408,19 @@ static struct flexcan_devtype_data fsl_imx8mp_devtype_data = { static const struct flexcan_devtype_data fsl_vf610_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | - FLEXCAN_QUIRK_BROKEN_PERR_STATE, + FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SUPPORT_ECC, }; static const struct flexcan_devtype_data fsl_ls1021a_r2_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | - FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE | - FLEXCAN_QUIRK_USE_OFF_TIMESTAMP, + FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP, }; static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE | - FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | FLEXCAN_QUIRK_SUPPORT_FD, + FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | FLEXCAN_QUIRK_SUPPORT_FD | + FLEXCAN_QUIRK_SUPPORT_ECC, }; static const struct can_bittiming_const flexcan_bittiming_const = {