From patchwork Mon Oct 19 21:10:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 11845265 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D936216BC for ; Mon, 19 Oct 2020 21:09:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A828A22314 for ; Mon, 19 Oct 2020 21:09:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Bf2IlLjt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732545AbgJSVJi (ORCPT ); Mon, 19 Oct 2020 17:09:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732508AbgJSVJi (ORCPT ); Mon, 19 Oct 2020 17:09:38 -0400 Received: from mail-pj1-x1043.google.com (mail-pj1-x1043.google.com [IPv6:2607:f8b0:4864:20::1043]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E869C0613CE; Mon, 19 Oct 2020 14:09:38 -0700 (PDT) Received: by mail-pj1-x1043.google.com with SMTP id b6so456558pju.1; Mon, 19 Oct 2020 14:09:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SE1E80KDOW1ueHqssI1/+p3sucJTyxDENWiwQHPE6Hk=; b=Bf2IlLjtw3jkiYaPlKL/KUIpTKDxqtoTrYyZePoq1NwV2Jv8ND2x+DK8gKtNifN6Sq AIpXK3ZYy4uGkxclxh1RVEFiCL+jPHQUCx6MQCXELxPPp/jT/NwAl1hw27GAGZti1rwZ 4RWD8ImJo23JzcJ9QY/4QIKNR6B8oeAx12eV15vY9kX6V7t5Rvk6ykF37xO0+fhy5iJ2 aofZza45YBVHGfTmT16ttDAE9Vs8Jd/GRdEC5qIG0BofZ9aSAdiUu64SfRaxU/l8zRmV 20+0NurvIFRod4EZldG8vRUOCdeVFw/csMiZQFGrgBne9vtV/qF0tsTWWgRus8K7mGCS sjcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SE1E80KDOW1ueHqssI1/+p3sucJTyxDENWiwQHPE6Hk=; b=rVQ2LEitxYsqo2O4Djhp3cuAa5CiPiWzEClNvJHFwAG9qmTXEgO3h5ntAt4OCP99Xi yj71O9UKfhf9X4qZ95NB+bInDqDHMMKDZ2aTsbkVN4G4Zl345yK62R9JAuGF+9wF3dsQ la2NnlzNaqeHXEtjlKsVMqPca2ZUiEpFlM8hnbf6wa4ygXRLnGbWOFO2XblEjvdkyzZ9 twwIC4hgZd8W2Wn8T1e/iAewNY25LxdVMq2LpAlnqVGP0zu4uvQaOhiuSOtGfyZk+GmY 6qsdURb7srQkXEtCr5pcAkeOTgSlZ35bEJxB897SYpOB0Z24xhJoQC2njaAqMEgrbEm4 reyA== X-Gm-Message-State: AOAM533iYFFOVrgaVE+znWSQIxYKuu3cMIvhllNL0mJ6yLGtDKj+LbBf bN74ZCH0iLaE9qdF35a1Dwc= X-Google-Smtp-Source: ABdhPJxdphKEP7nCIqYVZV6d8xdLvP4zsruaGGmZkQeFeVDq0NSqATnDdZD1fail7lPhgRAvr64ZXg== X-Received: by 2002:a17:902:7606:b029:d3:d2dd:2b3b with SMTP id k6-20020a1709027606b02900d3d2dd2b3bmr1743316pll.67.1603141777912; Mon, 19 Oct 2020 14:09:37 -0700 (PDT) Received: from localhost (c-73-25-156-94.hsd1.or.comcast.net. [73.25.156.94]) by smtp.gmail.com with ESMTPSA id 198sm687463pfx.26.2020.10.19.14.09.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 14:09:37 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, Rob Clark , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Jordan Crouse , Bjorn Andersson , Eric Anholt , Sam Ravnborg , Emil Velikov , "Gustavo A. R. Silva" , AngeloGioacchino Del Regno , Jonathan Marek , Sharat Masetty , Akhil P Oommen , freedreno@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/3] drm/msm/gpu: Convert retire/recover work to kthread_worker Date: Mon, 19 Oct 2020 14:10:51 -0700 Message-Id: <20201019211101.143327-2-robdclark@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201019211101.143327-1-robdclark@gmail.com> References: <20201019211101.143327-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +-- drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 6 ++--- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 4 +-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 +-- drivers/gpu/drm/msm/msm_gpu.c | 30 +++++++++++++++-------- drivers/gpu/drm/msm/msm_gpu.h | 13 +++++++--- 6 files changed, 34 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 2befaf304f04..b0005ccd81c6 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1056,7 +1056,6 @@ static void a5xx_gpmu_err_irq(struct msm_gpu *gpu) static void a5xx_fault_detect_irq(struct msm_gpu *gpu) { struct drm_device *dev = gpu->dev; - struct msm_drm_private *priv = dev->dev_private; struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu); DRM_DEV_ERROR(dev->dev, "gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n", @@ -1072,7 +1071,7 @@ static void a5xx_fault_detect_irq(struct msm_gpu *gpu) /* Turn off the hangcheck timer to keep it from bothering us */ del_timer(&gpu->hangcheck_timer); - queue_work(priv->wq, &gpu->recover_work); + kthread_queue_work(gpu->worker, &gpu->recover_work); } #define RBBM_ERROR_MASK \ diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c index 183de1139eeb..42eaef7ad7c7 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c @@ -78,13 +78,12 @@ static void a5xx_preempt_timer(struct timer_list *t) struct a5xx_gpu *a5xx_gpu = from_timer(a5xx_gpu, t, preempt_timer); struct msm_gpu *gpu = &a5xx_gpu->base.base; struct drm_device *dev = gpu->dev; - struct msm_drm_private *priv = dev->dev_private; if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_FAULTED)) return; DRM_DEV_ERROR(dev->dev, "%s: preemption timed out\n", gpu->name); - queue_work(priv->wq, &gpu->recover_work); + kthread_queue_work(gpu->worker, &gpu->recover_work); } /* Try to trigger a preemption switch */ @@ -162,7 +161,6 @@ void a5xx_preempt_irq(struct msm_gpu *gpu) struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); struct drm_device *dev = gpu->dev; - struct msm_drm_private *priv = dev->dev_private; if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_PENDING)) return; @@ -181,7 +179,7 @@ void a5xx_preempt_irq(struct msm_gpu *gpu) set_preempt_state(a5xx_gpu, PREEMPT_FAULTED); DRM_DEV_ERROR(dev->dev, "%s: Preemption failed to complete\n", gpu->name); - queue_work(priv->wq, &gpu->recover_work); + kthread_queue_work(gpu->worker, &gpu->recover_work); return; } diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 491fee410daf..e6703ae98760 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -19,8 +19,6 @@ static void a6xx_gmu_fault(struct a6xx_gmu *gmu) struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; struct msm_gpu *gpu = &adreno_gpu->base; - struct drm_device *dev = gpu->dev; - struct msm_drm_private *priv = dev->dev_private; /* FIXME: add a banner here */ gmu->hung = true; @@ -29,7 +27,7 @@ static void a6xx_gmu_fault(struct a6xx_gmu *gmu) del_timer(&gpu->hangcheck_timer); /* Queue the GPU handler because we need to treat this as a recovery */ - queue_work(priv->wq, &gpu->recover_work); + kthread_queue_work(gpu->worker, &gpu->recover_work); } static irqreturn_t a6xx_gmu_irq(int irq, void *data) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 5dddb9163bd3..2f236aadfa9c 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -965,8 +965,6 @@ static void a6xx_fault_detect_irq(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); - struct drm_device *dev = gpu->dev; - struct msm_drm_private *priv = dev->dev_private; struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu); /* @@ -989,7 +987,7 @@ static void a6xx_fault_detect_irq(struct msm_gpu *gpu) /* Turn off the hangcheck timer to keep it from bothering us */ del_timer(&gpu->hangcheck_timer); - queue_work(priv->wq, &gpu->recover_work); + kthread_queue_work(gpu->worker, &gpu->recover_work); } static irqreturn_t a6xx_irq(struct msm_gpu *gpu) diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 30ba3beaad0a..7f4a9466e424 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -448,7 +448,7 @@ find_submit(struct msm_ringbuffer *ring, uint32_t fence) static void retire_submits(struct msm_gpu *gpu); -static void recover_worker(struct work_struct *work) +static void recover_worker(struct kthread_work *work) { struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work); struct drm_device *dev = gpu->dev; @@ -560,7 +560,6 @@ static void hangcheck_handler(struct timer_list *t) { struct msm_gpu *gpu = from_timer(gpu, t, hangcheck_timer); struct drm_device *dev = gpu->dev; - struct msm_drm_private *priv = dev->dev_private; struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu); uint32_t fence = ring->memptrs->fence; @@ -577,7 +576,7 @@ static void hangcheck_handler(struct timer_list *t) DRM_DEV_ERROR(dev->dev, "%s: submitted fence: %u\n", gpu->name, ring->seqno); - queue_work(priv->wq, &gpu->recover_work); + kthread_queue_work(gpu->worker, &gpu->recover_work); } /* if still more pending work, reset the hangcheck timer: */ @@ -585,7 +584,7 @@ static void hangcheck_handler(struct timer_list *t) hangcheck_timer_reset(gpu); /* workaround for missing irq: */ - queue_work(priv->wq, &gpu->retire_work); + kthread_queue_work(gpu->worker, &gpu->retire_work); } /* @@ -760,7 +759,7 @@ static void retire_submits(struct msm_gpu *gpu) } } -static void retire_worker(struct work_struct *work) +static void retire_worker(struct kthread_work *work) { struct msm_gpu *gpu = container_of(work, struct msm_gpu, retire_work); int i; @@ -774,8 +773,7 @@ static void retire_worker(struct work_struct *work) /* call from irq handler to schedule work to retire bo's */ void msm_gpu_retire(struct msm_gpu *gpu) { - struct msm_drm_private *priv = gpu->dev->dev_private; - queue_work(priv->wq, &gpu->retire_work); + kthread_queue_work(gpu->worker, &gpu->retire_work); update_sw_cntrs(gpu); } @@ -901,10 +899,18 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, gpu->funcs = funcs; gpu->name = name; - INIT_LIST_HEAD(&gpu->active_list); - INIT_WORK(&gpu->retire_work, retire_worker); - INIT_WORK(&gpu->recover_work, recover_worker); + gpu->worker = kthread_create_worker(0, "%s-worker", gpu->name); + if (IS_ERR(gpu->worker)) { + ret = PTR_ERR(gpu->worker); + gpu->worker = NULL; + goto fail; + } + sched_set_fifo_low(gpu->worker->task); + + INIT_LIST_HEAD(&gpu->active_list); + kthread_init_work(&gpu->retire_work, retire_worker); + kthread_init_work(&gpu->recover_work, recover_worker); timer_setup(&gpu->hangcheck_timer, hangcheck_handler, 0); @@ -1037,4 +1043,8 @@ void msm_gpu_cleanup(struct msm_gpu *gpu) gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu); msm_gem_address_space_put(gpu->aspace); } + + if (gpu->worker) { + kthread_destroy_worker(gpu->worker); + } } diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 1806e87600c0..09938ae114ec 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -106,9 +106,6 @@ struct msm_gpu { /* number of GPU hangs (for all contexts) */ int global_faults; - /* worker for handling active-list retiring: */ - struct work_struct retire_work; - void __iomem *mmio; int irq; @@ -137,7 +134,15 @@ struct msm_gpu { #define DRM_MSM_HANGCHECK_PERIOD 500 /* in ms */ #define DRM_MSM_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_MSM_HANGCHECK_PERIOD) struct timer_list hangcheck_timer; - struct work_struct recover_work; + + /* work for handling GPU recovery: */ + struct kthread_work recover_work; + + /* work for handling active-list retiring: */ + struct kthread_work retire_work; + + /* worker for retire/recover: */ + struct kthread_worker *worker; struct drm_gem_object *memptrs_bo; From patchwork Mon Oct 19 21:10:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 11845267 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DD38017CA for ; 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[73.25.156.94]) by smtp.gmail.com with ESMTPSA id d194sm639737pfd.172.2020.10.19.14.09.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 14:09:43 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, Rob Clark , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Kalyan Thota , Jordan Crouse , Eric Anholt , Tanmay Shah , Drew Davenport , Jeykumar Sankaran , Rajendra Nayak , tongtiangen , Qinglang Miao , Thomas Zimmermann , Emil Velikov , Sam Ravnborg , AngeloGioacchino Del Regno , Wambui Karuga , Roy Spliet , Joerg Roedel , freedreno@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/3] drm/msm/kms: Update msm_kms_init/destroy Date: Mon, 19 Oct 2020 14:10:52 -0700 Message-Id: <20201019211101.143327-3-robdclark@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201019211101.143327-1-robdclark@gmail.com> References: <20201019211101.143327-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Add msm_kms_destroy() and add err return from msm_kms_init(). Prep work for next patch. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 +++++++- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 8 +++++++- drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 11 ++++++++--- drivers/gpu/drm/msm/disp/mdp_kms.h | 9 +++++++-- drivers/gpu/drm/msm/msm_kms.h | 8 +++++++- 5 files changed, 36 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index d93c44f6996d..b77d1a9ace2b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -718,6 +718,8 @@ static void dpu_kms_destroy(struct msm_kms *kms) dpu_kms = to_dpu_kms(kms); _dpu_kms_hw_destroy(dpu_kms); + + msm_kms_destroy(&dpu_kms->base); } static void _dpu_kms_set_encoder_mode(struct msm_kms *kms, @@ -1108,7 +1110,11 @@ static int dpu_bind(struct device *dev, struct device *master, void *data) platform_set_drvdata(pdev, dpu_kms); - msm_kms_init(&dpu_kms->base, &kms_funcs); + ret = msm_kms_init(&dpu_kms->base, &kms_funcs); + if (ret) { + DPU_ERROR("failed to init kms, ret=%d\n", ret); + goto err; + } dpu_kms->dev = ddev; dpu_kms->pdev = pdev; diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c index dbf8d429223e..3d729270bde1 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c @@ -175,6 +175,8 @@ static void mdp4_destroy(struct msm_kms *kms) if (mdp4_kms->rpm_enabled) pm_runtime_disable(dev); + mdp_kms_destroy(&mdp4_kms->base); + kfree(mdp4_kms); } @@ -427,7 +429,11 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) goto fail; } - mdp_kms_init(&mdp4_kms->base, &kms_funcs); + ret = mdp_kms_init(&mdp4_kms->base, &kms_funcs); + if (ret) { + DRM_DEV_ERROR(dev->dev, "failed to init kms\n"); + goto fail; + } kms = &mdp4_kms->base.base; diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c index e193865ce9a2..b3eecf869477 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c @@ -232,6 +232,8 @@ static void mdp5_kms_destroy(struct msm_kms *kms) aspace->mmu->funcs->detach(aspace->mmu); msm_gem_address_space_put(aspace); } + + mdp_kms_destroy(&mdp5_kms->base); } #ifdef CONFIG_DEBUG_FS @@ -592,11 +594,14 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev) return NULL; mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); - - mdp_kms_init(&mdp5_kms->base, &kms_funcs); - pdev = mdp5_kms->pdev; + ret = mdp_kms_init(&mdp5_kms->base, &kms_funcs); + if (ret) { + DRM_DEV_ERROR(&pdev->dev, "failed to init kms\n"); + goto fail; + } + irq = irq_of_parse_and_map(pdev->dev.of_node, 0); if (irq < 0) { ret = irq; diff --git a/drivers/gpu/drm/msm/disp/mdp_kms.h b/drivers/gpu/drm/msm/disp/mdp_kms.h index 1535c5618491..b0286d5d5130 100644 --- a/drivers/gpu/drm/msm/disp/mdp_kms.h +++ b/drivers/gpu/drm/msm/disp/mdp_kms.h @@ -36,12 +36,17 @@ struct mdp_kms { }; #define to_mdp_kms(x) container_of(x, struct mdp_kms, base) -static inline void mdp_kms_init(struct mdp_kms *mdp_kms, +static inline int mdp_kms_init(struct mdp_kms *mdp_kms, const struct mdp_kms_funcs *funcs) { mdp_kms->funcs = funcs; INIT_LIST_HEAD(&mdp_kms->irq_list); - msm_kms_init(&mdp_kms->base, &funcs->base); + return msm_kms_init(&mdp_kms->base, &funcs->base); +} + +static inline void mdp_kms_destroy(struct mdp_kms *mdp_kms) +{ + msm_kms_destroy(&mdp_kms->base); } /* diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 1cbef6b200b7..0be9e6487556 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -160,7 +160,7 @@ struct msm_kms { struct msm_pending_timer pending_timers[MAX_CRTCS]; }; -static inline void msm_kms_init(struct msm_kms *kms, +static inline int msm_kms_init(struct msm_kms *kms, const struct msm_kms_funcs *funcs) { unsigned i; @@ -170,6 +170,12 @@ static inline void msm_kms_init(struct msm_kms *kms, for (i = 0; i < ARRAY_SIZE(kms->pending_timers); i++) msm_atomic_init_pending_timer(&kms->pending_timers[i], kms, i); + + return 0; +} + +static inline void msm_kms_destroy(struct msm_kms *kms) +{ } struct msm_kms *mdp4_kms_init(struct drm_device *dev); From patchwork Mon Oct 19 21:10:53 2020 Content-Type: text/plain; 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[73.25.156.94]) by smtp.gmail.com with ESMTPSA id z73sm669447pfc.75.2020.10.19.14.09.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2020 14:09:45 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, Rob Clark , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , freedreno@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 3/3] drm/msm/atomic: Convert to per-CRTC kthread_work Date: Mon, 19 Oct 2020 14:10:53 -0700 Message-Id: <20201019211101.143327-4-robdclark@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201019211101.143327-1-robdclark@gmail.com> References: <20201019211101.143327-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Use a SCHED_FIFO kthread_worker for async atomic commits. We have a hard deadline if we don't want to miss a frame. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_atomic.c | 25 ++++++++++++++++++++----- drivers/gpu/drm/msm/msm_drv.h | 3 ++- drivers/gpu/drm/msm/msm_kms.h | 17 +++++++++++++---- 3 files changed, 35 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c index 561bfa48841c..484438f1e028 100644 --- a/drivers/gpu/drm/msm/msm_atomic.c +++ b/drivers/gpu/drm/msm/msm_atomic.c @@ -103,14 +103,13 @@ static enum hrtimer_restart msm_atomic_pending_timer(struct hrtimer *t) { struct msm_pending_timer *timer = container_of(t, struct msm_pending_timer, timer); - struct msm_drm_private *priv = timer->kms->dev->dev_private; - queue_work(priv->wq, &timer->work); + kthread_queue_work(timer->worker, &timer->work); return HRTIMER_NORESTART; } -static void msm_atomic_pending_work(struct work_struct *work) +static void msm_atomic_pending_work(struct kthread_work *work) { struct msm_pending_timer *timer = container_of(work, struct msm_pending_timer, work); @@ -118,14 +117,30 @@ static void msm_atomic_pending_work(struct work_struct *work) msm_atomic_async_commit(timer->kms, timer->crtc_idx); } -void msm_atomic_init_pending_timer(struct msm_pending_timer *timer, +int msm_atomic_init_pending_timer(struct msm_pending_timer *timer, struct msm_kms *kms, int crtc_idx) { timer->kms = kms; timer->crtc_idx = crtc_idx; hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); timer->timer.function = msm_atomic_pending_timer; - INIT_WORK(&timer->work, msm_atomic_pending_work); + + timer->worker = kthread_create_worker(0, "atomic-worker-%d", crtc_idx); + if (IS_ERR(timer->worker)) { + int ret = PTR_ERR(timer->worker); + timer->worker = NULL; + return ret; + } + sched_set_fifo(timer->worker->task); + kthread_init_work(&timer->work, msm_atomic_pending_work); + + return 0; +} + +void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer) +{ + if (timer->worker) + kthread_destroy_worker(timer->worker); } static bool can_do_async(struct drm_atomic_state *state, diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 5308e636a90c..f869ed67b5da 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -235,8 +235,9 @@ struct msm_pending_timer; int msm_atomic_prepare_fb(struct drm_plane *plane, struct drm_plane_state *new_state); -void msm_atomic_init_pending_timer(struct msm_pending_timer *timer, +int msm_atomic_init_pending_timer(struct msm_pending_timer *timer, struct msm_kms *kms, int crtc_idx); +void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer); void msm_atomic_commit_tail(struct drm_atomic_state *state); struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev); void msm_atomic_state_clear(struct drm_atomic_state *state); diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 0be9e6487556..26321c13f950 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -136,7 +136,8 @@ struct msm_kms; */ struct msm_pending_timer { struct hrtimer timer; - struct work_struct work; + struct kthread_work work; + struct kthread_worker *worker; struct msm_kms *kms; unsigned crtc_idx; }; @@ -163,19 +164,27 @@ struct msm_kms { static inline int msm_kms_init(struct msm_kms *kms, const struct msm_kms_funcs *funcs) { - unsigned i; + unsigned i, ret; mutex_init(&kms->commit_lock); kms->funcs = funcs; - for (i = 0; i < ARRAY_SIZE(kms->pending_timers); i++) - msm_atomic_init_pending_timer(&kms->pending_timers[i], kms, i); + for (i = 0; i < ARRAY_SIZE(kms->pending_timers); i++) { + ret = msm_atomic_init_pending_timer(&kms->pending_timers[i], kms, i); + if (ret) { + return ret; + } + } return 0; } static inline void msm_kms_destroy(struct msm_kms *kms) { + unsigned i; + + for (i = 0; i < ARRAY_SIZE(kms->pending_timers); i++) + msm_atomic_destroy_pending_timer(&kms->pending_timers[i]); } struct msm_kms *mdp4_kms_init(struct drm_device *dev);