From patchwork Wed Oct 21 14:24:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Lee, Shawn C" X-Patchwork-Id: 11849219 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40682C388F9 for ; Wed, 21 Oct 2020 14:22:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC4902224E for ; Wed, 21 Oct 2020 14:22:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BC4902224E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 203576EDAA; Wed, 21 Oct 2020 14:22:08 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 77B766EDAA for ; Wed, 21 Oct 2020 14:22:06 +0000 (UTC) IronPort-SDR: WVWSIq0KSsWC6NaQ+c44Yt04eQj+48vzS9ShQkY486G1jn+41IN3HAWRd78yy8sbMQDfpX4ir6 tbs4o5X6nWKg== X-IronPort-AV: E=McAfee;i="6000,8403,9780"; a="166596940" X-IronPort-AV: E=Sophos;i="5.77,401,1596524400"; d="scan'208";a="166596940" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2020 07:22:06 -0700 IronPort-SDR: aBeh6YHtdZFmUYNqmlK5m4X/Nq7HU3GTM6mHQykvsMRs92yvMrz4/ZQd4/3hrerNgEzma33dnF z/DMkJW+LUlQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,401,1596524400"; d="scan'208";a="523907977" Received: from shawnle1-build-machine.itwn.intel.com ([10.5.253.9]) by fmsmga005.fm.intel.com with ESMTP; 21 Oct 2020 07:22:04 -0700 From: Lee Shawn C To: intel-gfx@lists.freedesktop.org Date: Wed, 21 Oct 2020 22:24:50 +0800 Message-Id: <20201021142450.7758-1-shawn.c.lee@intel.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: wait PSR state back to idle when turn PSR off X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cooper Chiou Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Driver should refer to commit 'b2fc2252ce41 ("drm/i915/psr: Always wait for idle state when disabling PSR")' to wait for idle state when turn PSR off. But it did not follow previous method. Driver just call intel_psr_exit() in intel_psr_invalidate() and psr_force_hw_tracking_exit(). Then leave the function right away. After PSR disabled, we found some user space applications would enabled PSR again immediately. That caused particular TCON to get into incorrect state machine and can't recognize video data from source properly. Add this change to wait PSR idle state in intel_psr_invalidate() and psr_force_hw_tracking_exit(). This symptom is not able to replicate anymore. Fixes: b2fc2252ce41 (drm/i915/psr: Always wait for idle state when disabling PSR). Cc: Manasi Navare Cc: Jani Nikula Cc: Ville Syrjala Cc: José Roberto de Souza Cc: Cooper Chiou Cc: Khaled Almahallawy Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_psr.c | 43 ++++++++++++++---------- 1 file changed, 26 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index a591a475f148..83b642a5567e 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1036,6 +1036,25 @@ void intel_psr_enable(struct intel_dp *intel_dp, mutex_unlock(&dev_priv->psr.lock); } +static void intel_psr_wait_idle(struct drm_i915_private *dev_priv) +{ + i915_reg_t psr_status; + u32 psr_status_mask; + + if (dev_priv->psr.psr2_enabled) { + psr_status = EDP_PSR2_STATUS(dev_priv->psr.transcoder); + psr_status_mask = EDP_PSR2_STATUS_STATE_MASK; + } else { + psr_status = EDP_PSR_STATUS(dev_priv->psr.transcoder); + psr_status_mask = EDP_PSR_STATUS_STATE_MASK; + } + + /* Wait till PSR is idle */ + if (intel_de_wait_for_clear(dev_priv, psr_status, + psr_status_mask, 2000)) + drm_err(&dev_priv->drm, "Timed out waiting PSR idle state\n"); +} + static void intel_psr_exit(struct drm_i915_private *dev_priv) { u32 val; @@ -1076,8 +1095,6 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv) static void intel_psr_disable_locked(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - i915_reg_t psr_status; - u32 psr_status_mask; lockdep_assert_held(&dev_priv->psr.lock); @@ -1088,19 +1105,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) dev_priv->psr.psr2_enabled ? "2" : "1"); intel_psr_exit(dev_priv); - - if (dev_priv->psr.psr2_enabled) { - psr_status = EDP_PSR2_STATUS(dev_priv->psr.transcoder); - psr_status_mask = EDP_PSR2_STATUS_STATE_MASK; - } else { - psr_status = EDP_PSR_STATUS(dev_priv->psr.transcoder); - psr_status_mask = EDP_PSR_STATUS_STATE_MASK; - } - - /* Wait till PSR is idle */ - if (intel_de_wait_for_clear(dev_priv, psr_status, - psr_status_mask, 2000)) - drm_err(&dev_priv->drm, "Timed out waiting PSR idle state\n"); + intel_psr_wait_idle(dev_priv); /* WA 1408330847 */ if (dev_priv->psr.psr2_sel_fetch_enabled && @@ -1158,12 +1163,14 @@ static void psr_force_hw_tracking_exit(struct drm_i915_private *dev_priv) * pipe. */ intel_de_write(dev_priv, CURSURFLIVE(dev_priv->psr.pipe), 0); - else + else { /* * A write to CURSURFLIVE do not cause HW tracking to exit PSR * on older gens so doing the manual exit instead. */ intel_psr_exit(dev_priv); + intel_psr_wait_idle(dev_priv); + } } void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, @@ -1593,8 +1600,10 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv, frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(dev_priv->psr.pipe); dev_priv->psr.busy_frontbuffer_bits |= frontbuffer_bits; - if (frontbuffer_bits) + if (frontbuffer_bits) { intel_psr_exit(dev_priv); + intel_psr_wait_idle(dev_priv); + } mutex_unlock(&dev_priv->psr.lock); }