From patchwork Wed Oct 31 15:20:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philippe Schenker X-Patchwork-Id: 10662843 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB07417DB for ; Wed, 31 Oct 2018 15:21:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9518E2B0F5 for ; Wed, 31 Oct 2018 15:21:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9305E2B116; Wed, 31 Oct 2018 15:21:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DCFF02B109 for ; Wed, 31 Oct 2018 15:21:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Reply-To:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Mime-Version:Date:To:From: Subject:Message-ID:Cc:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=6mNSxb4InPTRf3bp9zCctKDNGjTTEhfN4FdjVcYcLCs=; b=CgF37u4YYFG73t IbmQ+wMqmgQkeVY86F8BF6/6x598ImBOD8NJOnw3u6fVk7m9ElTOEd9DTKBTljdpmjUZrKTTQkHRC lqrjIlBBm3qLY5mnFVeBogQAkwrCUjoAMN/Ld/14ZoX6uMJ9Ojwo8zOjEJ59m3G4g56Z2Pw3oEzld m/AYTlWDoh1A+iSaY9l8kMhOgLgXZgbnsPcjdowWhTaOdgWkhKKa1iO26FRTTyYsDZRVoWDRXId0I Iig5roNjInMgPOmxMPatYXSkbANIqQBmjSd8iXDV6/syG4iTL38Yq4C0OvOxBzEBw5ynSmFqRFx7E 7btymuxCQPj+tCT39Auw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gHsIm-0005vF-Jg; Wed, 31 Oct 2018 15:21:00 +0000 Received: from mxout013.mail.hostpoint.ch ([2a00:d70:0:e::313]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gHsIj-0005uC-FA for linux-arm-kernel@lists.infradead.org; Wed, 31 Oct 2018 15:20:59 +0000 Received: from [10.0.2.46] (helo=asmtp013.mail.hostpoint.ch) by mxout013.mail.hostpoint.ch with esmtp (Exim 4.91 (FreeBSD)) (envelope-from ) id 1gHsIT-000BZg-Di; Wed, 31 Oct 2018 16:20:41 +0100 Received: from [46.140.72.82] (helo=philippe-pc.toradex.int) by asmtp013.mail.hostpoint.ch with esmtpsa (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256) (Exim 4.91 (FreeBSD)) (envelope-from ) id 1gHsIT-000K1O-9N; Wed, 31 Oct 2018 16:20:41 +0100 X-Authenticated-Sender-Id: dev@pschenker.ch Message-ID: Subject: [RFC] ARM: dts: imx: assign static phandles From: Philippe Schenker To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Date: Wed, 31 Oct 2018 16:20:40 +0100 User-Agent: Evolution 3.30.2 Mime-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181031_082057_507340_C6CC0A85 X-CRM114-Status: UNSURE ( 9.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: dev@pschenker.ch Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Hello, For the Colibri iMX6, Toradex is providing different methods on explicit connectors vs. rather universal pin headers to connect the touch controller to our carrier boards. Currently we are providing fdt_fixups to alter the devicetree in U-Boot to select the right pins. The problem we have with this approach is, that the phandles are dynamically assigned to the dtb. My question is, if it would be a feasible solution for mainline to assign those (vs. all) phandles statically. I put an example below. This example should just provide an idea what I mean, it is not working code. Regards, Philippe Signed-off-by: Philippe Schenker --- arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 34 ++++++++++++++++++++ arch/arm/boot/dts/imx6dl.dtsi | 2 ++ 2 files changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts index d08e0402793b..355709cd28aa 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -172,12 +172,46 @@ compatible = "st,m41t0"; reg = <0x68>; }; + + /* Atmel maxtouch controller */ + atmel_mxt_ts: atmel_mxt_ts@4a { + compatible = "atmel,maxtouch"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mxt_ts>; + reg = <0x4a>; + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + status = "okay"; + }; }; &ipu1_di0_disp0 { remote-endpoint = <&lcd_display_in>; }; +&iomuxc { + + gpio { + pinctrl_pcap_1: pcap-1 { + fsl,pins = < + /* SODIMM 28, 30 */ + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x130b0 + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x130b0 + >; + phandle = <0xffff0000>; + }; + + pinctrl_mxt_ts: mxt-ts { + fsl,pins = < + /* SODIMM 106, 107 */ + MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 + >; + phandle = <0xffff0001>; + }; + }; +}; + &pwm1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index f0607eb41df4..984714b1ca2f 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -132,6 +132,7 @@ <&iomuxc 22 123 3>, <&iomuxc 25 121 1>, <&iomuxc 26 127 1>, <&iomuxc 27 126 1>, <&iomuxc 28 128 1>, <&iomuxc 29 130 1>, <&iomuxc 30 129 1>, <&iomuxc 31 122 1>; + phandle = <0xffff0002>; }; &gpio2 { @@ -140,6 +141,7 @@ <&iomuxc 20 70 1>, <&iomuxc 21 69 1>, <&iomuxc 22 68 1>, <&iomuxc 23 79 2>, <&iomuxc 25 118 2>, <&iomuxc 27 117 1>, <&iomuxc 28 113 4>; + phandle = <0xffff0003>; }; &gpio3 {