From patchwork Thu Oct 22 22:26:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 736BCC388F9 for ; Thu, 22 Oct 2020 22:25:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0385524631 for ; Thu, 22 Oct 2020 22:25:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0385524631 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C53EE6E40B; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6B9836E40B for ; Thu, 22 Oct 2020 22:25:43 +0000 (UTC) IronPort-SDR: QOUfUHOL00r1PjX2ClrIxvQpEdkvvOhEy2BUDNGthFL+UdDrXdiFiDS6A8bhqAaMf9APjTlZwc h4O+TGp32Twg== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386813" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386813" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: x7y2U9vZ2mn8ClcyywoAQDLMcXEsaEeBAcWyNaHl3mCdSY8+9RasqpNpLTxod7bFhFgF6F+Dho Kn7XW+X3BOzQ== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153945" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:26:59 -0700 Message-Id: <20201022222709.29386-2-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 01/11] drm/i915: Add REG_FIELD_PREP to VRR register def X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VRR_CTL register onloy had a GENMASK but no field prep define for TRANS_VRR_CTL_LINE_COUNT field so add that Cc: Aditya Swarup Signed-off-by: Manasi Navare Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/i915_reg.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d4952c9875fb..9792c931b4c5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4348,6 +4348,7 @@ enum { #define VRR_CTL_IGN_MAX_SHIFT REG_BIT(30) #define VRR_CTL_FLIP_LINE_EN REG_BIT(29) #define VRR_CTL_LINE_COUNT_MASK REG_GENMASK(10, 3) +#define VRR_CTL_LINE_COUNT(x) REG_FIELD_PREP(VRR_CTL_LINE_COUNT_MASK, (x)) #define VRR_CTL_SW_FULLLINE_COUNT REG_BIT(0) #define _TRANS_VRR_VMAX_A 0x60424 From patchwork Thu Oct 22 22:27:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E37D1C388F7 for ; Thu, 22 Oct 2020 22:25:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D40424631 for ; Thu, 22 Oct 2020 22:25:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6D40424631 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A7DEC6E409; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id E58FE6E409 for ; Thu, 22 Oct 2020 22:25:43 +0000 (UTC) IronPort-SDR: NotAH2a3WeZOUWk285khY5PFkQzud2YzIivEa3IxjRN5NUhxYZhyXlVVm6TIzetAJrL9e4AoVl S7qG5k1Ibtxw== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386814" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386814" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: QpSTxVZhK/X+ygSJNxBX7Kq/5O/q1CJz/l2rl2oE3v85LcJT7+3E9l2+HX297p4ZnJ+08hezvH xX/IMp8Nwn7Q== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153947" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:00 -0700 Message-Id: <20201022222709.29386-3-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/11] drm/i915/display/vrr: Create VRR file and add VRR capability check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We create a new file for all VRR related helpers. Also add a function to check vrr capability based on platform support, DPCD bits and EDID monitor range. Cc: Ville Syrjälä Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_vrr.c | 28 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 19 ++++++++++++++++ 3 files changed, 48 insertions(+) create mode 100644 drivers/gpu/drm/i915/display/intel_vrr.c create mode 100644 drivers/gpu/drm/i915/display/intel_vrr.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index e5574e506a5c..3beeaf517191 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -249,6 +249,7 @@ i915-y += \ display/intel_sdvo.o \ display/intel_tv.o \ display/intel_vdsc.o \ + display/intel_vrr.o \ display/vlv_dsi.o \ display/vlv_dsi_pll.o diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c new file mode 100644 index 000000000000..0c8a91fabb64 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2020 Intel Corporation + * + * Author: Manasi Navare + */ + +#include "i915_drv.h" +#include "intel_display_types.h" +#include "intel_vrr.h" + +bool intel_is_vrr_capable(struct drm_connector *connector) +{ + struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector)); + const struct drm_display_info *info = &connector->display_info; + struct drm_i915_private *dev_priv = to_i915(connector->dev); + + /* + * DP Sink is capable of Variable refresh video timings if + * Ignore MSA bit is set in DPCD. + * EDID monitor range also should be atleast 10 for reasonable + * Adaptive sync/ VRR end user experience. + */ + return INTEL_GEN(dev_priv) >= 12 && + drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) && + info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10; +} + diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h new file mode 100644 index 000000000000..755746c7525c --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2019 Intel Corporation +*/ + +#ifndef __INTEL_VRR_H__ +#define __INTEL_VRR_H__ + +#include + +struct drm_connector; +struct drm_i915_private; +struct intel_crtc_state; +struct intel_encoder; +struct intel_dp; + +bool intel_is_vrr_capable(struct drm_connector *connector); + +#endif /* __INTEL_VRR_H__ */ From patchwork Thu Oct 22 22:27:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31AAAC388F7 for ; Thu, 22 Oct 2020 22:26:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CCCD824631 for ; Thu, 22 Oct 2020 22:26:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CCCD824631 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 436AF6E41B; Thu, 22 Oct 2020 22:26:02 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0CF766E40B for ; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) IronPort-SDR: 6gZhP+ZXpefpyXUT64lMw0OgPcKpz2HcDbFfRqIbbtkbYr6x7+xdK/rHDYAwaTU1s/1TUKRVW3 T+E8CjgD9wUA== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386815" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386815" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: X/5OxsHH18IE6KV12n2ffzuOU81uUdoogTOD37v9cuGHTteVvVFyuPboOiI0eGLaTNGj0qaFGq vflIFksjVuAA== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153952" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:02 -0700 Message-Id: <20201022222709.29386-5-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 04/11] drm/i915/display/dp: Add VRR crtc state variables X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Introduce VRR struct in intel_crtc_state and add VRR crtc state variables Enable, Vtotalmin and Vtotalmax to be derived from mode timings and VRR crtc property. Cc: Ville Syrjälä Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index f6f0626649e0..f6f7ec024da7 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1092,6 +1092,13 @@ struct intel_crtc_state { struct intel_dsb *dsb; u32 psr2_man_track_ctl; + + /* Variable Refresh Rate state */ + struct { + bool enable; + u16 vtotalmin; + u16 vtotalmax; + } vrr; }; enum intel_pipe_crc_source { From patchwork Thu Oct 22 22:27:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9F15C5517A for ; Thu, 22 Oct 2020 22:25:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4366524650 for ; Thu, 22 Oct 2020 22:25:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4366524650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7505B6E417; Thu, 22 Oct 2020 22:25:51 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 519956E40D for ; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) IronPort-SDR: eK+aRModhBPXr7twNoa/iykJUDIpHCRhsAenPLE0h/JlO1yW/iP1UB9hALjuohdCSDKEtHwJNs nATzUzPCemwA== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386816" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386816" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: /laZn5CM2VmKiQ0ix8jLIm3z5SwmNFCOtMjKnJMPZmJQr/PJ2wSS41j9+Z8zdNvuUqQtVUj/GI G+VScALfbF4w== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153956" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:03 -0700 Message-Id: <20201022222709.29386-6-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 05/11] drm/i915/display/dp: Compute VRR state in atomic_check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This forces a complete modeset if vrr drm crtc state goes from enabled to disabled and vice versa. This patch also computes vrr state variables from the mode timings and based on the vrr property set by userspace as well as hardware's vrr capability. v2: *Rebase v3: * Vmin = max (vtotal, vmin) (Manasi) v4: * set crtc_state->vrr.enable = 0 for disable request Cc: Ville Syrjälä Cc: Jani Nikula Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display.c | 7 +++- drivers/gpu/drm/i915/display/intel_dp.c | 1 + drivers/gpu/drm/i915/display/intel_vrr.c | 38 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ 4 files changed, 47 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index f41b6f8b5618..f70cc3b2a1a4 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -14213,6 +14213,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(mst_master_transcoder); + PIPE_CONF_CHECK_BOOL(vrr.enable); + PIPE_CONF_CHECK_I(vrr.vtotalmin); + PIPE_CONF_CHECK_I(vrr.vtotalmax); + #undef PIPE_CONF_CHECK_X #undef PIPE_CONF_CHECK_I #undef PIPE_CONF_CHECK_BOOL @@ -15202,7 +15206,8 @@ static int intel_atomic_check(struct drm_device *dev, for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { - if (new_crtc_state->inherited != old_crtc_state->inherited) + if (new_crtc_state->inherited != old_crtc_state->inherited || + new_crtc_state->uapi.vrr_enabled != old_crtc_state->uapi.vrr_enabled) new_crtc_state->uapi.mode_changed = true; } diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3794b8f35edc..3185c4ca523d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2752,6 +2752,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, if (!HAS_DDI(dev_priv)) intel_dp_set_clock(encoder, pipe_config); + intel_vrr_compute_config(intel_dp, pipe_config); intel_psr_compute_config(intel_dp, pipe_config); intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp, constant_n); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 0c8a91fabb64..56114f535f94 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -26,3 +26,41 @@ bool intel_is_vrr_capable(struct drm_connector *connector) info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10; } +void +intel_vrr_compute_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct drm_connector *connector = &intel_connector->base; + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + const struct drm_display_info *info = &connector->display_info; + + if (!intel_is_vrr_capable(connector)) + return; + + if (!crtc_state->uapi.vrr_enabled) { + drm_dbg(&dev_priv->drm, + "VRR disable requested by Userspace\n"); + crtc_state->vrr.enable = false; + return; + } + + crtc_state->vrr.enable = true; + crtc_state->vrr.vtotalmin = + max_t(u16, adjusted_mode->crtc_vtotal, + DIV_ROUND_CLOSEST(adjusted_mode->crtc_clock * 1000, + adjusted_mode->crtc_htotal * + info->monitor_range.max_vfreq)); + crtc_state->vrr.vtotalmax = + max_t(u16, adjusted_mode->crtc_vtotal, + DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000, + adjusted_mode->crtc_htotal * + info->monitor_range.min_vfreq)); + + drm_dbg(&dev_priv->drm, + "VRR Config: Enable = %s Vtotal Min = %d Vtotal Max = %d\n", + yesno(crtc_state->vrr.enable), crtc_state->vrr.vtotalmin, + crtc_state->vrr.vtotalmax); +} + diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 755746c7525c..1e6fe8fe92ec 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -15,5 +15,7 @@ struct intel_encoder; struct intel_dp; bool intel_is_vrr_capable(struct drm_connector *connector); +void intel_vrr_compute_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */ From patchwork Thu Oct 22 22:27:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B22BAC388F7 for ; Thu, 22 Oct 2020 22:25:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5DEB724631 for ; Thu, 22 Oct 2020 22:25:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5DEB724631 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 89A666E41D; Thu, 22 Oct 2020 22:25:58 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2B5A16E409 for ; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) IronPort-SDR: HopGJ3W0pMuXiXr71FPy1afLwOYLVGWMu2SqtaA7s2dOmPtvSsAQkIGU5/788dkvWT+7leVM1b MBtQpxSvJzjQ== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386818" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386818" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: MZHwjrQt+pb8YwZkv3IGkZ4Wl1TbkJ5seqqUE6bnOBiNZ2Mz10dg2/4CwrxiNDsu7y6JZX8WZu OqNeRgApgO7g== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153959" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:04 -0700 Message-Id: <20201022222709.29386-7-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 06/11] drm/i915/display/dp: Do not enable PSR if VRR is enabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Even though our HW supports PSR + VRR, the available panels do not work reliably with PSR and VRR together. So if user requested VRR and is supported by HW enable that and do not enable PSR in that case. Cc: Ville Syrjälä Cc: Gwan-gyeong Mun Cc: Imre Deak Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index a591a475f148..56d3fbfad719 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -811,6 +811,13 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, &crtc_state->hw.adjusted_mode; int psr_setup_time; + /* + * Current PSR panels dont work reliably with VRR enabled + * So if VRR is enabled, do not enable PSR. + */ + if (crtc_state->vrr.enable) + return; + if (!CAN_PSR(dev_priv)) return; From patchwork Thu Oct 22 22:27:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851977 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 830CCC56201 for ; Thu, 22 Oct 2020 22:25:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A40A24650 for ; Thu, 22 Oct 2020 22:25:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1A40A24650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DEA996E40D; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4FD536E409 for ; Thu, 22 Oct 2020 22:25:43 +0000 (UTC) IronPort-SDR: iIqZHs5bwjdw+R7wfHr9W5qs8m1KIN1RLiCDTTtSkbCYsLxoNyC6yRDsNo/E42qt8A7YjQMGTJ hYRY2pC4/wcA== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386820" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386820" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: cCt8x1EUYnMF0FkJallU5z8P/0hcJBScmzNVV0gajI2KQLPFf4TG07pRDd2PCgadHVo2Tu8nvn yFYaSok4cY3A== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153966" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:06 -0700 Message-Id: <20201022222709.29386-9-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 08/11] drm/i915/display/vrr: Send VRR push to flip the frame X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VRR achieves vblank stretching using the HW PUSH functionality. So once the VRR is enabled during modeset then for each flip request from userspace, in the atomic tail pipe_update_end() we need to set the VRR push bit in HW for it to terminate the vblank at configured flipline or anytime after flipline or latest at the Vmax. The HW clears the PUSH bit after the double buffer updates are completed. Cc: Ville Syrjälä Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_sprite.c | 5 +++++ drivers/gpu/drm/i915/display/intel_vrr.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 3 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index b6deeb338477..cb10fe462f06 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -49,6 +49,7 @@ #include "intel_psr.h" #include "intel_dsi.h" #include "intel_sprite.h" +#include "intel_vrr.h" int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, int usecs) @@ -217,6 +218,10 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) icl_dsi_frame_update(new_crtc_state); + /* Send VRR Push to terminate Vblank */ + if (new_crtc_state->vrr.enable) + intel_vrr_send_push(new_crtc_state); + /* We're still in the vblank-evade critical section, this can't race. * Would be slightly nice to just grab the vblank count and arm the * event outside of the critical section - the spinlock might spin for a diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 7f1353bac583..ec1ce88e869c 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -102,3 +102,20 @@ void intel_vrr_enable(struct intel_encoder *encoder, trans_push); } +void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + u32 trans_push; + + trans_push = intel_de_read(dev_priv, TRANS_PUSH(pipe)); + WARN_ON(!(trans_push & TRANS_PUSH_EN)); + + trans_push |= TRANS_PUSH_SEND; + intel_de_write(dev_priv, TRANS_PUSH(pipe), trans_push); + + drm_dbg(&dev_priv->drm, "Sending VRR Push on Pipe (%c)\n", + pipe_name(pipe)); +} + diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 05d982d6fbae..a6b78e1676cb 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -19,5 +19,6 @@ void intel_vrr_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state); void intel_vrr_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); +void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */ From patchwork Thu Oct 22 22:27:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33D81C56201 for ; Thu, 22 Oct 2020 22:25:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D3E0024631 for ; Thu, 22 Oct 2020 22:25:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D3E0024631 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CE2526E418; Thu, 22 Oct 2020 22:25:51 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6EB036E40F for ; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) IronPort-SDR: Gr5+QbdOIYPG18Niqgzp7DfSKWQ/C3z3ybZEBNkPN/Nw7pxDzFDz3f/yz4T09s5E22mNdCj4Y3 KUvhZWS3GiBg== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386821" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386821" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: PrQzwbVUwNNX/+zNLqXchYM7jerc5YaE4zkWYViRbAJKUOndPCIhld6ttRNS0ySsLz2MGyUCBb RPUCpVvoFS5A== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153969" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:07 -0700 Message-Id: <20201022222709.29386-10-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/11] drm/i915/display/vrr: Disable VRR in modeset disable path X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This patch disables the VRR enable and VRR PUSH bits in the HW during commit modeset disable sequence. Thsi disable will happen when the port is disabled or when the userspace sets VRR prop to false and requests to disable VRR. Cc: Ville Syrjälä Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ drivers/gpu/drm/i915/display/intel_vrr.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 3 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 391c51979334..565155af3fb9 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3819,6 +3819,8 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state, intel_disable_pipe(old_crtc_state); + intel_vrr_disable(old_crtc_state); + intel_ddi_disable_transcoder_func(old_crtc_state); intel_dsc_disable(old_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index ec1ce88e869c..5075ecb9b5a7 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -119,3 +119,25 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) pipe_name(pipe)); } +void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + u32 trans_vrr_ctl = 0, trans_push = 0; + + if (!old_crtc_state->vrr.enable) + return; + + trans_vrr_ctl = intel_de_read(dev_priv, TRANS_VRR_CTL(pipe)); + trans_vrr_ctl &= ~(VRR_CTL_FLIP_LINE_EN | VRR_CTL_VRR_ENABLE); + intel_de_write(dev_priv, TRANS_VRR_CTL(pipe), trans_vrr_ctl); + + trans_push = intel_de_read(dev_priv, TRANS_PUSH(pipe)); + trans_push &= ~TRANS_PUSH_EN; + intel_de_write(dev_priv, TRANS_PUSH(pipe), trans_push); + + drm_dbg(&dev_priv->drm, "Disabling VRR on Pipe (%c)\n", + pipe_name(pipe)); +} + diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index a6b78e1676cb..8c6fd2d1bee5 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -20,5 +20,6 @@ void intel_vrr_compute_config(struct intel_dp *intel_dp, void intel_vrr_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); +void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); #endif /* __INTEL_VRR_H__ */ From patchwork Thu Oct 22 22:27:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A15DC388F9 for ; Thu, 22 Oct 2020 22:25:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A6BEC24631 for ; Thu, 22 Oct 2020 22:25:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A6BEC24631 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 26B716E419; Thu, 22 Oct 2020 22:25:58 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8B0A16E40B for ; Thu, 22 Oct 2020 22:25:44 +0000 (UTC) IronPort-SDR: QAsgWNVtY58OnG05e8DCVr6gp4uem/XgpVAIAdPv0a3MBvPeRDrMWLA9b7DMP0qsUBhnm/KQEp r6b6v0PnqElQ== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386822" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386822" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: 2tFFJEBaqdC33r/fZ0Itzsc9BItUiyCmqEDz1+ctFDttMH0Gk+25doHIRHWPc0wvSJI4Gqlcp3 ON+6+zUcZuBw== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153973" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:08 -0700 Message-Id: <20201022222709.29386-11-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 10/11] drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" If VRR is enabled, the sink should ignore MSA parameters and regenerate incoming video stream without depending on these parameters. Hence set the MSA_TIMING_PAR_IGNORE_EN bit if VRR is enabled. Reset this bit on VRR disable. Cc: Ville Syrjälä Cc: Jani Nikula Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_ddi.c | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 565155af3fb9..195449dfec1e 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3322,6 +3322,22 @@ i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder, return DP_TP_STATUS(encoder->port); } +static void intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + bool enable) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + + if (!crtc_state->vrr.enable) + return; + + if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL, + enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0) <= 0) + drm_dbg_kms(&i915->drm, + "Failed to set MSA_TIMING_PAR_IGNORE %s in the sink\n", + enable ? "enable" : "disable"); +} + static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { @@ -3493,6 +3509,12 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, */ intel_dp_sink_set_fec_ready(intel_dp, crtc_state); + /* + * Sink device should ignore MSA parameters and regenerate + * incoming video stream in case of VRR/Adaptive Sync + */ + intel_dp_sink_set_msa_timing_par_ignore_state(intel_dp, crtc_state, true); + /* * 7.i Follow DisplayPort specification training sequence (see notes for * failure handling) @@ -4089,6 +4111,9 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state, /* Disable the decompression in DP Sink */ intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state, false); + /* Disable Ignore_MSA bit in DP Sink */ + intel_dp_sink_set_msa_timing_par_ignore_state(intel_dp, old_crtc_state, + false); } static void intel_disable_ddi_hdmi(struct intel_atomic_state *state, From patchwork Thu Oct 22 22:27:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11851991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E34C4C5517A for ; Thu, 22 Oct 2020 22:25:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 87AE024631 for ; Thu, 22 Oct 2020 22:25:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 87AE024631 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 63CE06E413; Thu, 22 Oct 2020 22:25:45 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id C9F3F6E40B for ; Thu, 22 Oct 2020 22:25:43 +0000 (UTC) IronPort-SDR: THo+NXJHXx2nh01txS6V1tsfiW2wcjVxFcMrYfT8aYqQ0S4QfZxti5Q/I+AqXendQFAHlrGAH0 rVALyQBLUVLg== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="155386825" X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="155386825" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2020 15:25:42 -0700 IronPort-SDR: r/x85D7i3qYK7uI/CBDE0uXOefpgsJtDu4vB20r5a63PbIh0a3SMw38svWWL4WCYyQpz3ePhxb SzjajzNxgIZg== X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="534153976" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2020 15:25:42 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 22 Oct 2020 15:27:09 -0700 Message-Id: <20201022222709.29386-12-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022222709.29386-1-manasi.d.navare@intel.com> References: <20201022222709.29386-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 11/11] drm/i915/display: Add HW state readout for VRR X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This functions gets the VRR config from the VRR registers to match the crtc state variables for VRR. Cc: Jani Nikula Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++++ drivers/gpu/drm/i915/display/intel_vrr.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ 3 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index f70cc3b2a1a4..30904e466cb5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -56,6 +56,7 @@ #include "display/intel_sdvo.h" #include "display/intel_tv.h" #include "display/intel_vdsc.h" +#include "display/intel_vrr.h" #include "gt/intel_rps.h" @@ -11387,6 +11388,9 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, intel_get_transcoder_timings(crtc, pipe_config); } + if (INTEL_GEN(dev_priv) >= 12) + intel_vrr_get_config(crtc, pipe_config); + intel_get_pipe_src_size(crtc, pipe_config); if (IS_HASWELL(dev_priv)) { diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5075ecb9b5a7..aede2c86cc71 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -141,3 +141,20 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) pipe_name(pipe)); } +void intel_vrr_get_config(struct intel_crtc *crtc, + struct intel_crtc_state *pipe_config) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = to_i915(dev); + enum pipe pipe = crtc->pipe; + u32 trans_vrr_ctl; + + trans_vrr_ctl = intel_de_read(dev_priv, TRANS_VRR_CTL(pipe)); + pipe_config->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; + if (!pipe_config->vrr.enable) + return; + + pipe_config->vrr.vtotalmax = intel_de_read(dev_priv, TRANS_VRR_VMAX(pipe)) + 1; + pipe_config->vrr.vtotalmin = intel_de_read(dev_priv, TRANS_VRR_VMIN(pipe)) + 1; +} + diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 8c6fd2d1bee5..dc20359d0821 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -21,5 +21,7 @@ void intel_vrr_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); +void intel_vrr_get_config(struct intel_crtc *crtc, + struct intel_crtc_state *pipe_config); #endif /* __INTEL_VRR_H__ */