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Sat, 24 Oct 2020 08:44:26 -0700 (PDT) Received: from localhost.localdomain ([2a02:a315:5445:5300:e9e3:358e:a790:ce1c]) by smtp.googlemail.com with ESMTPSA id 76sm472536lfn.128.2020.10.24.08.44.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Oct 2020 08:44:25 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Chmiel?= To: kgene@kernel.org, krzk@kernel.org, mturquette@baylibre.com, sboyd@kernel.org Subject: [PATCH] clk: exynos7: Mark aclk_fsys1_200 as critical Date: Sat, 24 Oct 2020 17:43:46 +0200 Message-Id: <20201024154346.9589-1-pawel.mikolaj.chmiel@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201024_114429_926429_0516F5A0 X-CRM114-Status: GOOD ( 13.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, tomasz.figa@gmail.com, linux-kernel@vger.kernel.org, cw00.choi@samsung.com, s.nawrocki@samsung.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?utf-8?q?Pawe=C5=82_Chmiel?= Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This clock must be always enabled to allow access to any registers in fsys1 CMU. Until proper solution based on runtime PM is applied (similar to what was done for Exynos5433), mark that clock as critical so it won't be disabled. It was observed on Samsung Galaxy S6 device (based on Exynos7420), where UFS module is probed before pmic used to power that device. In this case defer probe was happening and that clock was disabled by UFS driver, causing whole boot to hang on next CMU access. Signed-off-by: Paweł Chmiel Acked-by: Krzysztof Kozlowski --- drivers/clk/samsung/clk-exynos7.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c index c1ff715e960c..1048d83f097b 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -538,7 +538,8 @@ static const struct samsung_gate_clock top1_gate_clks[] __initconst = { ENABLE_ACLK_TOP13, 28, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0), GATE(CLK_ACLK_FSYS1_200, "aclk_fsys1_200", "dout_aclk_fsys1_200", - ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT, 0), + ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT | + CLK_IS_CRITICAL, 0), GATE(CLK_SCLK_PHY_FSYS1_26M, "sclk_phy_fsys1_26m", "dout_sclk_phy_fsys1_26m", ENABLE_SCLK_TOP1_FSYS11,