From patchwork Mon Oct 26 18:56:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11858405 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DF7B4697 for ; Mon, 26 Oct 2020 18:58:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C8F6922281 for ; Mon, 26 Oct 2020 18:58:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1783730AbgJZS6H (ORCPT ); Mon, 26 Oct 2020 14:58:07 -0400 Received: from mga03.intel.com ([134.134.136.65]:52492 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404845AbgJZS6H (ORCPT ); Mon, 26 Oct 2020 14:58:07 -0400 IronPort-SDR: 4k0AKJfjE/eIQLjcI9K2Vr9M/eNPyqEdaIrWRRf3y5AyfSHu5bBqPnchkTEpivXyE9TlUW3CIl jGSSqqmX4RiQ== X-IronPort-AV: E=McAfee;i="6000,8403,9786"; a="168073143" X-IronPort-AV: E=Sophos;i="5.77,420,1596524400"; d="scan'208";a="168073143" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2020 11:58:06 -0700 IronPort-SDR: caTCKd572v7xQ6AABclg6jnE5hyqcN1jjoLw+eGO1zgUACsPF1FVBmSxQ48kS/Vy5+k5Mc6cvd gNRDKJNgbycg== X-IronPort-AV: E=Sophos;i="5.77,420,1596524400"; d="scan'208";a="525607448" Received: from dhrubajy-mobl.amr.corp.intel.com (HELO skuppusw-mobl5.amr.corp.intel.com) ([10.254.101.53]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2020 11:58:06 -0700 From: Kuppuswamy Sathyanarayanan To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, knsathya@kernel.org Subject: [PATCH v10 1/5] PCI: Conditionally initialize host bridge native_* members Date: Mon, 26 Oct 2020 11:56:39 -0700 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If CONFIG_PCIEPORTBUS is not enabled in kernel then initialing struct pci_host_bridge PCIe specific native_* members to "1" is incorrect. So protect the PCIe specific member initialization with CONFIG_PCIEPORTBUS. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/probe.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 4289030b0fff..756fa60ca708 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -588,12 +588,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) * may implement its own AER handling and use _OSC to prevent the * OS from interfering. */ +#ifdef CONFIG_PCIEPORTBUS bridge->native_aer = 1; bridge->native_pcie_hotplug = 1; - bridge->native_shpc_hotplug = 1; bridge->native_pme = 1; - bridge->native_ltr = 1; bridge->native_dpc = 1; +#endif + bridge->native_ltr = 1; + bridge->native_shpc_hotplug = 1; device_initialize(&bridge->dev); } From patchwork Mon Oct 26 18:56:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11858421 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 54A0914C0 for ; Mon, 26 Oct 2020 18:58:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3BA9B2085B for ; Mon, 26 Oct 2020 18:58:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1791043AbgJZS6J (ORCPT ); Mon, 26 Oct 2020 14:58:09 -0400 Received: from mga03.intel.com ([134.134.136.65]:52492 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1783396AbgJZS6I (ORCPT ); Mon, 26 Oct 2020 14:58:08 -0400 IronPort-SDR: BvKpMV0FVRPtxdNZZOezWRkbhTmpjocTsIrtIX52fCn2NNaHo+7pzLR2m2IZbGEIq9VzsYwjC6 rD8ycpKh9/gw== X-IronPort-AV: E=McAfee;i="6000,8403,9786"; a="168073145" X-IronPort-AV: E=Sophos;i="5.77,420,1596524400"; d="scan'208";a="168073145" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2020 11:58:07 -0700 IronPort-SDR: HEyWfle+/PC5B620muAIBVubve7lz6Gx3xViKUVg3UzF4/z+e6oreInWmPT1sZoCFg5gp+4bpk luKxcVy+xK7Q== X-IronPort-AV: E=Sophos;i="5.77,420,1596524400"; d="scan'208";a="525607452" Received: from dhrubajy-mobl.amr.corp.intel.com (HELO skuppusw-mobl5.amr.corp.intel.com) ([10.254.101.53]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2020 11:58:06 -0700 From: Kuppuswamy Sathyanarayanan To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, knsathya@kernel.org Subject: [PATCH v10 2/5] ACPI/PCI: Ignore _OSC negotiation result if pcie_ports_native is set. Date: Mon, 26 Oct 2020 11:56:40 -0700 Message-Id: <9a3fcebd55cc6ae2856eee8c4edd52e972adbd0b.1603738449.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org pcie_ports_native is set only if user requests native handling of PCIe capabilities via pcie_port_setup command line option. User input takes precedence over _OSC based control negotiation result. So consider the _OSC negotiated result only if pcie_ports_native is unset. Also, since struct pci_host_bridge ->native_* members caches the ownership status of various PCIe capabilities, use them instead of distributed checks for pcie_ports_native. Signed-off-by: Kuppuswamy Sathyanarayanan Reported-by: kernel test robot --- drivers/acpi/pci_root.c | 33 +++++++++++++++++++++---------- drivers/pci/hotplug/pciehp_core.c | 2 +- drivers/pci/pci-acpi.c | 3 --- drivers/pci/pcie/aer.c | 2 +- drivers/pci/pcie/portdrv_core.c | 9 +++------ include/linux/acpi.h | 2 ++ 6 files changed, 30 insertions(+), 21 deletions(-) diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index c12b5fb3e8fb..da925bef5bcf 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -41,6 +41,10 @@ static int acpi_pci_root_scan_dependent(struct acpi_device *adev) | OSC_PCI_CLOCK_PM_SUPPORT \ | OSC_PCI_MSI_SUPPORT) +#define OSC_OWNER(ctrl, bit, flag) \ + if (!(ctrl & bit)) \ + flag = 0; + static const struct acpi_device_id root_device_ids[] = { {"PNP0A03", 0}, {"", 0}, @@ -887,6 +891,7 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, struct pci_bus *bus; struct pci_host_bridge *host_bridge; union acpi_object *obj; + u32 ctrl; info->root = root; info->bridge = device; @@ -912,18 +917,26 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, goto out_release_info; host_bridge = to_pci_host_bridge(bus->bridge); - if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) - host_bridge->native_pcie_hotplug = 0; + + if (pcie_ports_native) { + decode_osc_control(root, "OS forcibly taking over", + OSC_PCI_EXPRESS_CONTROL_MASKS); + } else { + ctrl = root->osc_control_set; + OSC_OWNER(ctrl, OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, + host_bridge->native_pcie_hotplug); + OSC_OWNER(ctrl, OSC_PCI_EXPRESS_AER_CONTROL, + host_bridge->native_aer); + OSC_OWNER(ctrl, OSC_PCI_EXPRESS_PME_CONTROL, + host_bridge->native_pme); + OSC_OWNER(ctrl, OSC_PCI_EXPRESS_LTR_CONTROL, + host_bridge->native_ltr); + OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, + host_bridge->native_dpc); + } + if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL)) host_bridge->native_shpc_hotplug = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL)) - host_bridge->native_aer = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL)) - host_bridge->native_pme = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) - host_bridge->native_ltr = 0; - if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL)) - host_bridge->native_dpc = 0; /* * Evaluate the "PCI Boot Configuration" _DSM Function. If it diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index ad3393930ecb..d1831e6bf60a 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c @@ -256,7 +256,7 @@ static bool pme_is_native(struct pcie_device *dev) const struct pci_host_bridge *host; host = pci_find_host_bridge(dev->port->bus); - return pcie_ports_native || host->native_pme; + return host->native_pme; } static void pciehp_disable_interrupt(struct pcie_device *dev) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index bf03648c2072..a84f75ec6df8 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -800,9 +800,6 @@ bool pciehp_is_native(struct pci_dev *bridge) if (!(slot_cap & PCI_EXP_SLTCAP_HPC)) return false; - if (pcie_ports_native) - return true; - host = pci_find_host_bridge(bridge->bus); return host->native_pcie_hotplug; } diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 65dff5f3457a..79bb441139c2 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -219,7 +219,7 @@ int pcie_aer_is_native(struct pci_dev *dev) if (!dev->aer_cap) return 0; - return pcie_ports_native || host->native_aer; + return host->native_aer; } int pci_enable_pcie_error_reporting(struct pci_dev *dev) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 50a9522ab07d..ccd5e0ce5605 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -208,8 +208,7 @@ static int get_port_device_capability(struct pci_dev *dev) struct pci_host_bridge *host = pci_find_host_bridge(dev->bus); int services = 0; - if (dev->is_hotplug_bridge && - (pcie_ports_native || host->native_pcie_hotplug)) { + if (dev->is_hotplug_bridge && host->native_pcie_hotplug) { services |= PCIE_PORT_SERVICE_HP; /* @@ -221,8 +220,7 @@ static int get_port_device_capability(struct pci_dev *dev) } #ifdef CONFIG_PCIEAER - if (dev->aer_cap && pci_aer_available() && - (pcie_ports_native || host->native_aer)) { + if (dev->aer_cap && pci_aer_available() && host->native_aer) { services |= PCIE_PORT_SERVICE_AER; /* @@ -238,8 +236,7 @@ static int get_port_device_capability(struct pci_dev *dev) * Event Collectors can also generate PMEs, but we don't handle * those yet. */ - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && - (pcie_ports_native || host->native_pme)) { + if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && host->native_pme) { services |= PCIE_PORT_SERVICE_PME; /* diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 39263c6b52e1..35689f4e8e1f 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -569,6 +569,8 @@ extern bool osc_pc_lpi_support_confirmed; #define OSC_PCI_EXPRESS_LTR_CONTROL 0x00000020 #define OSC_PCI_EXPRESS_DPC_CONTROL 0x00000080 #define OSC_PCI_CONTROL_MASKS 0x000000bf +/* Masks specific to PCIe Capabilities */ +#define OSC_PCI_EXPRESS_CONTROL_MASKS 0x000000bd #define ACPI_GSB_ACCESS_ATTRIB_QUICK 0x00000002 #define ACPI_GSB_ACCESS_ATTRIB_SEND_RCV 0x00000004 From patchwork Mon Oct 26 18:56:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11858417 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C96AD14B2 for ; Mon, 26 Oct 2020 18:58:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B39532168B for ; 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26 Oct 2020 11:58:06 -0700 From: Kuppuswamy Sathyanarayanan To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, knsathya@kernel.org Subject: [PATCH v10 3/5] ACPI/PCI: Ignore _OSC DPC negotiation result if pcie_ports_dpc_native is set. Date: Mon, 26 Oct 2020 11:56:41 -0700 Message-Id: <9aa4dde872ccde6e90d286bf13b8478076ddec40.1603738449.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org pcie_ports_dpc_native is set only if user requests native handling of PCIe DPC capability via pcie_port_setup command line option. User input takes precedence over _OSC based control negotiation result. So consider the _OSC negotiated result for DPC ownership only if pcie_ports_dpc_native is unset. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/acpi/pci_root.c | 8 ++++++-- drivers/pci/pcie/dpc.c | 3 ++- drivers/pci/pcie/portdrv.h | 2 -- drivers/pci/pcie/portdrv_core.c | 2 +- include/linux/pci.h | 2 ++ 5 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index da925bef5bcf..b5230643e50a 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -933,8 +933,12 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, host_bridge->native_ltr); OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, host_bridge->native_dpc); - } - + if (pcie_ports_dpc_native) + dev_warn(&bus->dev, "OS forcibly taking over DPC\n"); + else + OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, + host_bridge->native_dpc); + } if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL)) host_bridge->native_shpc_hotplug = 0; diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index e05aba86a317..21f77420632b 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -283,11 +283,12 @@ void pci_dpc_init(struct pci_dev *pdev) static int dpc_probe(struct pcie_device *dev) { struct pci_dev *pdev = dev->port; + struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus); struct device *device = &dev->device; int status; u16 ctl, cap; - if (!pcie_aer_is_native(pdev) && !pcie_ports_dpc_native) + if (!pcie_aer_is_native(pdev) && !host->native_dpc) return -ENOTSUPP; status = devm_request_threaded_irq(device, dev->irq, dpc_irq, diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h index af7cf237432a..0ac20feef24e 100644 --- a/drivers/pci/pcie/portdrv.h +++ b/drivers/pci/pcie/portdrv.h @@ -25,8 +25,6 @@ #define PCIE_PORT_DEVICE_MAXSERVICES 5 -extern bool pcie_ports_dpc_native; - #ifdef CONFIG_PCIEAER int pcie_aer_init(void); int pcie_aer_is_native(struct pci_dev *dev); diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index ccd5e0ce5605..2c0278f0fdcc 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -253,7 +253,7 @@ static int get_port_device_capability(struct pci_dev *dev) */ if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && pci_aer_available() && - (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER))) + (host->native_dpc || (services & PCIE_PORT_SERVICE_AER))) services |= PCIE_PORT_SERVICE_DPC; if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || diff --git a/include/linux/pci.h b/include/linux/pci.h index 22207a79762c..388121ec88b5 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1559,9 +1559,11 @@ static inline int pci_irqd_intx_xlate(struct irq_domain *d, #ifdef CONFIG_PCIEPORTBUS extern bool pcie_ports_disabled; extern bool pcie_ports_native; +extern bool pcie_ports_dpc_native; #else #define pcie_ports_disabled true #define pcie_ports_native false +#define pcie_ports_dpc_native false #endif #define PCIE_LINK_STATE_L0S BIT(0) From patchwork Mon Oct 26 18:56:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11858419 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C3850697 for ; Mon, 26 Oct 2020 18:58:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AB5942168B for ; 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26 Oct 2020 11:58:07 -0700 From: Kuppuswamy Sathyanarayanan To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, knsathya@kernel.org Subject: [PATCH v10 4/5] PCI/portdrv: Remove redundant pci_aer_available() check in DPC enable logic Date: Mon, 26 Oct 2020 11:56:42 -0700 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org In DPC service enable logic, check for services & PCIE_PORT_SERVICE_AER implies pci_aer_available() is true. So there is no need to explicitly check it again. Also, passing pcie_ports=dpc-native in kernel command line implies DPC needs to be enabled in native mode irrespective of AER ownership status. So checking for pci_aer_available() without checking for pcie_ports status is incorrect. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/pcie/portdrv_core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 2c0278f0fdcc..e257a2ca3595 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -252,7 +252,6 @@ static int get_port_device_capability(struct pci_dev *dev) * permission to use AER. */ if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && - pci_aer_available() && (host->native_dpc || (services & PCIE_PORT_SERVICE_AER))) services |= PCIE_PORT_SERVICE_DPC; From patchwork Mon Oct 26 18:56:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 11858423 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E755C697 for ; Mon, 26 Oct 2020 18:58:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CFB5521D42 for ; Mon, 26 Oct 2020 18:58:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1791075AbgJZS6V (ORCPT ); Mon, 26 Oct 2020 14:58:21 -0400 Received: from mga03.intel.com ([134.134.136.65]:52496 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1791041AbgJZS6J (ORCPT ); Mon, 26 Oct 2020 14:58:09 -0400 IronPort-SDR: ru2kJ1aa+mRV1WY1dAelTvO7s4i17NWbFGGoyLFxNxD34uygZUGv1CGjrCWW7XQGxDJV21S6t0 pvL9EDUVT6vQ== X-IronPort-AV: E=McAfee;i="6000,8403,9786"; a="168073149" X-IronPort-AV: E=Sophos;i="5.77,420,1596524400"; d="scan'208";a="168073149" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2020 11:58:08 -0700 IronPort-SDR: Acbb3fIgz6rL4CWP99tZwAz5kbTGjHDEKAmk1n8eMXwf6YylnYViBQrJC98lFMKh/Bs8jrxbIh SN5Y96ofpr1w== X-IronPort-AV: E=Sophos;i="5.77,420,1596524400"; d="scan'208";a="525607466" Received: from dhrubajy-mobl.amr.corp.intel.com (HELO skuppusw-mobl5.amr.corp.intel.com) ([10.254.101.53]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2020 11:58:07 -0700 From: Kuppuswamy Sathyanarayanan To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, knsathya@kernel.org Subject: [PATCH v10 5/5] PCI/DPC: Move AER/DPC dependency checks out of DPC driver Date: Mon, 26 Oct 2020 11:56:43 -0700 Message-Id: <3cb6923f879b64a80df3670facdee327bcc39a4c.1603738449.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently, AER and DPC Capabilities dependency checks is distributed between DPC and portdrv service drivers. So move them out of DPC driver. Also, since services & PCIE_PORT_SERVICE_AER check already ensures AER native ownership, no need to add additional pcie_aer_is_native() check. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/pci/pcie/dpc.c | 4 ---- drivers/pci/pcie/portdrv_core.c | 1 + 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 21f77420632b..a8b922044447 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -283,14 +283,10 @@ void pci_dpc_init(struct pci_dev *pdev) static int dpc_probe(struct pcie_device *dev) { struct pci_dev *pdev = dev->port; - struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus); struct device *device = &dev->device; int status; u16 ctl, cap; - if (!pcie_aer_is_native(pdev) && !host->native_dpc) - return -ENOTSUPP; - status = devm_request_threaded_irq(device, dev->irq, dpc_irq, dpc_handler, IRQF_SHARED, "pcie-dpc", pdev); diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index e257a2ca3595..ffa1d9fc458e 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -252,6 +252,7 @@ static int get_port_device_capability(struct pci_dev *dev) * permission to use AER. */ if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && + host->native_dpc && (host->native_dpc || (services & PCIE_PORT_SERVICE_AER))) services |= PCIE_PORT_SERVICE_DPC;