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bh=Q1dNcviZOlYQcRioPBAcLZLZ7N1VhUim4S3Bgi1tvv4=; b=pswrb8EX0mrdlGLyDSfyGjM1rN yWpE6NCyAwlLp4yoGGRtH4LkDwWDm1uAeM8nKxRMSQRwcaNv7qtDOn0ryMVLG85qMfBeIIMdH5UKI +elKpfOLFb4MSjxrR1xxisl6f6tgZ+gtDaw80b7FtoePy3cRfz/wEyGc9VKnzZ6JrtlisVL9iFudt yzeUoXRKpugune9ynHYzESTgMpJ73G//L0ZcLRePGZeITRNlc5rhsvZckH8VsO28vgddmpJOEeN3Y GLOWxsVSnQY01Rcg2uwPAL8HpYUjRGcQ8zK7wvN0CoKvSDFcnAaQhIvbzKXNwe9toGNAqQf1JJCXC jsMaHwUA==; Received: from szxga04-in.huawei.com ([45.249.212.190]) by casper.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb12f-0007xP-GM for linux-arm-kernel@lists.infradead.org; Fri, 06 Nov 2020 12:40:37 +0000 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4CSKjJ4qQmzkfbv; Fri, 6 Nov 2020 20:40:04 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Fri, 6 Nov 2020 20:40:01 +0800 From: John Garry To: , , , , , , , , , , Subject: [PATCH RFC v5 13/13] perf vendor events: Add JSON metrics for imx8mm DDR Perf Date: Fri, 6 Nov 2020 20:35:53 +0800 Message-ID: <1604666153-4187-14-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1604666153-4187-1-git-send-email-john.garry@huawei.com> References: <1604666153-4187-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201106_124034_491974_08C9CC70 X-CRM114-Status: GOOD ( 14.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, John Garry , qiangqing.zhang@nxp.com, linuxarm@huawei.com, zhangshaokun@hisilicon.com, linux-imx@nxp.com, kjain@linux.ibm.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Joakim Zhang Add JSON metrics for imx8mm DDR Perf. Signed-off-by: Joakim Zhang Signed-off-by: John Garry --- .../arch/arm64/freescale/imx8mm/sys/ddrc.json | 39 +++++++++++++++++++ .../arm64/freescale/imx8mm/sys/metrics.json | 18 +++++++++ tools/perf/pmu-events/jevents.c | 1 + 3 files changed, 58 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json create mode 100644 tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json new file mode 100644 index 000000000000..3b1cd708f568 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json @@ -0,0 +1,39 @@ +[ + { + "BriefDescription": "ddr cycles event", + "EventCode": "0x00", + "EventName": "imx8mm_ddr.cycles", + "Unit": "imx8_ddr", + "Compat": "i.MX8MM" + }, + { + "BriefDescription": "ddr read-cycles event", + "EventCode": "0x2a", + "EventName": "imx8mm_ddr.read_cycles", + "Unit": "imx8_ddr", + "Compat": "i.MX8MM" + }, + { + "BriefDescription": "ddr write-cycles event", + "EventCode": "0x2b", + "EventName": "imx8mm_ddr.write_cycles", + "Unit": "imx8_ddr", + "Compat": "i.MX8MM" + }, + { + "BriefDescription": "ddr read event", + "EventCode": "0x35", + "EventName": "imx8mm_ddr.read", + "Unit": "imx8_ddr", + "Compat": "i.MX8MM" + }, + { + "BriefDescription": "ddr write event", + "EventCode": "0x38", + "EventName": "imx8mm_ddr.write", + "Unit": "imx8_ddr", + "Compat": "i.MX8MM" + } +] + + diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json new file mode 100644 index 000000000000..8e553b67cae6 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json @@ -0,0 +1,18 @@ +[ + { + "BriefDescription": "bytes all masters read from ddr based on read-cycles event", + "MetricName": "imx8mm_ddr_read.all", + "MetricExpr": "imx8mm_ddr.read_cycles * 4 * 4", + "ScaleUnit": "9.765625e-4KB", + "Unit": "imx8_ddr", + "Compat": "i.MX8MM" + }, + { + "BriefDescription": "bytes all masters write to ddr based on write-cycles event", + "MetricName": "imx8mm_ddr_write.all", + "MetricExpr": "imx8mm_ddr.write_cycles * 4 * 4", + "ScaleUnit": "9.765625e-4KB", + "Unit": "imx8_ddr", + "Compat": "i.MX8MM" + } +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 46e5253b0862..89add92de45c 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -282,6 +282,7 @@ static struct map { { "hisi_sccl,hha", "hisi_sccl,hha" }, { "hisi_sccl,l3c", "hisi_sccl,l3c" }, /* it's not realistic to keep adding these, we need something more scalable ... */ + { "imx8_ddr", "imx8_ddr" }, { "smmuv3_pmcg", "smmuv3_pmcg" }, { "L3PMC", "amd_l3" }, { "DFPMC", "amd_df" },