From patchwork Mon Nov 23 15:39:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 11925631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC50BC2D0E4 for ; Mon, 23 Nov 2020 15:41:06 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 39E0E2080A for ; Mon, 23 Nov 2020 15:41:06 +0000 (UTC) Authentication-Results: mail.kernel.org; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1606146054; bh=Hcdyfk0kYZsv3hI9btjRLhXcU3rfrTM3E8RHn/I8BW8=; h=From:To:Cc:Subject:Date:From; b=Awgx4kyYENeoi1NYuacQXc+hhbiVF1VZs+iiqWoPyJ94EHr3CJZtVF0eMkqpW0Sq6 MZ1Gu2tIiz9bm2IVkekd7Wsu8KjPDhNNU3fJYw9oxWoTLGGHfGrVuceTclBYibHXM/ +UdB5YgHG6XdaM0NRPF8FiLWZFK61SxgIl4kJCIA= From: guoren@kernel.org To: palmerdabbelt@google.com, paul.walmsley@sifive.com, anup@brainfault.org, greentime.hu@sifive.com, zong.li@sifive.com, atish.patra@wdc.com Subject: [PATCH 1/2] riscv: Fixup do_page_fault warning in uprobe_xol Date: Mon, 23 Nov 2020 15:39:39 +0000 Message-Id: <1606145980-5153-1-git-send-email-guoren@kernel.org> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201123_104056_434307_5AD695FA X-CRM114-Status: GOOD ( 13.52 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Guo Ren , Palmer Dabbelt , linux-kernel@vger.kernel.org, Vincent Chen , guoren@kernel.org, linux-riscv@lists.infradead.org MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren [ 670.922295] BUG: sleeping function called from invalid context at kernel/locking/rwsem.c:1491 [ 670.930853] in_atomic(): 0, irqs_disabled(): 1, non_block: 0, pid: 96, name: hello [ 670.938446] CPU: 0 PID: 96 Comm: hello Tainted: G W 5.9.3-00875-gaf1498803464-dirty #31 [ 670.947775] Call Trace: [ 670.950236] [] walk_stackframe+0x0/0xc2 [ 670.955650] [] show_stack+0x46/0x52 [ 670.960716] [] dump_stack+0x90/0xb6 [ 670.965783] [] ___might_sleep+0xf8/0x10c [ 670.971284] [] __might_sleep+0x50/0x7e [ 670.976613] [] down_read+0x32/0xe0 [ 670.981592] [] do_page_fault+0xf0/0x3d8 [ 670.987006] [] ret_from_exception+0x0/0x14 When CONFIG_DEBUG_ATOMIC_SLEEP is enabled: mmap_read_lock()->down_read()->might_sleep->___might_sleep() will check irqs_disabled() is 0 or Not. If irqs disabled, kernel prints the BUG warning. Uprobe need prepare a xol_slot to emulate single-step the instruction for uprobe with irqs-off in user context. So it's the only case for us to meet a irqs-off user context situation. Second: /* Enable interrupts if they were enabled in the parent context. */ if (likely(regs->status & SR_PIE)) local_irq_enable(); It's duplicate with the patch by Vincent commit: c82dd6d078a2 (" riscv: Avoid interrupts being erroneously enabled in handle_exception()") Signed-off-by: Guo Ren Cc: Palmer Dabbelt Cc: Vincent Chen --- arch/riscv/mm/fault.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c index e889e65..a9d1f12 100644 --- a/arch/riscv/mm/fault.c +++ b/arch/riscv/mm/fault.c @@ -55,10 +55,6 @@ asmlinkage void do_page_fault(struct pt_regs *regs) if (unlikely((addr >= VMALLOC_START) && (addr <= VMALLOC_END))) goto vmalloc_fault; - /* Enable interrupts if they were enabled in the parent context. */ - if (likely(regs->status & SR_PIE)) - local_irq_enable(); - /* * If we're in an interrupt, have no user context, or are running * in an atomic region, then we must not take the fault. @@ -71,6 +67,8 @@ asmlinkage void do_page_fault(struct pt_regs *regs) perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); + /* Enable interrupts for user context. */ + local_irq_enable(); retry: mmap_read_lock(mm); vma = find_vma(mm, addr); From patchwork Mon Nov 23 15:39:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 11925633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F7D9C56202 for ; Mon, 23 Nov 2020 15:42:10 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B13C62080A for ; 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Mon, 23 Nov 2020 15:41:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1606146120; bh=OkJ2G8OhwKYgiWV+wVeIHk5f00NcDCpYKGYROpWFFj8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BBzoE8caN1W5rpt/49LeI61b+JMMUEYmqcfkKzb6pQje5cJixZm7fpK7/c5xsYqrB s17eWacNj1VxpG3oYW8dukePKbcubXUXDjZ7a0PNm3u1ywUpMORABnl1EhQC0lFeLN o0lFPm1/He8laSaKCDBp2mkloa37H4isO4U1ZPp0= From: guoren@kernel.org To: palmerdabbelt@google.com, paul.walmsley@sifive.com, anup@brainfault.org, greentime.hu@sifive.com, zong.li@sifive.com, atish.patra@wdc.com Subject: [PATCH 2/2] riscv: Fixup trace_hardirqs_on in entry.S Date: Mon, 23 Nov 2020 15:39:40 +0000 Message-Id: <1606145980-5153-2-git-send-email-guoren@kernel.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1606145980-5153-1-git-send-email-guoren@kernel.org> References: <1606145980-5153-1-git-send-email-guoren@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201123_104201_346813_15EDA3B4 X-CRM114-Status: GOOD ( 12.24 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Guo Ren , Palmer Dabbelt , linux-kernel@vger.kernel.org, Vincent Chen , guoren@kernel.org, linux-riscv@lists.infradead.org MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren Move trace_hardirqs_on to correct place. If SR_PIE isn't set, the trace_hardirqs_on will cause wrong record. Signed-off-by: Guo Ren Cc: Palmer Dabbelt Cc: Vincent Chen --- arch/riscv/kernel/entry.S | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 7a1a6bb..c1b38e2 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -124,17 +124,17 @@ skip_context_tracking: REG_L a1, (a1) jr a1 1: -#ifdef CONFIG_TRACE_IRQFLAGS - call trace_hardirqs_on - - REG_L s1, PT_STATUS(sp) -#endif /* * Exceptions run with interrupts enabled or disabled depending on the * state of SR_PIE in m/sstatus. */ andi t0, s1, SR_PIE beqz t0, 1f +#ifdef CONFIG_TRACE_IRQFLAGS + call trace_hardirqs_on + + REG_L s1, PT_STATUS(sp) +#endif csrs CSR_STATUS, SR_IE 1: