From patchwork Fri Nov 27 10:49:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11935515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D526C63777 for ; Fri, 27 Nov 2020 10:50:06 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E84CE20657 for ; Fri, 27 Nov 2020 10:50:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="TnkjuorT" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E84CE20657 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=mpXXeCu1lPDur95V4FyDOzwB3L29KOXytDdsq2Fgl+k=; b=TnkjuorTIPsCMJHEBQBjClD1h D8YGhMMNrFvYQarHyYRsTTB838yQzpBstYHEasfEJmYcDLSBIQJJEjTJGX8j2W6bxmELZc6Xp+EOE dzv8lw22o8RCoiI31ImbjBP2Ce8Cor406VVW/8vt8UWZV9zW+GWwUn5PJtoonDVtQtfJuj2w6rzx8 K2TjwDkJlzRYIFJRfHwgTIKqsjkzhMCOc5GXPlYTutCUg/hGuvemTXpJZjyjb7RljJg48ev/PFCAc 7NqYUJZPwX6F0LtSIzw1e9ue85fx2lEHMUUSf2Kmi6EMSUs/arEz7ZjLD25G152YJ5mzCV3k60vIw H5f3x2zNQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kibKA-0003Af-9l; Fri, 27 Nov 2020 10:49:58 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kibJr-00035M-QR; Fri, 27 Nov 2020 10:49:40 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id B5DBE1F461A2 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Subject: [PATCH 1/3] arm64: dts: mt8183: Add dsi node Date: Fri, 27 Nov 2020 11:49:28 +0100 Message-Id: <20201127104930.1981497-2-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201127104930.1981497-1-enric.balletbo@collabora.com> References: <20201127104930.1981497-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201127_054939_951796_0BC47DD2 X-CRM114-Status: GOOD ( 10.44 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jitao Shi , Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Collabora Kernel ML , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Jitao Shi Add dsi and mipitx nodes to the MT8183. Signed-off-by: Jitao Shi Signed-off-by: Enric Balletbo i Serra --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 31 ++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 7839480df075..da7212e21fdf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -892,10 +892,27 @@ mmc1: mmc@11240000 { status = "disabled"; }; + mipi_tx0: mipi-dphy@11e50000 { + compatible = "mediatek,mt8183-mipi-tx"; + reg = <0 0x11e50000 0 0x1000>; + clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>; + clock-names = "ref_clk"; + #clock-cells = <0>; + #phy-cells = <0>; + clock-output-names = "mipi_tx0_pll"; + nvmem-cells = <&mipi_tx_calibration>; + nvmem-cell-names = "calibration-data"; + }; + efuse: efuse@11f10000 { compatible = "mediatek,mt8183-efuse", "mediatek,efuse"; reg = <0 0x11f10000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + mipi_tx_calibration: calib@190 { + reg = <0x190 0xc>; + }; }; u3phy: usb-phy@11f40000 { @@ -937,6 +954,20 @@ mmsys: syscon@14000000 { #clock-cells = <1>; }; + dsi0: dsi@14014000 { + compatible = "mediatek,mt8183-dsi"; + reg = <0 0x14014000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + mediatek,syscon-dsi = <&mmsys 0x140>; + clocks = <&mmsys CLK_MM_DSI0_MM>, + <&mmsys CLK_MM_DSI0_IF>, + <&mipi_tx0>; + clock-names = "engine", "digital", "hs"; + phys = <&mipi_tx0>; + phy-names = "dphy"; + }; + smi_common: smi@14019000 { compatible = "mediatek,mt8183-smi-common", "syscon"; reg = <0 0x14019000 0 0x1000>; From patchwork Fri Nov 27 10:49:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11935517 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3131C2D0E4 for ; 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bh=qUwPhzfZ9Yufj8mZPG6fNEmokNDRSwxjV3oJc3VP14I=; b=jTXduH5dCOyzu9JC1NIa0pEuw fsWb+4VMofsl/paN9v6I/TUH0PgfiuOXLoHtZH7G9CH1fuYgnkTWhWFe1pfo6urpfDJcaL7k6wDff XA96L8GfEMo7iBzJc8SD34xfEx3BPGdU7lLrCB1Eu0XiZtMpeUdd+2gO4YpVyRUiD65y+G/LtmHjJ Y/TsF2fAY36yaL6c04YDQBUSkcvs+SbhcAp82dAdW9/Kyq0+Ww4pH+OPid4xPFWtMRnXDTxpnUCgx xbH0zhkrMkOR/6hvSYGutN2VRHIb27HyCmaaeYYXmZBGUjoYnvEvytinUA8jNzxm2X2eNSPJ1qDz4 MANBaHjFA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kibKB-0003Ay-Bx; Fri, 27 Nov 2020 10:49:59 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kibJs-00035Y-1C; Fri, 27 Nov 2020 10:49:40 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id D05161F461A4 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: mt8183: Add iommu and larb nodes Date: Fri, 27 Nov 2020 11:49:29 +0100 Message-Id: <20201127104930.1981497-3-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201127104930.1981497-1-enric.balletbo@collabora.com> References: <20201127104930.1981497-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201127_054940_230722_19D9763D X-CRM114-Status: GOOD ( 11.13 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Collabora Kernel ML , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add iommu and larb nodes to the MT8183. Signed-off-by: Enric Balletbo i Serra --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 79 ++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index da7212e21fdf..ba9ff192cda3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -521,6 +522,15 @@ systimer: timer@10017000 { clock-names = "clk13m"; }; + iommu: iommu@10205000 { + compatible = "mediatek,mt8183-m4u"; + reg = <0 0x10205000 0 0x1000>; + interrupts = ; + mediatek,larbs = <&larb0 &larb1 &larb2 &larb3 + &larb4 &larb5 &larb6>; + #iommu-cells = <1>; + }; + gce: mailbox@10238000 { compatible = "mediatek,mt8183-gce"; reg = <0 0x10238000 0 0x4000>; @@ -968,6 +978,16 @@ dsi0: dsi@14014000 { phy-names = "dphy"; }; + larb0: larb@14017000 { + compatible = "mediatek,mt8183-smi-larb"; + reg = <0 0x14017000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_SMI_LARB0>, + <&mmsys CLK_MM_SMI_LARB0>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clock-names = "apb", "smi"; + }; + smi_common: smi@14019000 { compatible = "mediatek,mt8183-smi-common", "syscon"; reg = <0 0x14019000 0 0x1000>; @@ -984,18 +1004,57 @@ imgsys: syscon@15020000 { #clock-cells = <1>; }; + larb5: larb@15021000 { + compatible = "mediatek,mt8183-smi-larb"; + reg = <0 0x15021000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&imgsys CLK_IMG_LARB5>, <&imgsys CLK_IMG_LARB5>, + <&mmsys CLK_MM_GALS_IMG2MM>; + clock-names = "apb", "smi", "gals"; + power-domains = <&spm MT8183_POWER_DOMAIN_ISP>; + }; + + larb2: larb@1502f000 { + compatible = "mediatek,mt8183-smi-larb"; + reg = <0 0x1502f000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&imgsys CLK_IMG_LARB2>, <&imgsys CLK_IMG_LARB2>, + <&mmsys CLK_MM_GALS_IPU2MM>; + clock-names = "apb", "smi", "gals"; + power-domains = <&spm MT8183_POWER_DOMAIN_ISP>; + }; + vdecsys: syscon@16000000 { compatible = "mediatek,mt8183-vdecsys", "syscon"; reg = <0 0x16000000 0 0x1000>; #clock-cells = <1>; }; + larb1: larb@16010000 { + compatible = "mediatek,mt8183-smi-larb"; + reg = <0 0x16010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vdecsys CLK_VDEC_VDEC>, <&vdecsys CLK_VDEC_LARB1>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8183_POWER_DOMAIN_VDEC>; + }; + vencsys: syscon@17000000 { compatible = "mediatek,mt8183-vencsys", "syscon"; reg = <0 0x17000000 0 0x1000>; #clock-cells = <1>; }; + larb4: larb@17010000 { + compatible = "mediatek,mt8183-smi-larb"; + reg = <0 0x17010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vencsys CLK_VENC_LARB>, + <&vencsys CLK_VENC_LARB>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8183_POWER_DOMAIN_VENC>; + }; + ipu_conn: syscon@19000000 { compatible = "mediatek,mt8183-ipu_conn", "syscon"; reg = <0 0x19000000 0 0x1000>; @@ -1025,5 +1084,25 @@ camsys: syscon@1a000000 { reg = <0 0x1a000000 0 0x1000>; #clock-cells = <1>; }; + + larb6: larb@1a001000 { + compatible = "mediatek,mt8183-smi-larb"; + reg = <0 0x1a001000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&camsys CLK_CAM_LARB6>, <&camsys CLK_CAM_LARB6>, + <&mmsys CLK_MM_GALS_CAM2MM>; + clock-names = "apb", "smi", "gals"; + power-domains = <&spm MT8183_POWER_DOMAIN_CAM>; + }; + + larb3: larb@1a002000 { + compatible = "mediatek,mt8183-smi-larb"; + reg = <0 0x1a002000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&camsys CLK_CAM_LARB3>, <&camsys CLK_CAM_LARB3>, + <&mmsys CLK_MM_GALS_IPU12MM>; + clock-names = "apb", "smi", "gals"; + power-domains = <&spm MT8183_POWER_DOMAIN_CAM>; + }; }; }; From patchwork Fri Nov 27 10:49:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11935519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0713C63777 for ; Fri, 27 Nov 2020 10:50:11 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6067E205F4 for ; Fri, 27 Nov 2020 10:50:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="oenpzCTs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6067E205F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8y/ABeKV3AnK5xGUo0cm2faU9XQiauAFgbz7HlCHJ4c=; b=oenpzCTsDQ2BkBhv+ciMprSs8 UoGNGX4pQOqzWBr5JyKOM+c5boy1+Y2xUC3ubQseEoWKRPX/UOgDqpcw5GUSxB00LUEV414RxHGCb c7wm6Z9pgAg1SjFfDEvQSiTY4dvN4/skf4rYj/mDlXjkaNlAg23u5p83nEPJyzL15bHZJskoSJ9uY 2TjCH2TW3zooOCYmC2OlcgKXsOT6ZmaDPv+TsuXPzm33aCBALNnKukANGvYaXc3FB73hcTv1glsLe L6TiMqe/S2GJKeQRWbvIcRVdUcnjjYYYPl8b0PSfWj83ojIZJEN8ETf3Wxz52RJluSiCDuoOkETpo Veh3J0Q/w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kibKJ-0003EK-Np; Fri, 27 Nov 2020 10:50:07 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kibJt-000361-85; Fri, 27 Nov 2020 10:49:42 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 7D5391F461A6 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: mt8183: Add display nodes for MT8183 Date: Fri, 27 Nov 2020 11:49:30 +0100 Message-Id: <20201127104930.1981497-4-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201127104930.1981497-1-enric.balletbo@collabora.com> References: <20201127104930.1981497-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201127_054941_530823_F69F04BC X-CRM114-Status: GOOD ( 11.23 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Collabora Kernel ML , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add display subsystem device nodes to allow video output. Signed-off-by: Enric Balletbo i Serra --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 114 +++++++++++++++++++++++ 1 file changed, 114 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index ba9ff192cda3..34d83f517b07 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -33,6 +34,11 @@ aliases { i2c9 = &i2c9; i2c10 = &i2c10; i2c11 = &i2c11; + ovl0 = &ovl0; + ovl-2l0 = &ovl_2l0; + ovl-2l1 = &ovl_2l1; + rdma0 = &rdma0; + rdma1 = &rdma1; }; cpus { @@ -964,6 +970,107 @@ mmsys: syscon@14000000 { #clock-cells = <1>; }; + ovl0: ovl@14008000 { + compatible = "mediatek,mt8183-disp-ovl"; + reg = <0 0x14008000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_OVL0>; + iommus = <&iommu M4U_PORT_DISP_OVL0>; + mediatek,larb = <&larb0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>; + }; + + ovl_2l0: ovl@14009000 { + compatible = "mediatek,mt8183-disp-ovl-2l"; + reg = <0 0x14009000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; + iommus = <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>; + mediatek,larb = <&larb0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>; + }; + + ovl_2l1: ovl@1400a000 { + compatible = "mediatek,mt8183-disp-ovl-2l"; + reg = <0 0x1400a000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_OVL1_2L>; + iommus = <&iommu M4U_PORT_DISP_2L_OVL1_LARB0>; + mediatek,larb = <&larb0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>; + }; + + rdma0: rdma@1400b000 { + compatible = "mediatek,mt8183-disp-rdma"; + reg = <0 0x1400b000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_RDMA0>; + iommus = <&iommu M4U_PORT_DISP_RDMA0>; + mediatek,larb = <&larb0>; + mediatek,rdma_fifo_size = <5120>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; + }; + + rdma1: rdma@1400c000 { + compatible = "mediatek,mt8183-disp-rdma"; + reg = <0 0x1400c000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_RDMA1>; + iommus = <&iommu M4U_PORT_DISP_RDMA1>; + mediatek,larb = <&larb0>; + mediatek,rdma_fifo_size = <2048>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; + }; + + color0: color@1400e000 { + compatible = "mediatek,mt8183-disp-color", + "mediatek,mt8173-disp-color"; + reg = <0 0x1400e000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_COLOR0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; + }; + + ccorr0: ccorr@1400f000 { + compatible = "mediatek,mt8183-disp-ccorr"; + reg = <0 0x1400f000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_CCORR0>; + }; + + aal0: aal@14010000 { + compatible = "mediatek,mt8183-disp-aal", + "mediatek,mt8173-disp-aal"; + reg = <0 0x14010000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_AAL0>; + }; + + gamma0: gamma@14011000 { + compatible = "mediatek,mt8183-disp-gamma", + "mediatek,mt8173-disp-gamma"; + reg = <0 0x14011000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_GAMMA0>; + }; + + dither0: dither@14012000 { + compatible = "mediatek,mt8183-disp-dither"; + reg = <0 0x14012000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_DITHER0>; + }; + dsi0: dsi@14014000 { compatible = "mediatek,mt8183-dsi"; reg = <0 0x14014000 0 0x1000>; @@ -978,6 +1085,13 @@ dsi0: dsi@14014000 { phy-names = "dphy"; }; + mutex: mutex@14016000 { + compatible = "mediatek,mt8183-disp-mutex"; + reg = <0 0x14016000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + }; + larb0: larb@14017000 { compatible = "mediatek,mt8183-smi-larb"; reg = <0 0x14017000 0 0x1000>;