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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id e19sm20742edr.61.2020.12.02.06.14.58 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 Dec 2020 06:14:58 -0800 (PST) From: Michal Simek To: linux-kernel@vger.kernel.org, monstr@monstr.eu, michal.simek@xilinx.com, git@xilinx.com Subject: [PATCH] arm64: dts: zynqmp: Add address-cells property to interrupt controllers Date: Wed, 2 Dec 2020 15:14:57 +0100 Message-Id: X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201202_091501_050598_F8CCC0CE X-CRM114-Status: GOOD ( 14.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rajan Vaja , Andre Przywara , Krzysztof Kozlowski , Rob Herring , Manish Narani , Laurent Pinchart , Kalyani Akula , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC commit "81e0919a3e21 checks: Add interrupt provider test" where reasons for this checking are mentioned as "A missing #address-cells property is less critical, but creates ambiguities when used in interrupt-map properties, so warn about this as well now." That's why add address-cells property to gic and gpio nodes to get rid of this warning. CC: Andre Przywara Signed-off-by: Michal Simek --- I was grepping DTSes in the kernel and most of them list it as 0. In gicv3 case where its node is added it needs to be filled property that's why also non 0 values are there. Definitely please let me know if 0 is not the right value here. Based on https://lore.kernel.org/r/cover.1606917949.git.michal.simek@xilinx.com/ --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 14a2e69cf98b..5b2051ac6965 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -368,6 +368,7 @@ fpd_dma_chan8: dma@fd570000 { gic: interrupt-controller@f9010000 { compatible = "arm,gic-400"; + #address-cells = <0>; #interrupt-cells = <3>; reg = <0x0 0xf9010000 0x0 0x10000>, <0x0 0xf9020000 0x0 0x20000>, @@ -574,6 +575,7 @@ gem3: ethernet@ff0e0000 { gpio: gpio@ff0a0000 { compatible = "xlnx,zynqmp-gpio-1.0"; status = "disabled"; + #address-cells = <0>; #gpio-cells = <0x2>; gpio-controller; interrupt-parent = <&gic>;