From patchwork Thu Dec 17 05:44:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yilun X-Patchwork-Id: 11979099 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F670C2BB9A for ; Thu, 17 Dec 2020 05:50:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0ED3B23715 for ; Thu, 17 Dec 2020 05:50:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727304AbgLQFtv (ORCPT ); Thu, 17 Dec 2020 00:49:51 -0500 Received: from mga02.intel.com ([134.134.136.20]:50406 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725882AbgLQFtu (ORCPT ); Thu, 17 Dec 2020 00:49:50 -0500 IronPort-SDR: 8GisvxIrJVhpCYnq4Kcl3deA4zW2HHthsHfFlZPWh/vfMpWzIOv4dFZPRB+jlF/aDlglTtxiSm 014mivE/AVjQ== X-IronPort-AV: E=McAfee;i="6000,8403,9837"; a="162244240" X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="162244240" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2020 21:49:09 -0800 IronPort-SDR: okhjWlRYqdeZO5FPitGwUgeFUd1WxmpnD6HPN4ETJ19JxAGZqDPoNzxmFRTqc+LPbxZ8NHJiFY mDRyFSK+Q//w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="339047187" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.159.141]) by fmsmga008.fm.intel.com with ESMTP; 16 Dec 2020 21:49:08 -0800 From: Xu Yilun To: mdf@kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: gregkh@linuxfoundation.org, trix@redhat.com, lgoncalv@redhat.com, yilun.xu@intel.com, hao.wu@intel.com Subject: [PATCH v3 1/3] fpga: dfl: add the match() ops for dfl driver Date: Thu, 17 Dec 2020 13:44:39 +0800 Message-Id: <1608183881-18692-2-git-send-email-yilun.xu@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608183881-18692-1-git-send-email-yilun.xu@intel.com> References: <1608183881-18692-1-git-send-email-yilun.xu@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org The match ops allows dfl drivers have their own matching algorithem instead of the standard id_table matching. This is to support the DFL UIO driver. It intends to match any DFL device which could not be handled by other DFL drivers. Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v3: this patch is splited out from DFL UIO patch. move the declarations of exported symbols from include/linux/dfl.h to driver/fpga/dfl.h fix some comments. --- drivers/fpga/dfl.c | 22 +++++++++++++++++----- drivers/fpga/dfl.h | 5 +++++ include/linux/dfl.h | 3 +++ 3 files changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 511b20f..dd90111 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -256,12 +256,13 @@ dfl_match_one_device(const struct dfl_device_id *id, struct dfl_device *ddev) return NULL; } -static int dfl_bus_match(struct device *dev, struct device_driver *drv) +int dfl_match_device(struct dfl_device *ddev, struct dfl_driver *ddrv) { - struct dfl_device *ddev = to_dfl_dev(dev); - struct dfl_driver *ddrv = to_dfl_drv(drv); const struct dfl_device_id *id_entry; + if (ddrv->match) + return ddrv->match(ddev); + id_entry = ddrv->id_table; if (id_entry) { while (id_entry->feature_id) { @@ -275,6 +276,15 @@ static int dfl_bus_match(struct device *dev, struct device_driver *drv) return 0; } +EXPORT_SYMBOL_GPL(dfl_match_device); + +static int dfl_bus_match(struct device *dev, struct device_driver *drv) +{ + struct dfl_device *ddev = to_dfl_dev(dev); + struct dfl_driver *ddrv = to_dfl_drv(drv); + + return dfl_match_device(ddev, ddrv); +} static int dfl_bus_probe(struct device *dev) { @@ -328,7 +338,7 @@ static struct attribute *dfl_dev_attrs[] = { }; ATTRIBUTE_GROUPS(dfl_dev); -static struct bus_type dfl_bus_type = { +struct bus_type dfl_bus_type = { .name = "dfl", .match = dfl_bus_match, .probe = dfl_bus_probe, @@ -336,6 +346,7 @@ static struct bus_type dfl_bus_type = { .uevent = dfl_bus_uevent, .dev_groups = dfl_dev_groups, }; +EXPORT_SYMBOL_GPL(dfl_bus_type); static void release_dfl_dev(struct device *dev) { @@ -469,7 +480,8 @@ static int dfl_devs_add(struct dfl_feature_platform_data *pdata) int __dfl_driver_register(struct dfl_driver *dfl_drv, struct module *owner) { - if (!dfl_drv || !dfl_drv->probe || !dfl_drv->id_table) + if (!dfl_drv || !dfl_drv->probe || + (!dfl_drv->id_table && !dfl_drv->match)) return -EINVAL; dfl_drv->drv.owner = owner; diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 2b82c96..01c43d8 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -517,4 +518,8 @@ long dfl_feature_ioctl_set_irq(struct platform_device *pdev, struct dfl_feature *feature, unsigned long arg); +extern struct bus_type dfl_bus_type; + +int dfl_match_device(struct dfl_device *ddev, struct dfl_driver *ddrv); + #endif /* __FPGA_DFL_H */ diff --git a/include/linux/dfl.h b/include/linux/dfl.h index 6cc1098..cfd98a4 100644 --- a/include/linux/dfl.h +++ b/include/linux/dfl.h @@ -51,6 +51,8 @@ struct dfl_device { * @drv: driver model structure. * @id_table: pointer to table of device IDs the driver is interested in. * { } member terminated. + * @match: returns one if given device can be handled by the driver and zero + * otherwise. If NULL, matching is based on id_table. * @probe: mandatory callback for device binding. * @remove: callback for device unbinding. */ @@ -58,6 +60,7 @@ struct dfl_driver { struct device_driver drv; const struct dfl_device_id *id_table; + int (*match)(struct dfl_device *dfl_dev); int (*probe)(struct dfl_device *dfl_dev); void (*remove)(struct dfl_device *dfl_dev); }; From patchwork Thu Dec 17 05:44:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yilun X-Patchwork-Id: 11979103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E9E0C2BB40 for ; Thu, 17 Dec 2020 05:50:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DCD2723787 for ; Thu, 17 Dec 2020 05:50:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727328AbgLQFty (ORCPT ); Thu, 17 Dec 2020 00:49:54 -0500 Received: from mga02.intel.com ([134.134.136.20]:50408 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725882AbgLQFtx (ORCPT ); Thu, 17 Dec 2020 00:49:53 -0500 IronPort-SDR: TMlHjPd6sR2rRGGiEEihLJEodS7sDRWt97EshpoBqdPv6nU1MAqvmaZiTgrzP5+rDdCjGWpvRa JF80O4LCFfUA== X-IronPort-AV: E=McAfee;i="6000,8403,9837"; a="162244244" X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="162244244" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2020 21:49:12 -0800 IronPort-SDR: DmyKdsDMfJrQyNDnUj9XpUj5XIvCptxuZX5ZxX5P5Vjk74v01nIO8+uxosTjFwM4/nFKgEle6g D05tkCp6M4hg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="339047205" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.159.141]) by fmsmga008.fm.intel.com with ESMTP; 16 Dec 2020 21:49:10 -0800 From: Xu Yilun To: mdf@kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: gregkh@linuxfoundation.org, trix@redhat.com, lgoncalv@redhat.com, yilun.xu@intel.com, hao.wu@intel.com Subject: [PATCH v3 2/3] fpga: dfl: add the userspace I/O device support for DFL devices Date: Thu, 17 Dec 2020 13:44:40 +0800 Message-Id: <1608183881-18692-3-git-send-email-yilun.xu@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608183881-18692-1-git-send-email-yilun.xu@intel.com> References: <1608183881-18692-1-git-send-email-yilun.xu@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org This patch supports the DFL drivers be written in userspace. This is realized by exposing the userspace I/O device interfaces. The driver leverages the uio_pdrv_genirq, it adds the uio_pdrv_genirq platform device with the DFL device's resources, and let the generic UIO platform device driver provide support to userspace access to kernel interrupts and memory locations. The driver matches DFL devices in a different way. It has no device id table, instead it matches any DFL device which could not be handled by other DFL drivers. Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v2: switch to the new matching algorithem. It matches DFL devices which could not be handled by other DFL drivers. refacor the code about device resources filling. fix some comments. v3: split the dfl.c changes out of this patch. some minor fixes --- drivers/fpga/Kconfig | 10 ++++ drivers/fpga/Makefile | 1 + drivers/fpga/dfl-uio-pdev.c | 110 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 121 insertions(+) create mode 100644 drivers/fpga/dfl-uio-pdev.c diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 5d7f0ae..7a88af9 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -202,6 +202,16 @@ config FPGA_DFL_NIOS_INTEL_PAC_N3000 the card. It also instantiates the SPI master (spi-altera) for the card's BMC (Board Management Controller). +config FPGA_DFL_UIO_PDEV + tristate "FPGA DFL Driver for Userspace I/O platform devices" + depends on FPGA_DFL && UIO_PDRV_GENIRQ + help + Enable this to allow some DFL drivers be written in userspace. It + adds the uio_pdrv_genirq platform device with the DFL feature's + resources, and lets the generic UIO platform device driver provide + support for userspace access to kernel interrupts and memory + locations. + config FPGA_DFL_PCI tristate "FPGA DFL PCIe Device Driver" depends on PCI && FPGA_DFL diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 18dc9885..8847fe0 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -45,6 +45,7 @@ dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o dfl-afu-objs += dfl-afu-error.o obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o +obj-$(CONFIG_FPGA_DFL_UIO_PDEV) += dfl-uio-pdev.o # Drivers for FPGAs which implement DFL obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o diff --git a/drivers/fpga/dfl-uio-pdev.c b/drivers/fpga/dfl-uio-pdev.c new file mode 100644 index 0000000..8c57233 --- /dev/null +++ b/drivers/fpga/dfl-uio-pdev.c @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * DFL driver for Userspace I/O platform devices + * + * Copyright (C) 2020 Intel Corporation, Inc. + */ +#include +#include +#include +#include +#include +#include +#include + +#include "dfl.h" + +#define DRIVER_NAME "dfl-uio-pdev" + +static struct dfl_driver dfl_uio_pdev_driver; + +static int check_for_other_drv_match(struct device_driver *drv, void *data) +{ + struct dfl_driver *ddrv = to_dfl_drv(drv); + struct dfl_device *ddev = data; + + /* skip myself */ + if (ddrv == &dfl_uio_pdev_driver) + return 0; + + return dfl_match_device(ddev, ddrv); +} + +static int dfl_uio_pdev_match(struct dfl_device *ddev) +{ + /* + * If any other driver wants the device, leave the device to this other + * driver. + */ + if (bus_for_each_drv(&dfl_bus_type, NULL, ddev, check_for_other_drv_match)) + return 0; + + return 1; +} + +static int dfl_uio_pdev_probe(struct dfl_device *ddev) +{ + struct device *dev = &ddev->dev; + struct platform_device_info pdevinfo = { 0 }; + struct uio_info uio_pdata = { 0 }; + struct platform_device *uio_pdev; + struct resource *res; + int i; + + pdevinfo.name = "uio_pdrv_genirq"; + + res = kcalloc(ddev->num_irqs + 1, sizeof(*res), GFP_KERNEL); + if (!res) + return -ENOMEM; + + res[0].parent = &ddev->mmio_res; + res[0].flags = IORESOURCE_MEM; + res[0].start = ddev->mmio_res.start; + res[0].end = ddev->mmio_res.end; + + /* then add irq resource */ + for (i = 0; i < ddev->num_irqs; i++) { + res[i + 1].flags = IORESOURCE_IRQ; + res[i + 1].start = ddev->irqs[i]; + res[i + 1].end = ddev->irqs[i]; + } + + uio_pdata.name = DRIVER_NAME; + uio_pdata.version = "0"; + + pdevinfo.res = res; + pdevinfo.num_res = ddev->num_irqs + 1; + pdevinfo.parent = &ddev->dev; + pdevinfo.id = PLATFORM_DEVID_AUTO; + pdevinfo.data = &uio_pdata; + pdevinfo.size_data = sizeof(uio_pdata); + + uio_pdev = platform_device_register_full(&pdevinfo); + if (!IS_ERR(uio_pdev)) + dev_set_drvdata(dev, uio_pdev); + + kfree(res); + + return PTR_ERR_OR_ZERO(uio_pdev); +} + +static void dfl_uio_pdev_remove(struct dfl_device *ddev) +{ + struct platform_device *uio_pdev = dev_get_drvdata(&ddev->dev); + + platform_device_unregister(uio_pdev); +} + +static struct dfl_driver dfl_uio_pdev_driver = { + .drv = { + .name = DRIVER_NAME, + }, + .match = dfl_uio_pdev_match, + .probe = dfl_uio_pdev_probe, + .remove = dfl_uio_pdev_remove, +}; +module_dfl_driver(dfl_uio_pdev_driver); + +MODULE_DESCRIPTION("DFL driver for Userspace I/O platform devices"); +MODULE_AUTHOR("Intel Corporation"); +MODULE_LICENSE("GPL v2"); From patchwork Thu Dec 17 05:44:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yilun X-Patchwork-Id: 11979101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56A5BC2BBCA for ; Thu, 17 Dec 2020 05:50:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 349EA2376F for ; Thu, 17 Dec 2020 05:50:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725988AbgLQFuD (ORCPT ); Thu, 17 Dec 2020 00:50:03 -0500 Received: from mga02.intel.com ([134.134.136.20]:50404 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725882AbgLQFuD (ORCPT ); Thu, 17 Dec 2020 00:50:03 -0500 IronPort-SDR: JfiK73oEJ+uROK6WPCv3870XR2HDZ+7ALoMeCYdlx9wdkou2DTEQZd/4tL8nfmFpZ/sdYYg6AX Iwt4O9sy7Krw== X-IronPort-AV: E=McAfee;i="6000,8403,9837"; a="162244250" X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="162244250" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2020 21:49:15 -0800 IronPort-SDR: vQiYvuFXWPhGrgbICwvHWmNpR/ok1ZoRPQPeE8zX0iZhZ0tGB1ONyXAFslbyhJuTIvP7EI9Wrg qNYl2y131KUg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="339047222" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.159.141]) by fmsmga008.fm.intel.com with ESMTP; 16 Dec 2020 21:49:13 -0800 From: Xu Yilun To: mdf@kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: gregkh@linuxfoundation.org, trix@redhat.com, lgoncalv@redhat.com, yilun.xu@intel.com, hao.wu@intel.com Subject: [PATCH v3 3/3] Documentation: fpga: dfl: Add description for DFL UIO support Date: Thu, 17 Dec 2020 13:44:41 +0800 Message-Id: <1608183881-18692-4-git-send-email-yilun.xu@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608183881-18692-1-git-send-email-yilun.xu@intel.com> References: <1608183881-18692-1-git-send-email-yilun.xu@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org This patch adds description for UIO support for dfl devices on DFL bus. Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v2: no doc in v1, add it for v2. v3: some documentation fixes. --- Documentation/fpga/dfl.rst | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index 0404fe6..b298ad9 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -7,6 +7,7 @@ Authors: - Enno Luebbers - Xiao Guangrong - Wu Hao +- Xu Yilun The Device Feature List (DFL) FPGA framework (and drivers according to this framework) hides the very details of low layer hardwares and provides @@ -502,6 +503,32 @@ FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) could be a reference. +UIO support for DFL devices +=========================== +The purpose of an FPGA is to be reprogrammed with newly developed hardware +components. New hardware can instantiate a new private feature in the DFL, and +then get a DFL device in their system. In some cases users may need a userspace +driver for the DFL device: + +* Users may need to run some diagnostic test for their hardwares. +* Users may prototype the kernel driver in user space. +* Some hardware is designed for specific purposes and does not fit into one of + the standard kernel subsystems. + +This requires the direct access to the MMIO space and interrupt handling in +userspace. The dfl-uio-pdev module exposes the UIO device interfaces for this +purpose. It adds the uio_pdrv_genirq platform device with the resources of +the DFL feature, and lets the generic UIO platform device driver provide UIO +support to userspace. + +FPGA_DFL_UIO_PDEV should be selected to enable this feature. + +The DFL UIO driver has a special matching algorithem. It will match any DFL +device which could not be handled by other DFL drivers. In this way, it will +not impact the functionality of the features which are already supported by the +system. + + Open discussion =============== FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration