From patchwork Mon Dec 28 06:12:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tejas Upadhyay X-Patchwork-Id: 11990863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2B88C433DB for ; Mon, 28 Dec 2020 06:22:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4D90F221E5 for ; Mon, 28 Dec 2020 06:22:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4D90F221E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B0F589A0E; Mon, 28 Dec 2020 06:22:14 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 637E389A0E for ; Mon, 28 Dec 2020 06:22:13 +0000 (UTC) IronPort-SDR: BhTu2jgguk/phl61Be7Y5ysW5uoEEUz2BwUmT9glJHGlQ4s5TXrRpOPqa1zWc8PfOPqE4krcJM QseDkPkOxtiQ== X-IronPort-AV: E=McAfee;i="6000,8403,9847"; a="156138520" X-IronPort-AV: E=Sophos;i="5.78,454,1599548400"; d="scan'208";a="156138520" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Dec 2020 22:22:12 -0800 IronPort-SDR: JCM/eeHGrj2BnXx1KgItxfuDXjq0NZ1TcpwFhL/crS/vDi1LjAJODYAXFFXuSjXwkarzCuv5JK 2cvgScX//izg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,454,1599548400"; d="scan'208";a="340770094" Received: from tejas-system-product-name.iind.intel.com ([10.145.162.130]) by fmsmga007.fm.intel.com with ESMTP; 27 Dec 2020 22:22:11 -0800 From: Tejas Upadhyay To: intel-gfx@lists.freedesktop.org, hariom.pandey@intel.com Date: Mon, 28 Dec 2020 11:42:35 +0530 Message-Id: <20201228061235.29384-1-tejaskumarx.surendrakumar.upadhyay@intel.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We have TGP PCH support for Tigerlake and Rocketlake. Similarly now TGP PCH can be used with Cometlake CPU. Changes since V1 : - Matched HPD Pin mapping for PORT C and PORT D of CML CPU. Cc : Matt Roper Cc : Ville Syrjälä Signed-off-by: Tejas Upadhyay --- drivers/gpu/drm/i915/display/intel_ddi.c | 7 +++++-- drivers/gpu/drm/i915/display/intel_display.c | 5 +++++ drivers/gpu/drm/i915/display/intel_hdmi.c | 3 ++- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 17eaa56c5a99..181d60a5e145 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -5301,7 +5301,9 @@ static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv, static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv, enum port port) { - if (port >= PORT_TC1) + if (IS_COMETLAKE(dev_priv) && port >= PORT_C) + return HPD_PORT_TC1 + port + 1 - PORT_TC1; + else if (port >= PORT_TC1) return HPD_PORT_TC1 + port - PORT_TC1; else return HPD_PORT_A + port - PORT_A; @@ -5455,7 +5457,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) if (IS_DG1(dev_priv)) encoder->hpd_pin = dg1_hpd_pin(dev_priv, port); - else if (IS_ROCKETLAKE(dev_priv)) + else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) && + HAS_PCH_TGP(dev_priv))) encoder->hpd_pin = rkl_hpd_pin(dev_priv, port); else if (INTEL_GEN(dev_priv) >= 12) encoder->hpd_pin = tgl_hpd_pin(dev_priv, port); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index f2c48e5cdb43..47014471658f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -16163,6 +16163,11 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) intel_ddi_init(dev_priv, PORT_F); icl_dsi_init(dev_priv); + } else if (IS_COMETLAKE(dev_priv) && HAS_PCH_TGP(dev_priv)) { + intel_ddi_init(dev_priv, PORT_A); + intel_ddi_init(dev_priv, PORT_B); + intel_ddi_init(dev_priv, PORT_C); + intel_ddi_init(dev_priv, PORT_D); } else if (IS_GEN9_LP(dev_priv)) { /* * FIXME: Broxton doesn't support port detection via the diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index c5959590562b..540c9d54b595 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -3174,7 +3174,8 @@ static u8 intel_hdmi_ddc_pin(struct intel_encoder *encoder) if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) ddc_pin = dg1_port_to_ddc_pin(dev_priv, port); - else if (IS_ROCKETLAKE(dev_priv)) + else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) && + HAS_PCH_TGP(dev_priv))) ddc_pin = rkl_port_to_ddc_pin(dev_priv, port); else if (HAS_PCH_MCC(dev_priv)) ddc_pin = mcc_port_to_ddc_pin(dev_priv, port);