From patchwork Wed Dec 30 03:23:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 11992913 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BE04C433E0 for ; Wed, 30 Dec 2020 03:25:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2DE8220791 for ; Wed, 30 Dec 2020 03:25:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726256AbgL3DZR (ORCPT ); Tue, 29 Dec 2020 22:25:17 -0500 Received: from wnew2-smtp.messagingengine.com ([64.147.123.27]:57467 "EHLO wnew2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726138AbgL3DZP (ORCPT ); Tue, 29 Dec 2020 22:25:15 -0500 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailnew.west.internal (Postfix) with ESMTP id A4D349D7; Tue, 29 Dec 2020 22:24:08 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Tue, 29 Dec 2020 22:24:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flygoat.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; s=fm1; bh=N587kIZF++Onsdnv505v6x5WYf BETpt5IAx0RuRgOzA=; b=aXLPl7s7zREyCZ4U7hSVnkES8/Ze2bJw7hmfrV2M1Y bz3rMaPKS0LxvHZsF4gSNePVopeGjZIf+DHdgfu5KrWOBi2OGH0Laj8huwWbpyRt 3aahjUFHjCrUHVBKwOPjFXHmTH82ZNCeiGsyjOryZ0HPn9ke5PXRO+V6CRQF0yFy 8t4uKm+h1VKKwg+zkNan/SQTKdy+FjcO7KYwux4v6c3ygm1Ve1sL7rC3i9EOGgaW YTeIbPNQ8Ia93lYfo5fsJmZmb9x9iSsl4yJ31VOTeK2rPnPw/vqm2fZ/0/26dS6n SZs7Yz3HqJ6pp8s6tdNdfyXldFpQgHCdw8QPv5jJ905g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :message-id:mime-version:subject:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=N587kIZF++Onsdnv5 05v6x5WYfBETpt5IAx0RuRgOzA=; b=b9Iid9/tiJXeJDOq/vwVdnaTaiWZTqgY4 2ovR7GzBFQGcMYecZPdLRVfgv12PbGTxdiRSxk/TdbV8qgDloxDs+/PPl6iv1Nm3 LFkOy9D8/DuL+8PrqTvZmgC0qSHzpdRjG4hH9CazrLNxr2jofsUT99VmVfw290GS vSn+JsCCwljOdrvVOlrM8yWEvnVBh7AOVHjYTXAIIPSmEyws/+ZhH0idwu8K/F89 988gMA1RDc+dH2Oe+5jqy3hpN/MTNxnhLEaGweGgCM3eon3mQVm9b7udHSqpVV3w U1hNLu31GOpMrVskVs2t2OoJhxxLCErjCdFNgzXwD4PJUm5pr5o1A== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrvddvvddgheelucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffoggfgsedtkeertdertddtnecuhfhrohhmpeflihgrgihunhcu jggrnhhguceojhhirgiguhhnrdihrghnghesfhhlhihgohgrthdrtghomheqnecuggftrf grthhtvghrnhephfejtdektdeuhedtieefteekveffteejteefgeekveegffetvddugfel iefhtddunecukfhppeeitddrudejjedrudekledrudejudenucevlhhushhtvghrufhiii gvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehjihgrgihunhdrhigrnhhgsehflhih ghhorghtrdgtohhm X-ME-Proxy: Received: from strike.202.net.flygoat.com (unknown [60.177.189.171]) by mail.messagingengine.com (Postfix) with ESMTPA id B122A1080064; Tue, 29 Dec 2020 22:23:56 -0500 (EST) From: Jiaxun Yang To: linux-mips@vger.kernel.org Cc: Jiaxun Yang , Thomas Bogendoerfer , Serge Semin , Alexey Malahov , WANG Xuerui , =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= , Paul Burton , Paul Cercueil , Tiezhu Yang , Huacai Chen , YunQiang Su , Liangliang Huang , linux-kernel@vger.kernel.org Subject: [PATCH 1/3] MIPS: Add vulnerabilities infrastructure Date: Wed, 30 Dec 2020 11:23:07 +0800 Message-Id: <20201230032314.10042-1-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.30.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add infrastructure to display CPU vulnerabilities. As most MIPS CPU vendors are dead today and we can't confirm vulnerabilities states with them, we'll display vulnerabilities as "Unknown" by default and override them in cpu-probe.c Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig | 1 + arch/mips/include/asm/cpu-info.h | 5 ++++ arch/mips/include/asm/cpu.h | 7 +++++ arch/mips/kernel/Makefile | 2 +- arch/mips/kernel/vulnbl.c | 46 ++++++++++++++++++++++++++++++++ 5 files changed, 60 insertions(+), 1 deletion(-) create mode 100644 arch/mips/kernel/vulnbl.c diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ef5b2a177b1b..524053b8f769 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -24,6 +24,7 @@ config MIPS select GENERIC_CLOCKEVENTS select GENERIC_CMOS_UPDATE select GENERIC_CPU_AUTOPROBE + select GENERIC_CPU_VULNERABILITIES select GENERIC_GETTIMEOFDAY select GENERIC_IOMAP select GENERIC_IRQ_PROBE diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index a600670d00e9..1a964dbfc0a8 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -106,6 +106,11 @@ struct cpuinfo_mips { unsigned int guestid_mask; unsigned int guestid_cache; + /* Vulnerabilities */ + unsigned int vulnerabilities; /* Vulnerabilities states that we known */ + unsigned int vulnerable; /* Vulnerabilities affated */ + unsigned int mitigations; /* Mitigations */ + #ifdef CONFIG_CPU_LOONGSON3_CPUCFG_EMULATION /* CPUCFG data for this CPU, synthesized at probe time. * diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index f5b04e8f6061..3414c9f5464e 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -447,4 +447,11 @@ enum cpu_type_enum { #define MIPS_ASE_LOONGSON_EXT 0x00002000 /* Loongson EXTensions */ #define MIPS_ASE_LOONGSON_EXT2 0x00004000 /* Loongson EXTensions R2 */ +/* + * CPU security vulnerabilities + */ +#define MIPS_VULNBL_MELTDOWN BIT(0) +#define MIPS_VULNBL_SPECTRE_V1 BIT(1) +#define MIPS_VULNBL_SPECTRE_V2 BIT(2) + #endif /* _ASM_CPU_H */ diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 13a26d254829..39abc8ead5e0 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -8,7 +8,7 @@ extra-y := head.o vmlinux.lds obj-y += cmpxchg.o cpu-probe.o branch.o elf.o entry.o genex.o idle.o irq.o \ process.o prom.o ptrace.o reset.o setup.o signal.o \ syscall.o time.o topology.o traps.o unaligned.o watch.o \ - vdso.o cacheinfo.o + vdso.o cacheinfo.o vulnbl.o ifdef CONFIG_FUNCTION_TRACER CFLAGS_REMOVE_ftrace.o = -pg diff --git a/arch/mips/kernel/vulnbl.c b/arch/mips/kernel/vulnbl.c new file mode 100644 index 000000000000..fc73da6214fe --- /dev/null +++ b/arch/mips/kernel/vulnbl.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020, Jiaxun Yang + * MIPS CPU vulnerabilities + */ + +#include + +#include +#include + +ssize_t cpu_show_meltdown(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (!(boot_cpu_data.vulnerabilities & MIPS_VULNBL_MELTDOWN)) + return sprintf(buf, "Unknown\n"); + + if (!(boot_cpu_data.vulnerable & MIPS_VULNBL_MELTDOWN)) + return sprintf(buf, "Not affected\n"); + + return sprintf(buf, "Affected\n"); +} + +ssize_t cpu_show_spectre_v1(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (!(boot_cpu_data.vulnerabilities & MIPS_VULNBL_SPECTRE_V1)) + return sprintf(buf, "Unknown\n"); + + if (!(boot_cpu_data.vulnerable & MIPS_VULNBL_SPECTRE_V1)) + return sprintf(buf, "Not affected\n"); + + return sprintf(buf, "Affected\n"); +} + +ssize_t cpu_show_spectre_v2(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (!(boot_cpu_data.vulnerabilities & MIPS_VULNBL_SPECTRE_V2)) + return sprintf(buf, "Unknown\n"); + + if (!(boot_cpu_data.vulnerable & MIPS_VULNBL_SPECTRE_V2)) + return sprintf(buf, "Not affected\n"); + + return sprintf(buf, "Affected\n"); +} From patchwork Wed Dec 30 03:23:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 11992911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B42CC433DB for ; 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Tue, 29 Dec 2020 22:24:07 -0500 (EST) From: Jiaxun Yang To: linux-mips@vger.kernel.org Cc: Jiaxun Yang , Thomas Bogendoerfer , Serge Semin , WANG Xuerui , Alexey Malahov , Paul Burton , =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmpp?= =?utf-8?b?ZSk=?= , Tiezhu Yang , Paul Cercueil , Huacai Chen , YunQiang Su , Liangliang Huang , linux-kernel@vger.kernel.org Subject: [PATCH 2/3] MIPS: cpu-probe: Vulnerabilities for MIPS cores Date: Wed, 30 Dec 2020 11:23:08 +0800 Message-Id: <20201230032314.10042-2-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20201230032314.10042-1-jiaxun.yang@flygoat.com> References: <20201230032314.10042-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Accorading to MIPS's announcement[1], only P5600 and P6600 is affected by spectre v1 and v2, other cores are not affected. So we mark vulnerabilities states for MIPS cores as known and set P5600 and P6600 as vulnerable. [1]: https://www.mips.com/blog/mips-response-on-speculative-execution-and-side-channel-vulnerabilities/ Signed-off-by: Jiaxun Yang Reviewed-by: Huacai Chen --- arch/mips/kernel/cpu-probe.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 03adeed58efb..2460783dbdb1 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1688,6 +1688,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) { c->writecombine = _CACHE_UNCACHED_ACCELERATED; + c->vulnerabilities |= MIPS_VULNBL_MELTDOWN | + MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2; + switch (c->processor_id & PRID_IMP_MASK) { case PRID_IMP_QEMU_GENERIC: c->writecombine = _CACHE_UNCACHED; @@ -1794,10 +1797,12 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) case PRID_IMP_P5600: c->cputype = CPU_P5600; __cpu_name[cpu] = "MIPS P5600"; + c->vulnerable |= MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2; break; case PRID_IMP_P6600: c->cputype = CPU_P6600; __cpu_name[cpu] = "MIPS P6600"; + c->vulnerable |= MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2; break; case PRID_IMP_I6400: c->cputype = CPU_I6400; From patchwork Wed Dec 30 03:23:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 11992915 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87F15C433DB for ; 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Tue, 29 Dec 2020 22:24:18 -0500 (EST) From: Jiaxun Yang To: linux-mips@vger.kernel.org Cc: Jiaxun Yang , Thomas Bogendoerfer , WANG Xuerui , Alexey Malahov , Serge Semin , =?utf-8?b?5ZGo55Cw5p2wICha?= =?utf-8?b?aG91IFlhbmppZSk=?= , Paul Cercueil , Tiezhu Yang , Huacai Chen , YunQiang Su , Liangliang Huang , linux-kernel@vger.kernel.org Subject: [PATCH 3/3] MIPS: cpu-probe: Vulnerabilities for Loongson cores Date: Wed, 30 Dec 2020 11:23:09 +0800 Message-Id: <20201230032314.10042-3-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20201230032314.10042-1-jiaxun.yang@flygoat.com> References: <20201230032314.10042-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Loongson64C is known to be vulnerable to meltdown according to PoC from Rui Wang . Loongson64G defended these side-channel attack by silicon. Signed-off-by: Jiaxun Yang --- arch/mips/kernel/cpu-probe.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 2460783dbdb1..24b21f51353c 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -2092,6 +2092,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM | MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2); c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */ + c->vulnerabilities |= MIPS_VULNBL_MELTDOWN; + c->vulnerable |= MIPS_VULNBL_MELTDOWN; break; case PRID_IMP_LOONGSON_64G: c->cputype = CPU_LOONGSON64; @@ -2100,6 +2102,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) set_isa(c, MIPS_CPU_ISA_M64R2); decode_cpucfg(c); c->writecombine = _CACHE_UNCACHED_ACCELERATED; + c->vulnerabilities |= MIPS_VULNBL_MELTDOWN | + MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2; break; default: panic("Unknown Loongson Processor ID!");