From patchwork Mon Jan 4 00:27:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Belloni X-Patchwork-Id: 11996087 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 842C4C433DB for ; Mon, 4 Jan 2021 00:30:39 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3775F207FB for ; Mon, 4 Jan 2021 00:30:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3775F207FB Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=gkk6ptp1pW6eh0e3i6xo9nhjFLYG9HxOwvUgQy2eS7c=; b=Rh2xPga4MbbdE1tnkq6GdM4vvo 9yGGVM5unsUpETekOvkPQDthNYosUjMdUevAM88UEUfBTHqXA6PKVc4sz/IGVex0FLX+d5EvY9Ooh VqEo09eA0AvSkdgd9I4PI0xHht6gpLi0VwYd6XaccR6qTyQqe1nLTpTM5hZkLFjnUftCPJ3kBHPQw /K6KJnt7oeInhchiEJiFp8BhGV3mRKzHLfNtQu5cYn4z96SmicHsCzCOSbKvF9Ly9AeecwsrRwhTX FBENJou5nX5bCoD6fbe/FMPpZcNuDaYkoH2+VArYy70X4o9ZCsOdCoS8wASonFPjsWxiLAeiM8zoc U6h0JKcw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kwDjG-0007Go-Im; Mon, 04 Jan 2021 00:28:10 +0000 Received: from relay4-d.mail.gandi.net ([217.70.183.196]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kwDj7-0007Bm-4e for linux-arm-kernel@lists.infradead.org; Mon, 04 Jan 2021 00:28:02 +0000 X-Originating-IP: 86.202.109.140 Received: from localhost (lfbn-lyo-1-13-140.w86-202.abo.wanadoo.fr [86.202.109.140]) (Authenticated sender: alexandre.belloni@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 84098E0002; Mon, 4 Jan 2021 00:27:56 +0000 (UTC) From: Alexandre Belloni To: Vladimir Zapolskiy , Arnd Bergmann Subject: [PATCH v2] ARM: lpc32xx: debug: add low-level debug support on hsuart Date: Mon, 4 Jan 2021 01:27:50 +0100 Message-Id: <20210104002750.1631337-1-alexandre.belloni@bootlin.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210103_192801_468295_AB6B4E6D X-CRM114-Status: GOOD ( 15.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Belloni , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The lpc32xx has UARTs that are not 8250 compatible. Add support for low level debugging on those high speed UARTs. Signed-off-by: Alexandre Belloni --- Changes in v2: - rebased on v5.11-rc1 arch/arm/Kconfig.debug | 18 +++++++++++++++--- arch/arm/include/debug/lpc32xx_hsuart.S | 24 ++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 3 deletions(-) create mode 100644 arch/arm/include/debug/lpc32xx_hsuart.S diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 4ff04201a8cc..081800b030f8 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -523,7 +523,16 @@ choice select DEBUG_UART_8250 help Say Y here if you want kernel low-level debugging support - on NXP LPC32xx based platforms. + on NXP LPC32xx based platforms using an INS16Cx50 compatible + UART. + + config DEBUG_LPC32XX_HSUART + bool "Kernel low-level debugging messages via NXP LPC32xx High Speed UART" + depends on ARCH_LPC32XX + help + Say Y here if you want kernel low-level debugging support + on NXP LPC32xx based platforms using an high speed (14-clock) + UART. config DEBUG_MESON_UARTAO bool "Kernel low-level debugging via Meson6 UARTAO" @@ -1602,6 +1611,7 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6SX_UART || \ DEBUG_IMX6UL_UART || \ DEBUG_IMX7D_UART + default "debug/lpc32xx_hsuart.S" if DEBUG_LPC32XX_HSUART default "debug/msm.S" if DEBUG_QCOM_UARTDM default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/renesas-scif.S" if DEBUG_R7S72100_SCIF2 @@ -1686,6 +1696,7 @@ config DEBUG_UART_PHYS default 0x40010000 if STM32MP1_DEBUG_UART default 0x40011000 if STM32F4_DEBUG_UART || STM32F7_DEBUG_UART || \ STM32H7_DEBUG_UART + default 0x40014000 if DEBUG_LPC32XX_HSUART default 0x40028000 if DEBUG_AT91_SAMV7_USART1 default 0x40081000 if DEBUG_LPC18XX_UART0 default 0x40090000 if DEBUG_LPC32XX @@ -1781,7 +1792,7 @@ config DEBUG_UART_PHYS DEBUG_S3C64XX_UART || \ DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \ DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 || \ - DEBUG_AT91_UART || DEBUG_STM32_UART + DEBUG_AT91_UART || DEBUG_STM32_UART || DEBUG_LPC32XX_HSUART config DEBUG_UART_VIRT hex "Virtual base address of debug UART" @@ -1805,6 +1816,7 @@ config DEBUG_UART_VIRT default 0xf1c28400 if DEBUG_SUNXI_UART1 default 0xf1f02800 if DEBUG_SUNXI_R_UART default 0xf31004c0 if DEBUG_MESON_UARTAO + default 0xf4014000 if DEBUG_LPC32XX_HSUART default 0xf4090000 if DEBUG_LPC32XX default 0xf4200000 if DEBUG_GEMINI default 0xf6200000 if DEBUG_PXA_UART1 @@ -1891,7 +1903,7 @@ config DEBUG_UART_VIRT DEBUG_S3C64XX_UART || \ DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \ DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 || \ - DEBUG_AT91_UART || DEBUG_STM32_UART + DEBUG_AT91_UART || DEBUG_STM32_UART || DEBUG_LPC32XX_HSUART config DEBUG_UART_8250_SHIFT int "Register offset shift for the 8250 debug UART" diff --git a/arch/arm/include/debug/lpc32xx_hsuart.S b/arch/arm/include/debug/lpc32xx_hsuart.S new file mode 100644 index 000000000000..7f54bc2cc250 --- /dev/null +++ b/arch/arm/include/debug/lpc32xx_hsuart.S @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#define LPC_HSU_TX (0x0) +#define LPC_HSU_LEVEL (0x4) +#define LPC_HSU_LEVEL_TX 0xFF00 + + .macro addruart, rp, rv, tmp + ldr \rp, =CONFIG_DEBUG_UART_PHYS @ System peripherals (phys address) + ldr \rv, =CONFIG_DEBUG_UART_VIRT @ System peripherals (virt address) + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #(LPC_HSU_TX)] + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #(LPC_HSU_LEVEL)] + ands \rd, \rd, LPC_HSU_LEVEL_TX + bne 1001b + .endm +