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[82.27.183.148]) by smtp.gmail.com with ESMTPSA id b19sm12353373wmj.37.2021.01.08.10.51.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jan 2021 10:51:55 -0800 (PST) From: Leif Lindholm To: qemu-devel@nongnu.org Subject: [PATCH v3 1/6] target/arm: fix typo in cpu.h ID_AA64PFR1 field name Date: Fri, 8 Jan 2021 18:51:49 +0000 Message-Id: <20210108185154.8108-2-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210108185154.8108-1-leif@nuviainc.com> References: <20210108185154.8108-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=leif@nuviainc.com; helo=mail-wr1-x42c.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Desnogues , Peter Maydell , qemu-arm@nongnu.org, =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" SBSS -> SSBS Signed-off-by: Leif Lindholm Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Laurent Desnogues --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 7e6c881a7e..5e3cf77ec7 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1883,7 +1883,7 @@ FIELD(ID_AA64PFR0, RAS, 28, 4) FIELD(ID_AA64PFR0, SVE, 32, 4) FIELD(ID_AA64PFR1, BT, 0, 4) -FIELD(ID_AA64PFR1, SBSS, 4, 4) +FIELD(ID_AA64PFR1, SSBS, 4, 4) FIELD(ID_AA64PFR1, MTE, 8, 4) FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4) From patchwork Fri Jan 8 18:51:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Leif Lindholm X-Patchwork-Id: 12007297 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CDF7C433DB for ; Fri, 8 Jan 2021 18:53:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DE7B023A5E for ; Fri, 8 Jan 2021 18:53:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DE7B023A5E Authentication-Results: mail.kernel.org; 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Fri, 08 Jan 2021 10:51:57 -0800 (PST) Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id b19sm12353373wmj.37.2021.01.08.10.51.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jan 2021 10:51:56 -0800 (PST) From: Leif Lindholm To: qemu-devel@nongnu.org Subject: [PATCH v3 2/6] target/arm: make ARMCPU.clidr 64-bit Date: Fri, 8 Jan 2021 18:51:50 +0000 Message-Id: <20210108185154.8108-3-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210108185154.8108-1-leif@nuviainc.com> References: <20210108185154.8108-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=leif@nuviainc.com; helo=mail-wr1-x42f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Desnogues , Peter Maydell , qemu-arm@nongnu.org, =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The AArch64 view of CLIDR_EL1 extends the ICB field to include also bit 32, as well as adding a Ttype field when FEAT_MTE is implemented. Extend the clidr field to be able to hold this context. Signed-off-by: Leif Lindholm Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Laurent Desnogues --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 5e3cf77ec7..fadd1a47df 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -938,7 +938,7 @@ struct ARMCPU { uint32_t id_afr0; uint64_t id_aa64afr0; uint64_t id_aa64afr1; - uint32_t clidr; + uint64_t clidr; uint64_t mp_affinity; /* MP ID without feature bits */ /* The elements of this array are the CCSIDR values for each cache, * in the order L1DCache, L1ICache, L2DCache, L2ICache, etc. From patchwork Fri Jan 8 18:51:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leif Lindholm X-Patchwork-Id: 12007307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41306C433E6 for ; Fri, 8 Jan 2021 18:56:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A85F723A81 for ; Fri, 8 Jan 2021 18:56:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A85F723A81 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=nuviainc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52970 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kxwvZ-0007mL-Nu for qemu-devel@archiver.kernel.org; Fri, 08 Jan 2021 13:56:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34244) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kxwrl-00029C-EK for qemu-devel@nongnu.org; Fri, 08 Jan 2021 13:52:06 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:36484) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kxwrg-0000tY-0t for qemu-devel@nongnu.org; Fri, 08 Jan 2021 13:52:05 -0500 Received: by mail-wr1-x435.google.com with SMTP id t16so9984402wra.3 for ; Fri, 08 Jan 2021 10:51:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2hPNMUgLjGsZrofLM5ryEx3n5GB4TeZrlJdrp1nvvfk=; b=refXlTezGFlTShhI14ujOQG2wRkydbRfMU1xpG2mLGK0IDxt30Iu6spwWEmDtqNBCN rlTnUriaKdxckSpcOTwMHRosc/gQ7cOVDPwZOZLLbPZ2wDqLPOGgbIuOn0GrerN7Ua+0 TYYwV6UtJg+7yhTese+eP3oUc7UHkOlOSqs8UgiIjbwK58y0ao1t2DYak0wv9A3oiovg qEifirTyi9juzBwucnY5D5FVXAoYMProqX7vK0HQS52JqHX0x5Ul98cguXSQwhbhHZX0 BnpfI+BB++rXsZM9HuO7gtLURS1Sc+vup2T5cZ9HONVMcZKAjsi43K+9xeaV5QlSg4iw uQxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2hPNMUgLjGsZrofLM5ryEx3n5GB4TeZrlJdrp1nvvfk=; b=otP53appD+KpWe0/GN9KhvKVjH/6+DqQGNg+SSRFf8ghHzigMR95J5ZZcnMbnEjE3A NdmMktqOh/+ikb+FS3x7oEyhm4nDcQ4pUHI/zoVFk2dWvE1R9ag/LRhiCmWmD8Yd8H1L xZ7aRI6MTc+z4Mqiu84NMmC/XjXdOfZ+Ltyi7qnAoEz+q46uQkXViKsCezVKj68pwLV7 oz3+125adS89RkK/cE1/YnsivdCW7NheS5VbdcUBxLLEDxDYVzJGnHwWvCWhDQSF8Ibl eoXzGcqf33XaYKja54QIM0bAssPl2IVdEm3NRsWXlmXD1BmxYF0HKYEPN5FUMxLJejNR 4eyA== X-Gm-Message-State: AOAM532lSmpv/Sgphtx92BpFbtqa+FcXgJReXO2NRotshzoqQeWLjK6R lPU0S9dwUA95Rb0rOuj4yM6wasCkMacM7suUfTZLaNNRWTc+6mdhwOUQmyQjubS5KJ2LBr/dGyn dFIZ/y/zhFVgKIUVJuWfn0X1ya6es6Bxgh9BDkEnxbvBbNXdB29NU1PpL7HxO1Akj8zdzNw== X-Google-Smtp-Source: ABdhPJyDH7b4UK5Hn5qzzQQor/2N0wRAoAmoGNgBjgAsX8opPc324S1Su4XyxMGNWpmSbKR6lkXlVQ== X-Received: by 2002:adf:b519:: with SMTP id a25mr4908777wrd.263.1610131918416; Fri, 08 Jan 2021 10:51:58 -0800 (PST) Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id b19sm12353373wmj.37.2021.01.08.10.51.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jan 2021 10:51:58 -0800 (PST) From: Leif Lindholm To: qemu-devel@nongnu.org Subject: [PATCH v3 3/6] target/arm: make ARMCPU.ctr 64-bit Date: Fri, 8 Jan 2021 18:51:51 +0000 Message-Id: <20210108185154.8108-4-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210108185154.8108-1-leif@nuviainc.com> References: <20210108185154.8108-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=leif@nuviainc.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Desnogues , Peter Maydell , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the TminLine field in bits [37:32]. Extend the ctr field to be able to hold this context. Signed-off-by: Leif Lindholm Reviewed-by: Hao Wu Reviewed-by: Richard Henderson Reviewed-by: Laurent Desnogues --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index fadd1a47df..063228de2a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -931,7 +931,7 @@ struct ARMCPU { uint64_t midr; uint32_t revidr; uint32_t reset_fpsid; - uint32_t ctr; + uint64_t ctr; uint32_t reset_sctlr; uint64_t pmceid0; uint64_t pmceid1; From patchwork Fri Jan 8 18:51:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leif Lindholm X-Patchwork-Id: 12007305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UPPERCASE_50_75,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44934C433DB for ; Fri, 8 Jan 2021 18:56:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ADF1623A81 for ; Fri, 8 Jan 2021 18:56:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ADF1623A81 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=nuviainc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kxwvY-0007lQ-Kt for qemu-devel@archiver.kernel.org; Fri, 08 Jan 2021 13:56:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34206) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kxwri-00027I-EY for qemu-devel@nongnu.org; Fri, 08 Jan 2021 13:52:02 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:39181) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kxwrg-0000uJ-T3 for qemu-devel@nongnu.org; Fri, 08 Jan 2021 13:52:02 -0500 Received: by mail-wr1-x42c.google.com with SMTP id c5so9947162wrp.6 for ; Fri, 08 Jan 2021 10:52:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=puA6/puXorIWl8XVvGX9+7qdGtTAWfovzDg6hzeCqzU=; b=e+Y85H6iaUqPYHcxfNj7Djbm2xfNZwQsFBtoS82ht05TZkYZXVOO8TDYK6/day16BG k9mfawz3IrR9ymxLsklYsJgJWy/U0+1DK455mnAQYNgmqgyGlCgGjwkIho53xzEIWnsE Wkm5ow5ImbRAUwaMgQzNC3PvzWysDAn9LNe909u+IITIdnX1OokLEkO0vFDoZEZ4Qfji OQbm+sOKEQ8rpyfEanmoNlW3Jol/uS7Ngkrbt6TKWDzjXt6F3O6wABPTcfMNSH0hPXqp Lw6ulIesFrTm5yymV8pUJgZ5VZT2MG55UscNpivESY1IkTi4fKf1ifSU4DOtEpU5AuGp vpwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=puA6/puXorIWl8XVvGX9+7qdGtTAWfovzDg6hzeCqzU=; b=uMu2LnpTyWJaJzorwd899UfoLIkzA7m2y31MN9iKxcXDEQN7KGQm257cOaw5nB9PYo /wY9DGwDvXxqJuOda2/C7Mr1seS5M2UMZ2b1BdBPB2t4ND3F9kETbD+4qXPJskgv08O0 6BnP0JMpKCYkik3wX4+zGkpEgBMci2n6DBqutgm4kUfDZiCAnXuj2YGIp7BhzmeaRTA/ NvHfWJowZrn9ueVaMfyPRZDjiVnBhSRN/Ga/hMWNfoN7S3fN2efG4AWchpDpQK9htJFi LBjaDTyejAWmEqBtKocQ9dSiCP3Z4226TreLGksWV9w/DfI6rTdcMu3UCsPn1JqRkd0G IWaQ== X-Gm-Message-State: AOAM533qGCZLAnhEH1d9zY1fT0oITSHNqc3I+6UKy2gWF9a5twTeqtWo EObFglAq0XEGGXs9LNTMfCxVUkgo+8qeexT02vjVJvl5eibMLqj4XRksa0Uu9/2nI5A97MH+S4T WTphtdMZXyKgkt95qnoA4fWS6yKIFYD1DaGHcFI+91H94bQuytTaxTuZwKn4ipZkqKqaZAQ== X-Google-Smtp-Source: ABdhPJwQmo8WCGXwztg+movEQFMWwlVZODimGGFInmo09t9NDOVp6HwanSIq25wtXVg3UFclM9fEAw== X-Received: by 2002:a5d:6708:: with SMTP id o8mr4970661wru.64.1610131919324; Fri, 08 Jan 2021 10:51:59 -0800 (PST) Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id b19sm12353373wmj.37.2021.01.08.10.51.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jan 2021 10:51:58 -0800 (PST) From: Leif Lindholm To: qemu-devel@nongnu.org Subject: [PATCH v3 4/6] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h Date: Fri, 8 Jan 2021 18:51:52 +0000 Message-Id: <20210108185154.8108-5-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210108185154.8108-1-leif@nuviainc.com> References: <20210108185154.8108-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=leif@nuviainc.com; helo=mail-wr1-x42c.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Desnogues , Peter Maydell , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Leif Lindholm Reviewed-by: Laurent Desnogues --- target/arm/cpu.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 063228de2a..18c1cb02bb 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1736,6 +1736,37 @@ FIELD(V7M_FPCCR, ASPEN, 31, 1) /* * System register ID fields. */ +FIELD(CLIDR_EL1, CTYPE1, 0, 3) +FIELD(CLIDR_EL1, CTYPE2, 3, 3) +FIELD(CLIDR_EL1, CTYPE3, 6, 3) +FIELD(CLIDR_EL1, CTYPE4, 9, 3) +FIELD(CLIDR_EL1, CTYPE5, 12, 3) +FIELD(CLIDR_EL1, CTYPE6, 15, 3) +FIELD(CLIDR_EL1, CTYPE7, 18, 3) +FIELD(CLIDR_EL1, LOUIS, 21, 3) +FIELD(CLIDR_EL1, LOC, 24, 3) +FIELD(CLIDR_EL1, LOUU, 27, 3) +FIELD(CLIDR_EL1, ICB, 30, 3) + +/* When FEAT_CCIDX is implemented */ +FIELD(CCSIDR_EL1, CCIDX_LINESIZE, 0, 3) +FIELD(CCSIDR_EL1, CCIDX_ASSOCIATIVITY, 3, 21) +FIELD(CCSIDR_EL1, CCIDX_NUMSETS, 32, 24) + +/* When FEAT_CCIDX is not implemented */ +FIELD(CCSIDR_EL1, LINESIZE, 0, 3) +FIELD(CCSIDR_EL1, ASSOCIATIVITY, 3, 10) +FIELD(CCSIDR_EL1, NUMSETS, 13, 15) + +FIELD(CTR_EL0, IMINLINE, 0, 4) +FIELD(CTR_EL0, L1IP, 14, 2) +FIELD(CTR_EL0, DMINLINE, 16, 4) +FIELD(CTR_EL0, ERG, 20, 4) +FIELD(CTR_EL0, CWG, 24, 4) +FIELD(CTR_EL0, IDC, 28, 1) +FIELD(CTR_EL0, DIC, 29, 1) +FIELD(CTR_EL0, TMINLINE, 32, 6) + FIELD(MIDR_EL1, REVISION, 0, 4) FIELD(MIDR_EL1, PARTNUM, 4, 12) FIELD(MIDR_EL1, ARCHITECTURE, 16, 4) From patchwork Fri Jan 8 18:51:53 2021 Content-Type: text/plain; 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[82.27.183.148]) by smtp.gmail.com with ESMTPSA id b19sm12353373wmj.37.2021.01.08.10.51.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jan 2021 10:51:59 -0800 (PST) From: Leif Lindholm To: qemu-devel@nongnu.org Subject: [PATCH v3 5/6] target/arm: add aarch64 ID register fields to cpu.h Date: Fri, 8 Jan 2021 18:51:53 +0000 Message-Id: <20210108185154.8108-6-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210108185154.8108-1-leif@nuviainc.com> References: <20210108185154.8108-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=leif@nuviainc.com; helo=mail-wr1-x436.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Desnogues , Peter Maydell , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add entries present in ARM DDI 0487F.c (August 2020). Signed-off-by: Leif Lindholm Reviewed-by: Peter Maydell Reviewed-by: Laurent Desnogues --- target/arm/cpu.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 18c1cb02bb..8300341a26 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1902,6 +1902,9 @@ FIELD(ID_AA64ISAR1, GPI, 28, 4) FIELD(ID_AA64ISAR1, FRINTTS, 32, 4) FIELD(ID_AA64ISAR1, SB, 36, 4) FIELD(ID_AA64ISAR1, SPECRES, 40, 4) +FIELD(ID_AA64ISAR1, BF16, 44, 4) +FIELD(ID_AA64ISAR1, DGH, 48, 4) +FIELD(ID_AA64ISAR1, I8MM, 52, 4) FIELD(ID_AA64PFR0, EL0, 0, 4) FIELD(ID_AA64PFR0, EL1, 4, 4) @@ -1912,11 +1915,18 @@ FIELD(ID_AA64PFR0, ADVSIMD, 20, 4) FIELD(ID_AA64PFR0, GIC, 24, 4) FIELD(ID_AA64PFR0, RAS, 28, 4) FIELD(ID_AA64PFR0, SVE, 32, 4) +FIELD(ID_AA64PFR0, SEL2, 36, 4) +FIELD(ID_AA64PFR0, MPAM, 40, 4) +FIELD(ID_AA64PFR0, AMU, 44, 4) +FIELD(ID_AA64PFR0, DIT, 48, 4) +FIELD(ID_AA64PFR0, CSV2, 56, 4) +FIELD(ID_AA64PFR0, CSV3, 60, 4) FIELD(ID_AA64PFR1, BT, 0, 4) FIELD(ID_AA64PFR1, SSBS, 4, 4) FIELD(ID_AA64PFR1, MTE, 8, 4) FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4) +FIELD(ID_AA64PFR1, MPAM_FRAC, 16, 4) FIELD(ID_AA64MMFR0, PARANGE, 0, 4) FIELD(ID_AA64MMFR0, ASIDBITS, 4, 4) @@ -1930,6 +1940,8 @@ FIELD(ID_AA64MMFR0, TGRAN16_2, 32, 4) FIELD(ID_AA64MMFR0, TGRAN64_2, 36, 4) FIELD(ID_AA64MMFR0, TGRAN4_2, 40, 4) FIELD(ID_AA64MMFR0, EXS, 44, 4) +FIELD(ID_AA64MMFR0, FGT, 56, 4) +FIELD(ID_AA64MMFR0, ECV, 60, 4) FIELD(ID_AA64MMFR1, HAFDBS, 0, 4) FIELD(ID_AA64MMFR1, VMIDBITS, 4, 4) @@ -1939,6 +1951,8 @@ FIELD(ID_AA64MMFR1, LO, 16, 4) FIELD(ID_AA64MMFR1, PAN, 20, 4) FIELD(ID_AA64MMFR1, SPECSEI, 24, 4) FIELD(ID_AA64MMFR1, XNX, 28, 4) +FIELD(ID_AA64MMFR1, TWED, 32, 4) +FIELD(ID_AA64MMFR1, ETS, 36, 4) FIELD(ID_AA64MMFR2, CNP, 0, 4) FIELD(ID_AA64MMFR2, UAO, 4, 4) @@ -1965,6 +1979,7 @@ FIELD(ID_AA64DFR0, CTX_CMPS, 28, 4) FIELD(ID_AA64DFR0, PMSVER, 32, 4) FIELD(ID_AA64DFR0, DOUBLELOCK, 36, 4) FIELD(ID_AA64DFR0, TRACEFILT, 40, 4) +FIELD(ID_AA64DFR0, MTPMU, 48, 4) FIELD(ID_DFR0, COPDBG, 0, 4) FIELD(ID_DFR0, COPSDBG, 4, 4) From patchwork Fri Jan 8 18:51:54 2021 Content-Type: text/plain; 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[82.27.183.148]) by smtp.gmail.com with ESMTPSA id b19sm12353373wmj.37.2021.01.08.10.52.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jan 2021 10:52:00 -0800 (PST) From: Leif Lindholm To: qemu-devel@nongnu.org Subject: [PATCH v3 6/6] target/arm: add aarch32 ID register fields to cpu.h Date: Fri, 8 Jan 2021 18:51:54 +0000 Message-Id: <20210108185154.8108-7-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210108185154.8108-1-leif@nuviainc.com> References: <20210108185154.8108-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=leif@nuviainc.com; helo=mail-wr1-x431.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Desnogues , Peter Maydell , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add entries present in ARM DDI 0487F.c (August 2020). Signed-off-by: Leif Lindholm Reviewed-by: Peter Maydell Reviewed-by: Laurent Desnogues --- target/arm/cpu.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 8300341a26..af3cce51f4 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1830,6 +1830,8 @@ FIELD(ID_ISAR6, DP, 4, 4) FIELD(ID_ISAR6, FHM, 8, 4) FIELD(ID_ISAR6, SB, 12, 4) FIELD(ID_ISAR6, SPECRES, 16, 4) +FIELD(ID_ISAR6, BF16, 20, 4) +FIELD(ID_ISAR6, I8MM, 24, 4) FIELD(ID_MMFR0, VMSA, 0, 4) FIELD(ID_MMFR0, PMSA, 4, 4) @@ -1840,6 +1842,24 @@ FIELD(ID_MMFR0, AUXREG, 20, 4) FIELD(ID_MMFR0, FCSE, 24, 4) FIELD(ID_MMFR0, INNERSHR, 28, 4) +FIELD(ID_MMFR1, L1HVDVA, 0, 4) +FIELD(ID_MMFR1, L1UNIVA, 4, 4) +FIELD(ID_MMFR1, L1HVDSW, 8, 4) +FIELD(ID_MMFR1, L1UNISW, 12, 4) +FIELD(ID_MMFR1, L1HVD, 16, 4) +FIELD(ID_MMFR1, L1UNI, 20, 4) +FIELD(ID_MMFR1, L1TSTCLN, 24, 4) +FIELD(ID_MMFR1, BPRED, 28, 4) + +FIELD(ID_MMFR2, L1HVDFG, 0, 4) +FIELD(ID_MMFR2, L1HVDBG, 4, 4) +FIELD(ID_MMFR2, L1HVDRNG, 8, 4) +FIELD(ID_MMFR2, HVDTLB, 12, 4) +FIELD(ID_MMFR2, UNITLB, 16, 4) +FIELD(ID_MMFR2, MEMBARR, 20, 4) +FIELD(ID_MMFR2, WFISTALL, 24, 4) +FIELD(ID_MMFR2, HWACCFLG, 28, 4) + FIELD(ID_MMFR3, CMAINTVA, 0, 4) FIELD(ID_MMFR3, CMAINTSW, 4, 4) FIELD(ID_MMFR3, BPMAINT, 8, 4) @@ -1858,6 +1878,8 @@ FIELD(ID_MMFR4, LSM, 20, 4) FIELD(ID_MMFR4, CCIDX, 24, 4) FIELD(ID_MMFR4, EVT, 28, 4) +FIELD(ID_MMFR5, ETS, 0, 4) + FIELD(ID_PFR0, STATE0, 0, 4) FIELD(ID_PFR0, STATE1, 4, 4) FIELD(ID_PFR0, STATE2, 8, 4) @@ -1876,6 +1898,10 @@ FIELD(ID_PFR1, SEC_FRAC, 20, 4) FIELD(ID_PFR1, VIRT_FRAC, 24, 4) FIELD(ID_PFR1, GIC, 28, 4) +FIELD(ID_PFR2, CSV3, 0, 4) +FIELD(ID_PFR2, SSBS, 4, 4) +FIELD(ID_PFR2, RAS_FRAC, 8, 4) + FIELD(ID_AA64ISAR0, AES, 4, 4) FIELD(ID_AA64ISAR0, SHA1, 8, 4) FIELD(ID_AA64ISAR0, SHA2, 12, 4) @@ -1990,6 +2016,8 @@ FIELD(ID_DFR0, MPROFDBG, 20, 4) FIELD(ID_DFR0, PERFMON, 24, 4) FIELD(ID_DFR0, TRACEFILT, 28, 4) +FIELD(ID_DFR1, MTPMU, 0, 4) + FIELD(DBGDIDR, SE_IMP, 12, 1) FIELD(DBGDIDR, NSUHD_IMP, 14, 1) FIELD(DBGDIDR, VERSION, 16, 4)