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Mon, 11 Jan 2021 07:17:21 -0800 (PST) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: Max Krummenacher Subject: [PATCH 1/1] ARM: imx: build suspend-imx6.S with arm instruction set Date: Mon, 11 Jan 2021 16:17:04 +0100 Message-Id: <20210111151704.26296-2-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210111151704.26296-1-max.krummenacher@toradex.com> References: <20210111151704.26296-1-max.krummenacher@toradex.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210111_101723_253891_F2F11A8D X-CRM114-Status: GOOD ( 13.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rouven Czerwinski , Pengutronix Kernel Team , Shawn Guo , Sascha Hauer , linux-kernel@vger.kernel.org, Russell King , NXP Linux Team , Max Krummenacher , Ahmad Fatoum , Fabio Estevam , linux-arm-kernel@lists.infradead.org, Lucas Stach Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When the kernel is configured to use the Thumb-2 instruction set "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q). It looks like the CPU resumes unconditionally in ARM instruction mode and then chokes on the presented Thumb-2 code it should execute. Fix this by using the arm instruction set for all code in suspend-imx6.S. Signed-off-by: Max Krummenacher Acked-by: Oleksandr Suvorov --- arch/arm/mach-imx/suspend-imx6.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S index 1eabf2d2834be..e06f946b75b96 100644 --- a/arch/arm/mach-imx/suspend-imx6.S +++ b/arch/arm/mach-imx/suspend-imx6.S @@ -67,6 +67,7 @@ #define MX6Q_CCM_CCR 0x0 .align 3 + .arm .macro sync_l2_cache