From patchwork Tue Jan 26 13:41:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen (ThunderTown)" X-Patchwork-Id: 12046611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61E19C433E0 for ; Tue, 26 Jan 2021 13:43:51 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F7672223D for ; Tue, 26 Jan 2021 13:43:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0F7672223D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=eYsgfMhFu6HE3g6tU2Yz/X/BBSnBqmHjZIvoB1x3dEo=; b=tdHdAT37uzhchcxgNOMTnio78 o1uyNjWryYJYu5vF8srQIF5TD1CFgU/EaSf6YWPbYoujhMV6VxVsEIBRkwP0h3do7EHaEM/HQGkVc onb98BNKi72ODAwUJI/jMd3l+cxF/6sUcKTgvwCC15jao1YuEGwPq7QHrYSBq7lcxz/SOIeVFJymX fP4jATYTkk/LQykYcIc7HMUB9An7xK2IqrCNC1oNbTjh31RYszV4nXi5QIFozwEnKH9phBXPJmxCk jc087KENxN3cptVwYpfJRq78mzmJkRHFa+30BJrhkRB6xktKFcECKby8eiGmM8Qn4EfFgKVZZymeA u2GaxCHGg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4ObZ-0001bL-DV; Tue, 26 Jan 2021 13:42:01 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4ObW-0001ZE-Bd for linux-arm-kernel@lists.infradead.org; Tue, 26 Jan 2021 13:41:59 +0000 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4DQ7Cs0qFXz7bDX; Tue, 26 Jan 2021 21:40:41 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.176.220) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.498.0; Tue, 26 Jan 2021 21:41:42 +0800 From: Zhen Lei To: Will Deacon , Robin Murphy , "Mark Rutland" , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel Subject: [PATCH v2 1/3] perf/smmuv3: Don't reserve the PMCG register spaces Date: Tue, 26 Jan 2021 21:41:26 +0800 Message-ID: <20210126134128.1368-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20210126134128.1368-1-thunder.leizhen@huawei.com> References: <20210126134128.1368-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.176.220] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210126_084158_663516_F4AE7607 X-CRM114-Status: GOOD ( 13.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , Shameer Kolothum , Zhen Lei Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to the SMMUv3 specification: Each PMCG counter group is represented by one 4KB page (Page 0) with one optional additional 4KB page (Page 1), both of which are at IMPLEMENTATION DEFINED base addresses. This means that the PMCG register spaces may be within the 64KB pages of the SMMUv3 register space. When both the SMMU and PMCG drivers reserve their own resources, a resource conflict occurs. To avoid this conflict, don't reserve the PMCG regions. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 74474bb322c3f26..e5e505a0804fe53 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -761,6 +761,29 @@ static void smmu_pmu_get_acpi_options(struct smmu_pmu *smmu_pmu) dev_notice(smmu_pmu->dev, "option mask 0x%x\n", smmu_pmu->options); } +static void __iomem * +smmu_pmu_get_and_ioremap_resource(struct platform_device *pdev, + unsigned int index, + struct resource **res) +{ + void __iomem *base; + struct resource *r; + + r = platform_get_resource(pdev, IORESOURCE_MEM, index); + if (!r) { + dev_err(&pdev->dev, "invalid resource\n"); + return ERR_PTR(-EINVAL); + } + if (res) + *res = r; + + base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); + if (!base) + return ERR_PTR(-ENOMEM); + + return base; +} + static int smmu_pmu_probe(struct platform_device *pdev) { struct smmu_pmu *smmu_pmu; @@ -793,7 +816,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) .capabilities = PERF_PMU_CAP_NO_EXCLUDE, }; - smmu_pmu->reg_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res_0); + smmu_pmu->reg_base = smmu_pmu_get_and_ioremap_resource(pdev, 0, &res_0); if (IS_ERR(smmu_pmu->reg_base)) return PTR_ERR(smmu_pmu->reg_base); @@ -801,7 +824,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) /* Determine if page 1 is present */ if (cfgr & SMMU_PMCG_CFGR_RELOC_CTRS) { - smmu_pmu->reloc_base = devm_platform_ioremap_resource(pdev, 1); + smmu_pmu->reloc_base = smmu_pmu_get_and_ioremap_resource(pdev, 1, NULL); if (IS_ERR(smmu_pmu->reloc_base)) return PTR_ERR(smmu_pmu->reloc_base); } else { From patchwork Tue Jan 26 13:41:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen (ThunderTown)" X-Patchwork-Id: 12046615 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5537AC433E0 for ; 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Tue, 26 Jan 2021 21:41:43 +0800 From: Zhen Lei To: Will Deacon , Robin Murphy , "Mark Rutland" , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel Subject: [PATCH v2 2/3] perf/smmuv3: Add a MODULE_SOFTDEP() to indicate dependency on SMMU Date: Tue, 26 Jan 2021 21:41:27 +0800 Message-ID: <20210126134128.1368-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20210126134128.1368-1-thunder.leizhen@huawei.com> References: <20210126134128.1368-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.176.220] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210126_084200_942692_7E6C02E2 X-CRM114-Status: UNSURE ( 9.38 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , Shameer Kolothum , Zhen Lei Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MODULE_SOFTDEP() gives user space a hint of the loading sequence. And when command "modprobe arm_smmuv3_pmu" is executed, the arm_smmu_v3.ko is automatically loaded in advance. Signed-off-by: Zhen Lei --- drivers/perf/arm_smmuv3_pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index e5e505a0804fe53..9a305ac51208cd2 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -950,6 +950,7 @@ static void __exit arm_smmu_pmu_exit(void) module_exit(arm_smmu_pmu_exit); MODULE_DESCRIPTION("PMU driver for ARM SMMUv3 Performance Monitors Extension"); +MODULE_SOFTDEP("pre: arm_smmu_v3"); MODULE_AUTHOR("Neil Leeder "); MODULE_AUTHOR("Shameer Kolothum "); MODULE_LICENSE("GPL v2"); From patchwork Tue Jan 26 13:41:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen (ThunderTown)" X-Patchwork-Id: 12046621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AFFEC4332D for ; Tue, 26 Jan 2021 13:44:03 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D6FD222B3B for ; Tue, 26 Jan 2021 13:44:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D6FD222B3B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xr9ZawIdbCwTEwby2gDzR7ovaW1pl+TJkICTEBC1Mz8=; b=u5+S2xQt6N6bPEKBH5DLYsADS HMLiX1PybGc3/lNhF9+qHVEXOjupCChmcXrMt1fpw/XepM5CR6NfkOEfmnc7O6c0wY+U1jIhiv+Qd ol7G8r3uFlCYkjNupim8uO1Cf1WyoE+kpUjEw26odUWELXpukPbGkLyfFNv5Ax6NAcQ7M1jrek4jo sqwfy0YX3ojhKFlb74O9oD4NQtEBcb5ouzX7Nci8qvF15Gso9Bme/1frZ+VGLR2cCBbPKHZpaCPLu UdS3bqVPIw3Rh2OCZ9WmJ2FwabwHZ0JMJ+WtF58372YNHoRUvGK2oiI3APeRcL3x1ahZdsGogVKX2 +QvXyVAWA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4Obd-0001dG-F7; Tue, 26 Jan 2021 13:42:05 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4ObX-0001ZY-BP for linux-arm-kernel@lists.infradead.org; Tue, 26 Jan 2021 13:42:00 +0000 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4DQ7Cs173Hz7bGZ; Tue, 26 Jan 2021 21:40:41 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.176.220) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.498.0; Tue, 26 Jan 2021 21:41:43 +0800 From: Zhen Lei To: Will Deacon , Robin Murphy , "Mark Rutland" , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel Subject: [PATCH v2 3/3] iommu/arm-smmu-v3: Reserving the entire SMMU register space Date: Tue, 26 Jan 2021 21:41:28 +0800 Message-ID: <20210126134128.1368-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20210126134128.1368-1-thunder.leizhen@huawei.com> References: <20210126134128.1368-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.176.220] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210126_084159_923514_C927E70B X-CRM114-Status: GOOD ( 14.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , Shameer Kolothum , Zhen Lei Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org commit 52f3fab0067d ("iommu/arm-smmu-v3: Don't reserve implementation defined register space") only reserves the basic SMMU register space. So the ECMDQ register space is not covered, it should be mapped again. Due to the size of this ECMDQ resource is not fixed, depending on SMMU_IDR6.CMDQ_CONTROL_PAGE_LOG2NUMQ. Processing its resource reservation to avoid resource conflict with PMCG is a bit more complicated. Therefore, the resources of the PMCG are not reserved, and the entire SMMU resources are reserved. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 28 ++++------------------------ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 -- 2 files changed, 4 insertions(+), 26 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index bca458c00e48a8b..fde24403b06a9e3 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3476,18 +3476,6 @@ static int arm_smmu_set_bus_ops(struct iommu_ops *ops) return err; } -static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start, - resource_size_t size) -{ - struct resource res = { - .flags = IORESOURCE_MEM, - .start = start, - .end = start + size - 1, - }; - - return devm_ioremap_resource(dev, &res); -} - static int arm_smmu_device_probe(struct platform_device *pdev) { int irq, ret; @@ -3523,22 +3511,14 @@ static int arm_smmu_device_probe(struct platform_device *pdev) } ioaddr = res->start; - /* - * Don't map the IMPLEMENTATION DEFINED regions, since they may contain - * the PMCG registers which are reserved by the PMU driver. - */ - smmu->base = arm_smmu_ioremap(dev, ioaddr, ARM_SMMU_REG_SZ); + smmu->base = devm_ioremap_resource(dev, res); if (IS_ERR(smmu->base)) return PTR_ERR(smmu->base); - if (arm_smmu_resource_size(smmu) > SZ_64K) { - smmu->page1 = arm_smmu_ioremap(dev, ioaddr + SZ_64K, - ARM_SMMU_REG_SZ); - if (IS_ERR(smmu->page1)) - return PTR_ERR(smmu->page1); - } else { + if (arm_smmu_resource_size(smmu) > SZ_64K) + smmu->page1 = smmu->base + SZ_64K; + else smmu->page1 = smmu->base; - } /* Interrupt lines */ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index da525f46dab4fc1..63f2b476987d6ae 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -152,8 +152,6 @@ #define ARM_SMMU_PRIQ_IRQ_CFG1 0xd8 #define ARM_SMMU_PRIQ_IRQ_CFG2 0xdc -#define ARM_SMMU_REG_SZ 0xe00 - /* Common MSI config fields */ #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2) #define MSI_CFG2_SH GENMASK(5, 4)