From patchwork Wed Jan 27 04:54:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049311 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD384C433E6 for ; Wed, 27 Jan 2021 08:30:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 63BE02073C for ; Wed, 27 Jan 2021 08:30:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 63BE02073C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 87A636E7D1; Wed, 27 Jan 2021 08:29:50 +0000 (UTC) Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8A14A6E514 for ; Wed, 27 Jan 2021 04:54:34 +0000 (UTC) Received: by mail-pg1-x535.google.com with SMTP id o7so778787pgl.1 for ; Tue, 26 Jan 2021 20:54:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kmjtKFjHTUarfxu+lL0d5qeXmAGAmFw4kcflRE2ZaXY=; b=XVJOs4QHR+H8Ih7yjKd1WM+pL+RphjK4kSpQF56nU1UIDdoY4eVpUJBR+38H/KTHxX XOL9WxZXJ4wxzeZTNLjOSM8OHbxUX2yGW2jF36pKr07LRDZRMEtwZOFKRvZ6bxssZkyB wlRYopNtHq5PMiRl1z7h9tBkOMavw2nH1ad1w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kmjtKFjHTUarfxu+lL0d5qeXmAGAmFw4kcflRE2ZaXY=; b=ln5N80KxEs3cl9j81jgLAHOBUTXLTGO2Sn1/TDNxfhj5HKbn5IBG18aDaZbduvEODo z8e3OeWU2YUH2MtO8WgJptf5uMXPV5WR7Q0Y5z3hgCs4bR+EXDX6mw1tUHdmDNL7SvKk Ld/UjM792pEBJkPY5YqqQH+y71Bt/gbdTy/weTfVLAjqlSY1kZyfOTaT1ZBlbPIsbuEZ iebe5LQKxZAPuGMCnBGMcuCtDQSbCT8cgshdOc+dixKxDwACD8E/wzEwf4AoIM4HXYAK YaB7vD6ZeXzBKfywhOS3xIWV5gJ83AfVtZEjg49qeB5by7Wk3SjjmP1EogAA3XO507nY Y+8g== X-Gm-Message-State: AOAM531J/TnqSmjfYueqpdCmxIRvP92R5rYHYWsRZl0b7BR11Mkno1B8 ZdCg8jkTvvSJ6CuyBwoH0TXelA== X-Google-Smtp-Source: ABdhPJx4yF5Zj6KuoOFQLvTsPUKYfKrEzTHR49F4EG7T/rAXtxPo121Qzb4bSIV+4HFYyIAB7z9ATg== X-Received: by 2002:a65:64d6:: with SMTP id t22mr9164071pgv.42.1611723274151; Tue, 26 Jan 2021 20:54:34 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:33 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 1/9] arm64: dts: mt8183: rename rdma fifo size Date: Wed, 27 Jan 2021 12:54:14 +0800 Message-Id: <20210127045422.2418917-2-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu property name must include only lowercase and '-' Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang Reviewed-by: Chun-Kuang Hu --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 5b782a4769e7e..6c84ccb709af6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1011,7 +1011,7 @@ rdma0: rdma@1400b000 { clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; mediatek,larb = <&larb0>; - mediatek,rdma_fifo_size = <5120>; + mediatek,rdma-fifo-size = <5120>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; }; @@ -1023,7 +1023,7 @@ rdma1: rdma@1400c000 { clocks = <&mmsys CLK_MM_DISP_RDMA1>; iommus = <&iommu M4U_PORT_DISP_RDMA1>; mediatek,larb = <&larb0>; - mediatek,rdma_fifo_size = <2048>; + mediatek,rdma-fifo-size = <2048>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; }; From patchwork Wed Jan 27 04:54:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 346A8C433E6 for ; Wed, 27 Jan 2021 08:30:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E0E902074A for ; Wed, 27 Jan 2021 08:30:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E0E902074A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A3856E80B; Wed, 27 Jan 2021 08:29:53 +0000 (UTC) Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B4E56E514 for ; Wed, 27 Jan 2021 04:54:37 +0000 (UTC) Received: by mail-pl1-x636.google.com with SMTP id g3so373831plp.2 for ; Tue, 26 Jan 2021 20:54:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XcNzJ3Y1xaPDuXcAllHAfyiKBSKXPgrFbgqPU858HRE=; b=c63/2D4Bgx2Pjk09crfuNIuRwe5/wMbu0Ar0zyQsmCvjMtnTas7y/GZBYlWxRjh3Cu Nb1V3mC3i2fY9O+EVE8ljfGG/yIlqdt7A80tCikJGekU3DA6bwVdJV2EpvcTM4Bl2Ejs w1Y6GR1JZE4dTINAqovV9VIiAh/wsO0SgoYf0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XcNzJ3Y1xaPDuXcAllHAfyiKBSKXPgrFbgqPU858HRE=; b=uoQ08lQhJgtW2v7kgMpLcA2yirSL5NDbLLxjW2yohg+Dt3c+XbwyE8Yk5wEj+SUcIy ninuD/03uidGxb9LhEMqkxZsWStoUPgQq9t6CBTFldFRpfJfZRE0HkSnzNroom7jFXrv 4E3jvRO6k8cN4sweGNcrJOjwJPvlzZG2Tk46ceTasXIJdPpwDTshVSH3t2Q6mE57+ERB 7tbxpRUBrkrSFH6yIT54EmapLUiILeKAWrIvxa/WWed2J2NtaOeJnTLszhbMC1rwjVdH KVyxUG0viPH7tmrhZlBICzqoD5oyYd7QSjIs4uShRuUYAsijHJ/mugdCM3EgDxgHIlMP NJKg== X-Gm-Message-State: AOAM530Lc7XAmlBtKD0sRCwLzj3pIK2xrnUb6Q0CrQniog8GTeZftDSw 4HjRbGlOlwJERwA4isQx8p/IsRN7Vq6IGg== X-Google-Smtp-Source: ABdhPJyCyyCu7ohSjPbSyt1lJg9XiT+gg2+ohCN2CtKu56w6RhygO1w9flQc9+fGYUeBaJfTm6dUew== X-Received: by 2002:a17:902:7148:b029:df:f45d:41c9 with SMTP id u8-20020a1709027148b02900dff45d41c9mr9676516plm.3.1611723277218; Tue, 26 Jan 2021 20:54:37 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:36 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 2/9] arm64: dts: mt8183: refine gamma compatible name Date: Wed, 27 Jan 2021 12:54:15 +0800 Message-Id: <20210127045422.2418917-3-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu mt8183 gamma is different with mt8173 remove mt8173 compatible name for mt8183 gamma Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 6c84ccb709af6..9c0073cfad452 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1055,8 +1055,7 @@ aal0: aal@14010000 { }; gamma0: gamma@14011000 { - compatible = "mediatek,mt8183-disp-gamma", - "mediatek,mt8173-disp-gamma"; + compatible = "mediatek,mt8183-disp-gamma"; reg = <0 0x14011000 0 0x1000>; interrupts = ; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; From patchwork Wed Jan 27 04:54:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2CCBC433DB for ; Wed, 27 Jan 2021 08:30:16 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 64B282073C for ; Wed, 27 Jan 2021 08:30:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 64B282073C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8274B6E5B9; Wed, 27 Jan 2021 08:29:47 +0000 (UTC) Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by gabe.freedesktop.org (Postfix) with ESMTPS id C00646E517 for ; Wed, 27 Jan 2021 04:54:40 +0000 (UTC) Received: by mail-pj1-x1029.google.com with SMTP id kx7so543658pjb.2 for ; Tue, 26 Jan 2021 20:54:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HSBHxC6BVq05Sqe74BC637dMAggq9obPvY1bN+IbxX8=; b=QLrYujKWg6brD9Dn4569hiEZyanZ/c1eZlO9Y8Xkr3ZSqZ1GIkkMBWnx2iweqHKFzN 98LgtgS7J1HKyPBfvqi3D+M21Balppe5d6zFiEFpyw+/iVnP8zFYOM+lB8LdHlVKjcOr XiAKpeDyKeqCp9VkmeyO3GpLbsopCwWYpXvAE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HSBHxC6BVq05Sqe74BC637dMAggq9obPvY1bN+IbxX8=; b=mCujI5pDzChdSbSRQid3V1Qd+XPrCzLCJWQocmIMxGZSaTFMovXMwqqQyKCNne40zf IUyPV5WJXhDyKv3FbqedkUbJSlQzeCpV0I54kp8+auTE21+KOHQ53/925CXxYF2UI+90 Rk2tUIfwG9XECz+JK10uJDwNwX1J5eDh1rx+yF+0GhUE+rjszXla0ab+gOnFQaXPXwFl GMl+v7Rc5mjeZOZJymagSak3afdDdzMarj+IuvN4BmIws2mIiPE0aJhCpF4ORi7972Ni cvGBioj102fhuUDQyg51BTqtJPTkG1z09/Od4libv3jilERCLBIXemyOXsBqUuddxePs 4K2w== X-Gm-Message-State: AOAM530sGdGb74fHNU2/g6dChXPBozgnus2Wxz9huPYt692kA4d5+Qv+ 4ggyVaW58Giuf5xKH6pY1twRnA== X-Google-Smtp-Source: ABdhPJy/lxAmlDmjnchY5j6fyQaiGPSUiu+V7cni9mncc8A/hA+9bzzULC0varJkx+Ggb//BqKRJVQ== X-Received: by 2002:a17:902:70c6:b029:df:d62a:8c69 with SMTP id l6-20020a17090270c6b02900dfd62a8c69mr9586813plt.20.1611723280370; Tue, 26 Jan 2021 20:54:40 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:39 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 3/9] drm/mediatek: add RDMA fifo size error handle Date: Wed, 27 Jan 2021 12:54:16 +0800 Message-Id: <20210127045422.2418917-4-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu This patch add RDMA fifo size error handle rdma fifo size will not always bigger than the calculated threshold if that case happened, we need set fifo size as the threshold Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang --- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index b84004394970f..04b9542010b00 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -168,6 +168,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width, * account for blanking, and with a pixel depth of 4 bytes: */ threshold = width * height * vrefresh * 4 * 7 / 1000000; + + if (threshold > rdma_fifo_size) + threshold = rdma_fifo_size; + reg = RDMA_FIFO_UNDERFLOW_EN | RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); From patchwork Wed Jan 27 04:54:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DC27C433DB for ; Wed, 27 Jan 2021 08:30:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C0CE2073C for ; Wed, 27 Jan 2021 08:30:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3C0CE2073C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C73426E5CC; Wed, 27 Jan 2021 08:29:48 +0000 (UTC) Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) by gabe.freedesktop.org (Postfix) with ESMTPS id 327836E519 for ; Wed, 27 Jan 2021 04:54:44 +0000 (UTC) Received: by mail-pf1-x429.google.com with SMTP id q131so398621pfq.10 for ; Tue, 26 Jan 2021 20:54:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Kku5mUfG6ArzofT8Gp0G6Y6k/YXISfCSiI9xyZoXKqQ=; b=X5vP6xGTjUSeHE8naRaj4k/+Ch2Dg3rD0xr7wvpLCEmw8icxmNbTF2b7LI5A1AweXw ZHL+sT/Tkg10+Vjdq54CuPhsH5KAk/W501skMzJRDYOb6vTO9j1Z1vGhXzbScVf9qVBU yeKZQQ/4sM/E3YSVqJFHrTa4gyKCxqkRM2SdQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Kku5mUfG6ArzofT8Gp0G6Y6k/YXISfCSiI9xyZoXKqQ=; b=nUKwobxBpRqZEwC6nWcRfYYBwer5MJnPDqoyXwC5llapqYR8u4aBgnsQKHzLZ+NMHw 8fZUgBPQLq9GPJukPq+6O2c7vK4qt0qpCpi6i+AhLzRZv1I2h4IU+LK5bJ2QL4sKhgNF wQr9sqoKJeJedQj9jdOJaRqBa8vrBD7WMzpuko4BpHpsXK74Flowa7fWNlPe8eagpbkO V2R595WFdOBgFs1aXQnc9bDbClw2dZD9OhUg6bE88groav878Xp7n9BVv3qHb1Qsmq08 1SfHGFvf2oFW3rFOhxRiTwzIh1OzEpa8PGxs2slLLAnCaS71n0aTRPmtkinDcAtC4eGK Eg3A== X-Gm-Message-State: AOAM531g7SC2V2yOguh5SHBhcYWydVnjo3ry4dFJVk15YtBDb5T3gFkt W/mTF/G7efadc+OYcW1uzK7MPQ== X-Google-Smtp-Source: ABdhPJw2cxb7tmc6QqJmdJ2QhCqQtOU+GGW+9Ce5oeS5V3z8NOuwcxgrUep+Xy1tAJkmYlz44icQgA== X-Received: by 2002:a63:2009:: with SMTP id g9mr9225513pgg.219.1611723283660; Tue, 26 Jan 2021 20:54:43 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:43 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 4/9] drm/mediatek: generalize mtk_dither_set() function Date: Wed, 27 Jan 2021 12:54:17 +0800 Message-Id: <20210127045422.2418917-5-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There may be data structure other than mtk_ddp_comp_dev that would call mtk_dither_set(), so use regs as parameter instead of device. Signed-off-by: Hsin-Yi Wang --- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 4 ++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 25 +++++++++++++-------- 2 files changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h index 46d199b7b4a29..c50d5fc9fd349 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h @@ -17,6 +17,10 @@ void mtk_color_config(struct device *dev, unsigned int w, unsigned int bpc, struct cmdq_pkt *cmdq_pkt); void mtk_color_start(struct device *dev); +void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg, + unsigned int bpc, unsigned int CFG, + struct cmdq_pkt *cmdq_pkt); + void mtk_dpi_start(struct device *dev); void mtk_dpi_stop(struct device *dev); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 7b5293429426d..53d25823a37cc 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -151,33 +151,40 @@ static void mtk_ddp_clk_disable(struct device *dev) clk_disable_unprepare(priv->clk); } -static void mtk_dither_set(struct device *dev, unsigned int bpc, - unsigned int CFG, struct cmdq_pkt *cmdq_pkt) -{ - struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); +void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg, + unsigned int bpc, unsigned int CFG, struct cmdq_pkt *cmdq_pkt) +{ /* If bpc equal to 0, the dithering function didn't be enabled */ if (bpc == 0) return; if (bpc >= MTK_MIN_BPC) { - mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, DISP_DITHER_5); - mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, DISP_DITHER_7); + mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5); + mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7); mtk_ddp_write(cmdq_pkt, DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) | DITHER_ADD_LSHIFT_R(MTK_MAX_BPC - bpc) | DITHER_NEW_BIT_MODE, - &priv->cmdq_reg, priv->regs, DISP_DITHER_15); + cmdq_reg, regs, DISP_DITHER_15); mtk_ddp_write(cmdq_pkt, DITHER_LSB_ERR_SHIFT_B(MTK_MAX_BPC - bpc) | DITHER_ADD_LSHIFT_B(MTK_MAX_BPC - bpc) | DITHER_LSB_ERR_SHIFT_G(MTK_MAX_BPC - bpc) | DITHER_ADD_LSHIFT_G(MTK_MAX_BPC - bpc), - &priv->cmdq_reg, priv->regs, DISP_DITHER_16); - mtk_ddp_write(cmdq_pkt, DISP_DITHERING, &priv->cmdq_reg, priv->regs, CFG); + cmdq_reg, regs, DISP_DITHER_16); + mtk_ddp_write(cmdq_pkt, DISP_DITHERING, cmdq_reg, regs, CFG); } } +static void mtk_dither_set(struct device *dev, unsigned int bpc, + unsigned int CFG, struct cmdq_pkt *cmdq_pkt) +{ + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); + + mtk_dither_set_common(priv->regs, &priv->cmdq_reg, bpc, CFG, cmdq_pkt); +} + static void mtk_od_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt) From patchwork Wed Jan 27 04:54:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049301 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3FBBC433E6 for ; Wed, 27 Jan 2021 08:30:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 737032074A for ; Wed, 27 Jan 2021 08:30:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 737032074A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B82466E7F5; Wed, 27 Jan 2021 08:29:52 +0000 (UTC) Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by gabe.freedesktop.org (Postfix) with ESMTPS id 96BE16E51A for ; Wed, 27 Jan 2021 04:54:47 +0000 (UTC) Received: by mail-pf1-x42d.google.com with SMTP id q20so405076pfu.8 for ; Tue, 26 Jan 2021 20:54:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GKlwrlyR6nQ+CUTnb3b8CMcJ8TXxqhwgmU2a53z5E9E=; b=F1tMdqEvvWvrWJonEVo2MwwDvSRLpeD39bbdUUnaZDS6I3ppveHE3kZMjIe++afKaw XrnJY4YjijLIxChTiEszU8AcyGtCvA1CAQBPaYBgYChgUbB9YzRCH4LSWIY6UZ+Y9aQK krEgcPt+FCf79JFU0ihA3ol9cTxlbagJn/RPA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GKlwrlyR6nQ+CUTnb3b8CMcJ8TXxqhwgmU2a53z5E9E=; b=gJFB1K4C1dbm68NJ+oMKju8N7+CcatlbF74yJH6wEmDHLzskdUtIVaVLrPaSdBTika Zp3yHy8JKgaA0DDmI4vTvwri+luZsm8hVDFrBX32uIbJUFlwalzvrEwwvMuxbGR5b94I c9U5Ynd+zMcAAdnkGMAHcWPa9bajvgbLT/5jZeGi3quPGJkioxajmMhL64/G+Ri9ExRt Pe0KUFgn4yWygfTgtiW3ffUn70bGagKcjfyg8XssM296Ldipv1cuIDZpABe7gyqbCCTL H/MkPEVF3B9q0YdEj0qDhyXi4LY+0uXS9Jm7kQOKuzmM0cFJHPOuezuBg+jIwJX+aMsG aDFw== X-Gm-Message-State: AOAM5310tak5qKr1QpZWWtXktFfq8Dalw5ZTclxjOVgJAbLOgpz9nHxj E62klKfEWCaN2FULvP+wqBgbHQ== X-Google-Smtp-Source: ABdhPJwP6bdrZFz2dTtUQfx0NgBDEfcgh1lPKSZgoZgID/vW+jJ0kDUIcmQwcF6+wdlDLvTlN2bEnQ== X-Received: by 2002:a62:1b15:0:b029:1b9:1c1:1673 with SMTP id b21-20020a621b150000b02901b901c11673mr8971906pfb.2.1611723286901; Tue, 26 Jan 2021 20:54:46 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:46 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 5/9] drm/mediatek: separate gamma module Date: Wed, 27 Jan 2021 12:54:18 +0800 Message-Id: <20210127045422.2418917-6-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu mt8183 gamma module will different with mt8173 separate gamma for add private data Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_disp_drv.h | 10 ++ drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 188 ++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 71 ++------ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + 6 files changed, 214 insertions(+), 61 deletions(-) create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_gamma.c diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile index 01d06332f7679..b64674b944860 100644 --- a/drivers/gpu/drm/mediatek/Makefile +++ b/drivers/gpu/drm/mediatek/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 mediatek-drm-y := mtk_disp_color.o \ + mtk_disp_gamma.o \ mtk_disp_ovl.o \ mtk_disp_rdma.o \ mtk_drm_crtc.o \ diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h index c50d5fc9fd349..c1e658b490b6c 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h @@ -27,6 +27,16 @@ void mtk_dpi_stop(struct device *dev); void mtk_dsi_ddp_start(struct device *dev); void mtk_dsi_ddp_stop(struct device *dev); +int mtk_gamma_clk_enable(struct device *dev); +void mtk_gamma_clk_disable(struct device *dev); +void mtk_gamma_config(struct device *dev, unsigned int w, + unsigned int h, unsigned int vrefresh, + unsigned int bpc, struct cmdq_pkt *cmdq_pkt); +void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state); +void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state); +void mtk_gamma_start(struct device *dev); +void mtk_gamma_stop(struct device *dev); + void mtk_ovl_bgclr_in_on(struct device *dev); void mtk_ovl_bgclr_in_off(struct device *dev); void mtk_ovl_bypass_shadow(struct device *dev); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c new file mode 100644 index 0000000000000..b5a499d7e472c --- /dev/null +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -0,0 +1,188 @@ +/* + * SPDX-License-Identifier: + * + * Copyright (c) 2020 MediaTek Inc. + */ + +#include +#include +#include +#include +#include +#include + +#include "mtk_disp_drv.h" +#include "mtk_drm_crtc.h" +#include "mtk_drm_ddp_comp.h" + +#define DISP_GAMMA_EN 0x0000 +#define GAMMA_EN BIT(0) +#define DISP_GAMMA_CFG 0x0020 +#define GAMMA_LUT_EN BIT(1) +#define DISP_GAMMA_SIZE 0x0030 +#define DISP_GAMMA_LUT 0x0700 + +#define LUT_10BIT_MASK 0x03ff + +struct mtk_disp_gamma_data { + u32 reserved; +}; + +/** + * struct mtk_disp_gamma - DISP_GAMMA driver structure + * @ddp_comp - structure containing type enum and hardware resources + * @crtc - associated crtc to report irq events to + */ +struct mtk_disp_gamma { + struct clk *clk; + void __iomem *regs; + struct cmdq_client_reg cmdq_reg; + const struct mtk_disp_gamma_data *data; +}; + +int mtk_gamma_clk_enable(struct device *dev) +{ + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); + + return clk_prepare_enable(gamma->clk); +} + +void mtk_gamma_clk_disable(struct device *dev) +{ + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); + + clk_disable_unprepare(gamma->clk); +} + +void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state) +{ + unsigned int i, reg; + struct drm_color_lut *lut; + void __iomem *lut_base; + u32 word; + + if (state->gamma_lut) { + reg = readl(regs + DISP_GAMMA_CFG); + reg = reg | GAMMA_LUT_EN; + writel(reg, regs + DISP_GAMMA_CFG); + lut_base = regs + DISP_GAMMA_LUT; + lut = (struct drm_color_lut *)state->gamma_lut->data; + for (i = 0; i < MTK_LUT_SIZE; i++) { + word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) + + (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) + + ((lut[i].blue >> 6) & LUT_10BIT_MASK); + writel(word, (lut_base + i * 4)); + } + } +} + +void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state) +{ + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); + + mtk_gamma_set_common(gamma->regs, state); +} + +void mtk_gamma_config(struct device *dev, unsigned int w, + unsigned int h, unsigned int vrefresh, + unsigned int bpc, struct cmdq_pkt *cmdq_pkt) +{ + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); + + mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs, + DISP_GAMMA_SIZE); + mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc, DISP_GAMMA_CFG, cmdq_pkt); +} + +void mtk_gamma_start(struct device *dev) +{ + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); + + writel(GAMMA_EN, gamma->regs + DISP_GAMMA_EN); +} + +void mtk_gamma_stop(struct device *dev) +{ + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); + + writel_relaxed(0x0, gamma->regs + DISP_GAMMA_EN); +} + +static int mtk_disp_gamma_bind(struct device *dev, struct device *master, + void *data) +{ + return 0; +} + +static void mtk_disp_gamma_unbind(struct device *dev, struct device *master, + void *data) +{ +} + +static const struct component_ops mtk_disp_gamma_component_ops = { + .bind = mtk_disp_gamma_bind, + .unbind = mtk_disp_gamma_unbind, +}; + +static int mtk_disp_gamma_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mtk_disp_gamma *priv; + struct resource *res; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->clk = devm_clk_get(dev, NULL); + if (IS_ERR(priv->clk)) { + dev_err(dev, "failed to get gamma clk\n"); + return PTR_ERR(priv->clk); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + priv->regs = devm_ioremap_resource(dev, res); + if (IS_ERR(priv->regs)) { + dev_err(dev, "failed to ioremap gamma\n"); + return PTR_ERR(priv->regs); + } + +#if IS_REACHABLE(CONFIG_MTK_CMDQ) + ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); + if (ret) + dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); +#endif + + priv->data = of_device_get_match_data(dev); + platform_set_drvdata(pdev, priv); + + ret = component_add(dev, &mtk_disp_gamma_component_ops); + if (ret) + dev_err(dev, "Failed to add component: %d\n", ret); + + return ret; +} + +static int mtk_disp_gamma_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &mtk_disp_gamma_component_ops); + + return 0; +} + +static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = { + { .compatible = "mediatek,mt8173-disp-gamma"}, + {}, +}; +MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match); + +struct platform_driver mtk_disp_gamma_driver = { + .probe = mtk_disp_gamma_probe, + .remove = mtk_disp_gamma_remove, + .driver = { + .name = "mediatek-disp-gamma", + .owner = THIS_MODULE, + .of_match_table = mtk_disp_gamma_driver_dt_match, + }, +}; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 53d25823a37cc..8173f709272be 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -55,11 +55,6 @@ #define DITHER_RELAY_MODE BIT(0) #define DISP_DITHER_SIZE 0x0030 -#define DISP_GAMMA_EN 0x0000 -#define DISP_GAMMA_CFG 0x0020 -#define DISP_GAMMA_SIZE 0x0030 -#define DISP_GAMMA_LUT 0x0700 - #define LUT_10BIT_MASK 0x03ff #define OD_RELAYMODE BIT(0) @@ -68,9 +63,6 @@ #define AAL_EN BIT(0) -#define GAMMA_EN BIT(0) -#define GAMMA_LUT_EN BIT(1) - #define DISP_DITHERING BIT(2) #define DITHER_LSB_ERR_SHIFT_R(x) (((x) & 0x7) << 28) #define DITHER_OVFLW_BIT_R(x) (((x) & 0x7) << 24) @@ -151,7 +143,6 @@ static void mtk_ddp_clk_disable(struct device *dev) clk_disable_unprepare(priv->clk); } - void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg, unsigned int bpc, unsigned int CFG, struct cmdq_pkt *cmdq_pkt) { @@ -219,6 +210,13 @@ static void mtk_aal_config(struct device *dev, unsigned int w, mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_AAL_SIZE); } +static void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state) +{ + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); + + mtk_gamma_set_common(priv->regs, state); +} + static void mtk_aal_start(struct device *dev) { struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); @@ -333,58 +331,10 @@ static void mtk_dither_stop(struct device *dev) writel_relaxed(0x0, priv->regs + DISP_DITHER_EN); } -static void mtk_gamma_config(struct device *dev, unsigned int w, - unsigned int h, unsigned int vrefresh, - unsigned int bpc, struct cmdq_pkt *cmdq_pkt) -{ - struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); - - mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_GAMMA_SIZE); - mtk_dither_set(dev, bpc, DISP_GAMMA_CFG, cmdq_pkt); -} - -static void mtk_gamma_start(struct device *dev) -{ - struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); - - writel(GAMMA_EN, priv->regs + DISP_GAMMA_EN); -} - -static void mtk_gamma_stop(struct device *dev) -{ - struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); - - writel_relaxed(0x0, priv->regs + DISP_GAMMA_EN); -} - -static void mtk_gamma_set(struct device *dev, - struct drm_crtc_state *state) -{ - struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); - unsigned int i, reg; - struct drm_color_lut *lut; - void __iomem *lut_base; - u32 word; - - if (state->gamma_lut) { - reg = readl(priv->regs + DISP_GAMMA_CFG); - reg = reg | GAMMA_LUT_EN; - writel(reg, priv->regs + DISP_GAMMA_CFG); - lut_base = priv->regs + DISP_GAMMA_LUT; - lut = (struct drm_color_lut *)state->gamma_lut->data; - for (i = 0; i < MTK_LUT_SIZE; i++) { - word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) + - (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) + - ((lut[i].blue >> 6) & LUT_10BIT_MASK); - writel(word, (lut_base + i * 4)); - } - } -} - static const struct mtk_ddp_comp_funcs ddp_aal = { .clk_enable = mtk_ddp_clk_enable, .clk_disable = mtk_ddp_clk_disable, - .gamma_set = mtk_gamma_set, + .gamma_set = mtk_aal_gamma_set, .config = mtk_aal_config, .start = mtk_aal_start, .stop = mtk_aal_stop, @@ -425,8 +375,8 @@ static const struct mtk_ddp_comp_funcs ddp_dsi = { }; static const struct mtk_ddp_comp_funcs ddp_gamma = { - .clk_enable = mtk_ddp_clk_enable, - .clk_disable = mtk_ddp_clk_disable, + .clk_enable = mtk_gamma_clk_enable, + .clk_disable = mtk_gamma_clk_disable, .gamma_set = mtk_gamma_set, .config = mtk_gamma_config, .start = mtk_gamma_start, @@ -642,6 +592,7 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, if (type == MTK_DISP_BLS || type == MTK_DISP_COLOR || + type == MTK_DISP_GAMMA || type == MTK_DPI || type == MTK_DSI || type == MTK_DISP_OVL || diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 5d39dd54255d1..279d3e6f11563 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -486,11 +486,12 @@ static int mtk_drm_probe(struct platform_device *pdev) private->comp_node[comp_id] = of_node_get(node); /* - * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have + * Currently only the COLOR, GAMMA, OVL, RDMA, DSI, and DPI blocks have * separate component platform drivers and initialize their own * DDP component structure. The others are initialized here. */ if (comp_type == MTK_DISP_COLOR || + comp_type == MTK_DISP_GAMMA || comp_type == MTK_DISP_OVL || comp_type == MTK_DISP_OVL_2L || comp_type == MTK_DISP_RDMA || @@ -589,6 +590,7 @@ static struct platform_driver mtk_drm_platform_driver = { static struct platform_driver * const mtk_drm_drivers[] = { &mtk_disp_color_driver, + &mtk_disp_gamma_driver, &mtk_disp_ovl_driver, &mtk_disp_rdma_driver, &mtk_dpi_driver, diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index e8238fa4aa2ac..0e54e3d51014a 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -47,6 +47,7 @@ struct mtk_drm_private { }; extern struct platform_driver mtk_disp_color_driver; +extern struct platform_driver mtk_disp_gamma_driver; extern struct platform_driver mtk_disp_ovl_driver; extern struct platform_driver mtk_disp_rdma_driver; extern struct platform_driver mtk_dpi_driver; From patchwork Wed Jan 27 04:54:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 959B7C433E0 for ; Wed, 27 Jan 2021 08:30:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B3962073C for ; Wed, 27 Jan 2021 08:30:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5B3962073C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CB28A6E7DA; Wed, 27 Jan 2021 08:29:50 +0000 (UTC) Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B3816E51B for ; Wed, 27 Jan 2021 04:54:50 +0000 (UTC) Received: by mail-pg1-x52f.google.com with SMTP id o63so748789pgo.6 for ; Tue, 26 Jan 2021 20:54:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vrn1EIPDQCV6JxTU+kz1dQgkwQ7HwcD+i4/it9ET80A=; b=GIfmPVWtCArqU58hShfQRtp9JVW9Q5txh3wsHjzy5wEQHXSQ//q4qpWXPtjWa+BJ2q GNQbIHm8s3eJkN7XeMXPnpc3C8F7uAO5XK2tgoynWeNk5YWjYu0XwS35KjLAQOudnDTA 7KnJnXS3u10SfGwurLDpej70QUx8340bcwwI8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Vrn1EIPDQCV6JxTU+kz1dQgkwQ7HwcD+i4/it9ET80A=; b=S/q05J6+C3NFFvHudPuP9qrv6CJBkoX4uzFDxbhIBi1xVWyN2CuVcmWyaI3CoE+KiL B1pYdl/ehU+iwkFYcp7EW0zu5tkTAWZXyOq1C/qicm+M5+8IfeSJuH9ZEcWxojD+A2mA t9vL91vUlvLDdc4k40Ekfa1svupT782HJ+M1ziHDc4ePwXRqS7aK+Of3LUbZUMkNHgFi bGwoox3ubd1St4PvHDznRt0Ec0vEusajeHAXVO/tF/Clm9hcBINr7UmT/DZhmUf/0wy0 xdWM+ql2r+heB5MIMHTKJ+YikzZYaJNsJfsdkvNMwFhDHPVpV3Pjg5Fpxf8C+jY/Nclz S4fQ== X-Gm-Message-State: AOAM532/HQtk/j7SDlbatqzLMIN+32RMRvHuGTn27nFY5uRPOjQIzLVl XeAoLoRF5B1LsofcbychanzqfA== X-Google-Smtp-Source: ABdhPJzmAE0XHnp+3O7fjrJHUt/ytzcfhArSJEaMmq1xhk9ptYxmlr6MSoR2+oAnpSFK6O9/qOSm7w== X-Received: by 2002:a63:4d59:: with SMTP id n25mr9033962pgl.122.1611723290229; Tue, 26 Jan 2021 20:54:50 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:49 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 6/9] drm/mediatek: add has_dither private data for gamma Date: Wed, 27 Jan 2021 12:54:19 +0800 Message-Id: <20210127045422.2418917-7-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu Not all SoC has dither function in gamma module. Add private data to control this function setting. Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c index b5a499d7e472c..c98fe284265d0 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -25,7 +25,7 @@ #define LUT_10BIT_MASK 0x03ff struct mtk_disp_gamma_data { - u32 reserved; + bool has_dither; }; /** @@ -91,7 +91,8 @@ void mtk_gamma_config(struct device *dev, unsigned int w, mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE); - mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc, DISP_GAMMA_CFG, cmdq_pkt); + if (gamma->data && gamma->data->has_dither) + mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc, DISP_GAMMA_CFG, cmdq_pkt); } void mtk_gamma_start(struct device *dev) @@ -171,8 +172,13 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev) return 0; } +static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = { + .has_dither = true, +}; + static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = { - { .compatible = "mediatek,mt8173-disp-gamma"}, + { .compatible = "mediatek,mt8173-disp-gamma", + .data = &mt8173_gamma_driver_data}, {}, }; MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match); From patchwork Wed Jan 27 04:54:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049317 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57250C433E0 for ; Wed, 27 Jan 2021 08:30:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 115C12073C for ; Wed, 27 Jan 2021 08:30:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 115C12073C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 572A26E7EF; Wed, 27 Jan 2021 08:29:52 +0000 (UTC) Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by gabe.freedesktop.org (Postfix) with ESMTPS id BBA0C6E51B for ; Wed, 27 Jan 2021 04:54:53 +0000 (UTC) Received: by mail-pf1-x42f.google.com with SMTP id 11so415191pfu.4 for ; Tue, 26 Jan 2021 20:54:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TylT5ylvrSjXZkyDWey49Aq08z8epZnlbLmRvBO6dZo=; b=Tc+it0gmwJ+uU8imyifVsbbL0tQbg1r0O7axx2m5PQMU9SsOBEtnFIz7NJrws/tPdI sGXJung+g6yOpezvv8bsQ+dzp/YEkvO+r4tRawUuKH7LbV8ps8tSe6A+eNjRiJspo3iG AkLDVUg68g1bYXieR5XnjrNugfmkRY9hL3sbI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TylT5ylvrSjXZkyDWey49Aq08z8epZnlbLmRvBO6dZo=; b=BE5eanypugcCX1xq9u+jyXLyi1+5HB70K1uy/vFSls3z9fi7yg1xlibqokdlxgz/uj Mfce1KO/bmGTHNjmhVtkMwk6aeMzjhMuv2T6/OAG978489RG0fKmTB3l41RaiDvRerBC Q8R2ehgYHnjgfeD6PwpKA3okpDiG7otHWTRKBJcNkzosHF773HQO4VerOIEmDbetBIjN oFMz1fiuWfqYfITtTcYiTRiPGonyRXcX4st2f0qt1pB0K59MCI4XuSVDEkK0pXYqfLPP vr1emqxgDvdpHMl0O8PAS+h57O08kaJouULgk90ZkRZSTl90ZQtoigp98k5Vp0hM0emN Dufg== X-Gm-Message-State: AOAM530VXXRZ1jaJmKc1D4vKQ9g0jGWvSIEw2cDjrAZPWBCrfHMu/Jgx o/13jRZkCe5r7pwDSqyjwIFBnA== X-Google-Smtp-Source: ABdhPJyy01Q5a/LPZ4E7UcdQg5mKkFvVyYvr6fPjvcMa6xvNPlRFx5WzfjRFbv8mXDBUtrtl/OLw0g== X-Received: by 2002:a62:5c43:0:b029:1bb:9418:b59b with SMTP id q64-20020a625c430000b02901bb9418b59bmr8642305pfb.35.1611723293345; Tue, 26 Jan 2021 20:54:53 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:52 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 7/9] drm/mediatek: enable dither function Date: Wed, 27 Jan 2021 12:54:20 +0800 Message-Id: <20210127045422.2418917-8-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu for 5 or 6 bpc panel, we need enable dither function to improve the display quality Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 37 ++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 8173f709272be..ee54505412dcd 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -53,7 +53,9 @@ #define DITHER_EN BIT(0) #define DISP_DITHER_CFG 0x0020 #define DITHER_RELAY_MODE BIT(0) +#define DITHER_ENGINE_EN BIT(1) #define DISP_DITHER_SIZE 0x0030 +#define DITHER_REG(idx) (0x100 + (idx) * 4) #define LUT_10BIT_MASK 0x03ff @@ -313,8 +315,41 @@ static void mtk_dither_config(struct device *dev, unsigned int w, { struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev); + bool enable = true; + + const u32 dither_setting[] = { + 0x00000000, /* 5 */ + 0x00003002, /* 6 */ + 0x00000000, /* 7 */ + 0x00000000, /* 8 */ + 0x00000000, /* 9 */ + 0x00000000, /* 10 */ + 0x00000000, /* 11 */ + 0x00000011, /* 12 */ + 0x00000000, /* 13 */ + 0x00000000, /* 14 */ + }; + + if (bpc == 6) { + mtk_ddp_write(cmdq_pkt, 0x40400001, &priv->cmdq_reg, priv->regs, DITHER_REG(15)); + mtk_ddp_write(cmdq_pkt, 0x40404040, &priv->cmdq_reg, priv->regs, DITHER_REG(16)); + } else if (bpc == 5) { + mtk_ddp_write(cmdq_pkt, 0x50500001, &priv->cmdq_reg, priv->regs, DITHER_REG(15)); + mtk_ddp_write(cmdq_pkt, 0x50504040, &priv->cmdq_reg, priv->regs, DITHER_REG(16)); + } else { + enable = false; + } + + if (enable) { + u32 idx; + + for (idx = 0; idx < ARRAY_SIZE(dither_setting); idx++) + mtk_ddp_write(cmdq_pkt, dither_setting[idx], &priv->cmdq_reg, priv->regs, + DITHER_REG(idx + 5)); + } + mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_DITHER_SIZE); - mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG); + mtk_ddp_write(cmdq_pkt, enable ? DITHER_ENGINE_EN : DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG); } static void mtk_dither_start(struct device *dev) From patchwork Wed Jan 27 04:54:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049275 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE6DEC433E6 for ; Wed, 27 Jan 2021 08:29:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8D7362073C for ; Wed, 27 Jan 2021 08:29:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8D7362073C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3689E6E5A5; Wed, 27 Jan 2021 08:29:47 +0000 (UTC) Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFD9A6E51C for ; Wed, 27 Jan 2021 04:54:56 +0000 (UTC) Received: by mail-pl1-x634.google.com with SMTP id 31so357042plb.10 for ; Tue, 26 Jan 2021 20:54:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=N0grnaWPs5cVv17NsMPUYKcEnHrsKHmRnjkooea8sm8=; b=nv48sbxjX1LwiPsUQEgr3LETqtdAdfzQYiWv5UObt5MNPaVS5wRJjOW4pcEUeR0q0H F/rwrB9KGv1YYgDiYdrL6TRWV6f9KLOBS/Hy69O3zs3OifDhlMAt/ZBNv6JQwsA376Vu UQfrKC9qIm5Hj6vfVVdYDDCMC9cuGcSAmSEhk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=N0grnaWPs5cVv17NsMPUYKcEnHrsKHmRnjkooea8sm8=; b=ACmPzXMxm9M+zEcVULZoAPBH/1RGzDFrMgyU9gljBjldRt13Bzny/Cd+kNxNoXN27a d8IaSKdU+HveedJPvNn4sOeki8Rs57S8OtRYGI+1tfGjwHSyt11Wu87z8YvhEMp553/i T/WJBW8J5KHxLuif7hrBr32DnuC+0ftDJCuOKjLJFZSxZuDzzhzEWZKv9yOtZpBBkTmL 7ZfLb2Tv6lLw1TnesdH88UsejYLNLYAI8w7KV5GxaboBItKiroNe/kAyXNGqo7xqqaOk B0R2zulNX/3c4hHrTSpt4ptt+mTmcjc/NR4i9piyKMER3iWwtMkhpZw144VPgWYVtTxA kDGQ== X-Gm-Message-State: AOAM532gEWVopAzOTd6gORrKfp98V0buB7b3NVAu8BgxbN0iqFlth2CW +Pi/AfECBrd/67ikR7Zp3OaOXg== X-Google-Smtp-Source: ABdhPJyh2ojiE8VejJajMQW0Iz93YL8D58j2tODSh2vfleJfz60lTScANSpXostgddONvJ4IQKHHUA== X-Received: by 2002:a17:90a:c705:: with SMTP id o5mr3627972pjt.64.1611723296465; Tue, 26 Jan 2021 20:54:56 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:55 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 8/9] drm/mediatek: add DDP support for MT8183 Date: Wed, 27 Jan 2021 12:54:21 +0800 Message-Id: <20210127045422.2418917-9-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu Add DDP support for MT8183 SoC. Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang --- drivers/soc/mediatek/mtk-mutex.c | 50 ++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index f531b119da7a9..f64e9c33e85ad 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -14,6 +14,8 @@ #define MT2701_MUTEX0_MOD0 0x2c #define MT2701_MUTEX0_SOF0 0x30 +#define MT8183_DISP_MUTEX0_MOD0 0x30 +#define MT8183_DISP_MUTEX0_SOF0 0x2c #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) @@ -37,6 +39,18 @@ #define MT8167_MUTEX_MOD_DISP_DITHER 15 #define MT8167_MUTEX_MOD_DISP_UFOE 16 +#define MT8183_MUTEX_MOD_DISP_RDMA0 0 +#define MT8183_MUTEX_MOD_DISP_RDMA1 1 +#define MT8183_MUTEX_MOD_DISP_OVL0 9 +#define MT8183_MUTEX_MOD_DISP_OVL0_2L 10 +#define MT8183_MUTEX_MOD_DISP_OVL1_2L 11 +#define MT8183_MUTEX_MOD_DISP_WDMA0 12 +#define MT8183_MUTEX_MOD_DISP_COLOR0 13 +#define MT8183_MUTEX_MOD_DISP_CCORR0 14 +#define MT8183_MUTEX_MOD_DISP_AAL0 15 +#define MT8183_MUTEX_MOD_DISP_GAMMA0 16 +#define MT8183_MUTEX_MOD_DISP_DITHER0 17 + #define MT8173_MUTEX_MOD_DISP_OVL0 11 #define MT8173_MUTEX_MOD_DISP_OVL1 12 #define MT8173_MUTEX_MOD_DISP_RDMA0 13 @@ -87,6 +101,12 @@ #define MT2712_MUTEX_SOF_DSI3 6 #define MT8167_MUTEX_SOF_DPI0 2 #define MT8167_MUTEX_SOF_DPI1 3 +#define MT8183_MUTEX_SOF_DSI0 1 +#define MT8183_MUTEX_SOF_DPI0 2 + +/* Add EOF setting so overlay hardware can receive frame done irq */ +#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6) +#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6) struct mtk_mutex { int id; @@ -181,6 +201,20 @@ static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1, }; +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { + [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0, + [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0, + [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0, + [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0, + [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0, + [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0, + [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L, + [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L, + [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0, + [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1, + [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, +}; + static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = { [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0, @@ -198,6 +232,12 @@ static const unsigned int mt8167_mutex_sof[MUTEX_SOF_DSI3 + 1] = { [MUTEX_SOF_DPI1] = MT8167_MUTEX_SOF_DPI1, }; +static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = { + [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0 | MT8183_MUTEX_EOF_DSI0, + [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0, +}; + static const struct mtk_mutex_data mt2701_mutex_driver_data = { .mutex_mod = mt2701_mutex_mod, .mutex_sof = mt2712_mutex_sof, @@ -227,6 +267,14 @@ static const struct mtk_mutex_data mt8173_mutex_driver_data = { .mutex_sof_reg = MT2701_MUTEX0_SOF0, }; +static const struct mtk_mutex_data mt8183_mutex_driver_data = { + .mutex_mod = mt8183_mutex_mod, + .mutex_sof = mt8183_mutex_sof, + .mutex_mod_reg = MT8183_DISP_MUTEX0_MOD0, + .mutex_sof_reg = MT8183_DISP_MUTEX0_SOF0, + .no_clk = true, +}; + struct mtk_mutex *mtk_mutex_get(struct device *dev) { struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev); @@ -457,6 +505,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { .data = &mt8167_mutex_driver_data}, { .compatible = "mediatek,mt8173-disp-mutex", .data = &mt8173_mutex_driver_data}, + { .compatible = "mediatek,mt8183-disp-mutex", + .data = &mt8183_mutex_driver_data}, {}, }; MODULE_DEVICE_TABLE(of, mutex_driver_dt_match); From patchwork Wed Jan 27 04:54:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12049297 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F4230C433E6 for ; Wed, 27 Jan 2021 08:30:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9FCA52074A for ; Wed, 27 Jan 2021 08:30:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9FCA52074A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C6D416E5BE; Wed, 27 Jan 2021 08:29:47 +0000 (UTC) Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1F52C6E520 for ; Wed, 27 Jan 2021 04:55:00 +0000 (UTC) Received: by mail-pl1-x629.google.com with SMTP id e9so373539plh.3 for ; Tue, 26 Jan 2021 20:55:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DGMTrTOGQEYV5xTMfWIYbTwhpuINQlQoNCaxTL3+JO4=; b=XXC28j/9qLWor2oWoScmvbZEbLgVvkNWMweZeyFa6/uNLJzYLvWNLCPcY1ua69gvrZ EKQeGuLeaqykosNeilFjk9h9yv3OfuPMIfGABGMk41Q+NdMP5YjmGSEKENoXP/5/lPEB +UCAfbMuj+7RKnNg0e1FvfRF3NDo0vH6hDPGQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DGMTrTOGQEYV5xTMfWIYbTwhpuINQlQoNCaxTL3+JO4=; b=cqHHMzB5UTx24TUXprj1KBXdNIC0tlkl7afnKjq2mwQGHb4jiFqn6qRsOiSTjRiSFn 2wY/cwiZxr/E7oM9HCpkz1KQxXn3klt3bD/XbBMmTENN/4N1vt/4n7Cp4DfeWbYRL4/Q ygl3o9To6YUYq3bQsFxa85qHZjpOe+fGeTxVPC64StujZzCpKxlSqTekEzZ83ve83Ft1 hiWwPG2tFg1LzUXneOaLs+KVddWRBnkUHnbCQcapsOqkCswgGWUb065V8U82gBDr2wF2 UBP3HNFpptKD6y8KIiRpOSq7HLEt/2uu3OQlTstrmsBe91W/5q3ouK0v0qVPZ9qH13D3 IPqw== X-Gm-Message-State: AOAM530snY2w+kulhjRxf/zz6kAmpCFmvCxOUzQwb1HByu3R1qVbezr3 EjDIr9NZfuZd0Yh000QQgRXWzw== X-Google-Smtp-Source: ABdhPJxnMkZtsGht95hSRADTJHdbHTMKteKsZrlDXbBE2rXGTug0n1DOeDhd85LSyPwF+tTr4DwBqg== X-Received: by 2002:a17:90a:588d:: with SMTP id j13mr3675338pji.50.1611723299679; Tue, 26 Jan 2021 20:54:59 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:e0a5:d2fc:aaad:1e4a]) by smtp.gmail.com with ESMTPSA id a141sm684484pfa.189.2021.01.26.20.54.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 20:54:59 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v10 9/9] drm/mediatek: add support for mediatek SOC MT8183 Date: Wed, 27 Jan 2021 12:54:22 +0800 Message-Id: <20210127045422.2418917-10-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.280.ga3ce27912f-goog In-Reply-To: <20210127045422.2418917-1-hsinyi@chromium.org> References: <20210127045422.2418917-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 27 Jan 2021 08:29:46 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu 1. add ovl private data 2. add rdma private data 3. add gamma privte data 4. add main and external path module for crtc create Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 1 + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18 +++++++++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 45 +++++++++++++++++++++++ 4 files changed, 70 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c index c98fe284265d0..93ad76a2dda5e 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -179,6 +179,7 @@ static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = { static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = { { .compatible = "mediatek,mt8173-disp-gamma", .data = &mt8173_gamma_driver_data}, + { .compatible = "mediatek,mt8183-disp-gamma"}, {}, }; MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index 1c295c58a5e82..da7e38a28759b 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -424,11 +424,29 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { .fmt_rgb565_is_0 = true, }; +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = { + .addr = DISP_REG_OVL_ADDR_MT8173, + .gmc_bits = 10, + .layer_nr = 4, + .fmt_rgb565_is_0 = true, +}; + +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = { + .addr = DISP_REG_OVL_ADDR_MT8173, + .gmc_bits = 10, + .layer_nr = 2, + .fmt_rgb565_is_0 = true, +}; + static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = { { .compatible = "mediatek,mt2701-disp-ovl", .data = &mt2701_ovl_driver_data}, { .compatible = "mediatek,mt8173-disp-ovl", .data = &mt8173_ovl_driver_data}, + { .compatible = "mediatek,mt8183-disp-ovl", + .data = &mt8183_ovl_driver_data}, + { .compatible = "mediatek,mt8183-disp-ovl-2l", + .data = &mt8183_ovl_2l_driver_data}, {}, }; MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index 04b9542010b00..29fa5f3a05c30 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -355,11 +355,17 @@ static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = { .fifo_size = SZ_8K, }; +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = { + .fifo_size = 5 * SZ_1K, +}; + static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = { { .compatible = "mediatek,mt2701-disp-rdma", .data = &mt2701_rdma_driver_data}, { .compatible = "mediatek,mt8173-disp-rdma", .data = &mt8173_rdma_driver_data}, + { .compatible = "mediatek,mt8183-disp-rdma", + .data = &mt8183_rdma_driver_data}, {}, }; MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 279d3e6f11563..486e73e675ad5 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -129,6 +129,24 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { DDP_COMPONENT_DPI0, }; +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = { + DDP_COMPONENT_OVL0, + DDP_COMPONENT_OVL_2L0, + DDP_COMPONENT_RDMA0, + DDP_COMPONENT_COLOR0, + DDP_COMPONENT_CCORR, + DDP_COMPONENT_AAL0, + DDP_COMPONENT_GAMMA, + DDP_COMPONENT_DITHER, + DDP_COMPONENT_DSI0, +}; + +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = { + DDP_COMPONENT_OVL_2L1, + DDP_COMPONENT_RDMA1, + DDP_COMPONENT_DPI0, +}; + static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .main_path = mt2701_mtk_ddp_main, .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), @@ -161,6 +179,13 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), }; +static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { + .main_path = mt8183_mtk_ddp_main, + .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main), + .ext_path = mt8183_mtk_ddp_ext, + .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext), +}; + static int mtk_drm_kms_init(struct drm_device *drm) { struct mtk_drm_private *private = drm->dev_private; @@ -375,12 +400,20 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { .data = (void *)MTK_DISP_OVL }, { .compatible = "mediatek,mt8173-disp-ovl", .data = (void *)MTK_DISP_OVL }, + { .compatible = "mediatek,mt8183-disp-ovl", + .data = (void *)MTK_DISP_OVL }, + { .compatible = "mediatek,mt8183-disp-ovl-2l", + .data = (void *)MTK_DISP_OVL_2L }, { .compatible = "mediatek,mt2701-disp-rdma", .data = (void *)MTK_DISP_RDMA }, { .compatible = "mediatek,mt8173-disp-rdma", .data = (void *)MTK_DISP_RDMA }, + { .compatible = "mediatek,mt8183-disp-rdma", + .data = (void *)MTK_DISP_RDMA }, { .compatible = "mediatek,mt8173-disp-wdma", .data = (void *)MTK_DISP_WDMA }, + { .compatible = "mediatek,mt8183-disp-ccorr", + .data = (void *)MTK_DISP_CCORR }, { .compatible = "mediatek,mt2701-disp-color", .data = (void *)MTK_DISP_COLOR }, { .compatible = "mediatek,mt8173-disp-color", @@ -389,22 +422,32 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { .data = (void *)MTK_DISP_AAL}, { .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, }, + { .compatible = "mediatek,mt8183-disp-gamma", + .data = (void *)MTK_DISP_GAMMA, }, + { .compatible = "mediatek,mt8183-disp-dither", + .data = (void *)MTK_DISP_DITHER }, { .compatible = "mediatek,mt8173-disp-ufoe", .data = (void *)MTK_DISP_UFOE }, { .compatible = "mediatek,mt2701-dsi", .data = (void *)MTK_DSI }, { .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI }, + { .compatible = "mediatek,mt8183-dsi", + .data = (void *)MTK_DSI }, { .compatible = "mediatek,mt2701-dpi", .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI }, + { .compatible = "mediatek,mt8183-dpi", + .data = (void *)MTK_DPI }, { .compatible = "mediatek,mt2701-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, { .compatible = "mediatek,mt2712-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, { .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX }, + { .compatible = "mediatek,mt8183-disp-mutex", + .data = (void *)MTK_DISP_MUTEX }, { .compatible = "mediatek,mt2701-disp-pwm", .data = (void *)MTK_DISP_BLS }, { .compatible = "mediatek,mt8173-disp-pwm", @@ -423,6 +466,8 @@ static const struct of_device_id mtk_drm_of_ids[] = { .data = &mt2712_mmsys_driver_data}, { .compatible = "mediatek,mt8173-mmsys", .data = &mt8173_mmsys_driver_data}, + { .compatible = "mediatek,mt8183-mmsys", + .data = &mt8183_mmsys_driver_data}, { } };