From patchwork Tue Nov 13 14:48:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10680895 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 41E0E1759 for ; Tue, 13 Nov 2018 14:48:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C53929891 for ; Tue, 13 Nov 2018 14:48:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 18BE12842B; Tue, 13 Nov 2018 14:48:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0EDF12842B for ; Tue, 13 Nov 2018 14:48:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=qG7MXHjpey9dhAL4ZcmuiCbXJK8USvQF2/Fxoo728Dg=; b=uztjWy1Q18+K9Dv+jIrf1V0V/q TtLM/ms5mZCteBB48nAFi3g927562mEMqUB0v/ypcVMD7/sLk2eOPmJggxTS6dG7eH611qMG15S9/ wj4NNeHLHlZrM0cYGadsq+A2JTcso5r6bQMFpd+fGL3m1oguQFgDNuadW9auXa/nAf3CuivHoAWZO SIfOxdh0xa9MyjV3qtz9BQs5bjhMJZ1rHN1KYkcStJjlvtYtrNjhVIlevQExAWP+Vc5mJCc6/mcus 5gXvGeJP2w+Ur8t3AAeNGvRHX6LQxSeCX/TPMgs030KorA4MdSutYhFqE0iqEru/OCd0oscMaPCAR 7JpaVCIg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gMZzZ-000563-Dl; Tue, 13 Nov 2018 14:48:37 +0000 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gMZzP-0004tE-Fk for linux-arm-kernel@lists.infradead.org; Tue, 13 Nov 2018 14:48:28 +0000 Received: by mail-wr1-x441.google.com with SMTP id z13-v6so13625593wrs.3 for ; Tue, 13 Nov 2018 06:48:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d0uFgq7uL2kAGCBa/t+I51Xcd1+QHn6w3C87keUlgI0=; b=PcdsYoU2sU104K6nE+gv4EzJuS1ZFSkqqL1xRi9zoOLD1pEfZx7NyoV7Ueq0SLs3D7 1xK0CYitRfX2M08grMfdxspAWZ5ORlVNiRuhKrhYFwl1+7vSv3zB39297+7k8JlIWBZ3 tDA2RRamzWQMHAPh++CgDKReCE544uw9wvPms= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=d0uFgq7uL2kAGCBa/t+I51Xcd1+QHn6w3C87keUlgI0=; b=JnbXY8mhthrsGhhCuQfW0ImBPDr3h+Hj2FsImGY4rtDLb9F8836hMnJ9cHk271dE8U AlX0qAKQYG/doIa8CqWe4PcA5va6TgTOoXHXe/Nku4b5QvhJAWc/4DZrYKentxzii+T/ Bdg1g9vbwZXbxN226UwfrY/oHS1F6rXFSpi0n1nZM0WRN3aUU/BzqbMgfC4rV6JSLKvG hYFjp0YW4w6VWov6A3uMgwX64LpSt7T0ULrcqcdL4tdXfvDRSwrZPoBFS4WTwBLKHkQN lTF/sUp3FkpN6EeXfG8AoejAN3TKMSquwUleptSOsLj4eVkUo0DiZxdkaom/k1DfnW6z j2lg== X-Gm-Message-State: AGRZ1gLgyWYYPSOBFcKDiYmni5O+Vkn+s0U1qDGg4gaSFJeuZd5dl7tF BXwMip2fb5fxkSsea4gfxdFk+Q== X-Google-Smtp-Source: AJdET5cywocwCrBeVkJCWAPWAuyvWQ0K6pOHqEGbzxwRHvqTVAjnttLLzJAbIBuJvcyu5taPtrJClA== X-Received: by 2002:adf:df82:: with SMTP id z2-v6mr5076186wrl.118.1542120495976; Tue, 13 Nov 2018 06:48:15 -0800 (PST) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1088:2b4c:8cab:bca7:b2f2:d2bb]) by smtp.gmail.com with ESMTPSA id s16sm3292020wrt.77.2018.11.13.06.48.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 13 Nov 2018 06:48:15 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Subject: [PATCH 1/3] dt-bindings: interrupt-controller: stm32: Document hwlock properties Date: Tue, 13 Nov 2018 15:48:03 +0100 Message-Id: <20181113144805.1054-2-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20181113144805.1054-1-benjamin.gaignard@st.com> References: <20181113144805.1054-1-benjamin.gaignard@st.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181113_064827_517688_D0AF4DC0 X-CRM114-Status: UNSURE ( 9.82 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Benjamin Gaignard , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add hwlocks as optional property Signed-off-by: Benjamin Gaignard --- .../devicetree/bindings/interrupt-controller/st,stm32-exti.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt index 6a36bf66d932..cd01b2292ec6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt @@ -14,6 +14,10 @@ Required properties: (only needed for exti controller with multiple exti under same parent interrupt: st,stm32-exti and st,stm32h7-exti) +Optional properties: + +- hwlocks: reference to a phandle of a hardware spinlock provider node. + Example: exti: interrupt-controller@40013c00 { From patchwork Tue Nov 13 14:48:04 2018 Content-Type: text/plain; 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Signed-off-by: Benjamin Gaignard --- drivers/irqchip/irq-stm32-exti.c | 36 ++++++++++++++++++++++++++++++------ 1 file changed, 30 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index 0a2088e12d96..a010a2eed078 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -20,6 +21,8 @@ #define IRQS_PER_BANK 32 +#define HWSPINLOCK_TIMEOUT 5 /* msec */ + struct stm32_exti_bank { u32 imr_ofst; u32 emr_ofst; @@ -47,6 +50,7 @@ struct stm32_exti_drv_data { struct stm32_exti_chip_data { struct stm32_exti_host_data *host_data; const struct stm32_exti_bank *reg_bank; + struct hwspinlock *hwlock; struct raw_spinlock rlock; u32 wake_active; u32 mask_cache; @@ -275,25 +279,34 @@ static int stm32_irq_set_type(struct irq_data *d, unsigned int type) struct stm32_exti_chip_data *chip_data = gc->private; const struct stm32_exti_bank *stm32_bank = chip_data->reg_bank; u32 rtsr, ftsr; - int err; + int err = 0; irq_gc_lock(gc); + if (chip_data->hwlock) + err = hwspin_lock_timeout(chip_data->hwlock, + HWSPINLOCK_TIMEOUT); + + if (err) + goto unlock; + rtsr = irq_reg_readl(gc, stm32_bank->rtsr_ofst); ftsr = irq_reg_readl(gc, stm32_bank->ftsr_ofst); err = stm32_exti_set_type(d, type, &rtsr, &ftsr); - if (err) { - irq_gc_unlock(gc); - return err; - } + if (err) + goto unspinlock; irq_reg_writel(gc, rtsr, stm32_bank->rtsr_ofst); irq_reg_writel(gc, ftsr, stm32_bank->ftsr_ofst); +unspinlock: + if (chip_data->hwlock) + hwspin_unlock(chip_data->hwlock); +unlock: irq_gc_unlock(gc); - return 0; + return err; } static void stm32_chip_suspend(struct stm32_exti_chip_data *chip_data, @@ -670,6 +683,7 @@ static int __init stm32_exti_init(const struct stm32_exti_drv_data *drv_data, int nr_irqs, ret, i; struct irq_chip_generic *gc; struct irq_domain *domain; + struct hwspinlock *hwlock = NULL; host_data = stm32_exti_host_init(drv_data, node); if (!host_data) @@ -692,12 +706,22 @@ static int __init stm32_exti_init(const struct stm32_exti_drv_data *drv_data, goto out_free_domain; } + /* hwspinlock is optional */ + ret = of_hwspin_lock_get_id(node, 0); + if (ret < 0) { + if (ret == -EPROBE_DEFER) + goto out_free_domain; + } else { + hwlock = hwspin_lock_request_specific(ret); + } + for (i = 0; i < drv_data->bank_nr; i++) { const struct stm32_exti_bank *stm32_bank; struct stm32_exti_chip_data *chip_data; stm32_bank = drv_data->exti_banks[i]; chip_data = stm32_exti_chip_init(host_data, i, node); + chip_data->hwlock = hwlock; gc = irq_get_domain_generic_chip(domain, i * IRQS_PER_BANK); From patchwork Tue Nov 13 14:48:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10680897 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EBE4014D6 for ; Tue, 13 Nov 2018 14:48:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D98C02842B for ; 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Tue, 13 Nov 2018 06:48:20 -0800 (PST) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1088:2b4c:8cab:bca7:b2f2:d2bb]) by smtp.gmail.com with ESMTPSA id s16sm3292020wrt.77.2018.11.13.06.48.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 13 Nov 2018 06:48:19 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Subject: [PATCH 3/3] ARM: dts: stm32: Add hwlock for irqchip on stm32mp157 Date: Tue, 13 Nov 2018 15:48:05 +0100 Message-Id: <20181113144805.1054-4-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20181113144805.1054-1-benjamin.gaignard@st.com> References: <20181113144805.1054-1-benjamin.gaignard@st.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181113_064829_813487_30071C94 X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Benjamin Gaignard , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Define a hwspinlock to be used by irq controller Signed-off-by: Benjamin Gaignard --- arch/arm/boot/dts/stm32mp157c.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index 98f824d8b0f0..7c9ee32b775d 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -824,6 +824,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x5000d000 0x400>; + hwlocks = <&hsem 0>; }; syscfg: syscon@50020000 {