From patchwork Tue Nov 13 23:21:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 10681613 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B2A78139B for ; Tue, 13 Nov 2018 23:22:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A3DA82B381 for ; Tue, 13 Nov 2018 23:22:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 953272B38C; Tue, 13 Nov 2018 23:22:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0E3D02B381 for ; Tue, 13 Nov 2018 23:22:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 46AD66E3F5; Tue, 13 Nov 2018 23:22:08 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id B3F746E38D; Tue, 13 Nov 2018 23:22:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2018 15:22:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,230,1539673200"; d="scan'208";a="108007925" Received: from mdroper-desk.fm.intel.com ([10.105.128.10]) by orsmga001.jf.intel.com with ESMTP; 13 Nov 2018 15:22:05 -0800 From: Matt Roper To: intel-gfx@lists.freedesktop.org Subject: [PATCH v2 2/3] drm: Add CRTC background color property (v2) Date: Tue, 13 Nov 2018 15:21:48 -0800 Message-Id: <20181113232149.22753-3-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20181113232149.22753-1-matthew.d.roper@intel.com> References: <20181113232149.22753-1-matthew.d.roper@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org, wei.c.li@intel.com, harish.krupo.kps@intel.com, Sean Paul Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Some display controllers can be programmed to present non-black colors for pixels not covered by any plane (or pixels covered by the transparent regions of higher planes). Compositors that want a UI with a solid color background can potentially save memory bandwidth by setting the CRTC background property and using smaller planes to display the rest of the content. To avoid confusion between different ways of encoding RGB data, we define a standard 64-bit format that should be used for this property's value. Helper functions and macros are provided to generate and dissect values in this standard format with varying component precision values. v2: - Swap internal representation's blue and red bits to make it easier to read if printed out. (Ville) - Document bgcolor property in drm_blend.c. (Sean Paul) - s/background_color/bgcolor/ for consistency between property name and value storage field. (Sean Paul) - Add a convenience function to attach property to a given crtc. Cc: dri-devel@lists.freedesktop.org Cc: wei.c.li@intel.com Cc: harish.krupo.kps@intel.com Cc: Ville Syrjälä Cc: Sean Paul Signed-off-by: Matt Roper Reviewed-by: Sean Paul --- drivers/gpu/drm/drm_atomic_state_helper.c | 1 + drivers/gpu/drm/drm_atomic_uapi.c | 5 +++++ drivers/gpu/drm/drm_blend.c | 21 ++++++++++++++++++--- drivers/gpu/drm/drm_mode_config.c | 6 ++++++ include/drm/drm_blend.h | 1 + include/drm/drm_crtc.h | 17 +++++++++++++++++ include/drm/drm_mode_config.h | 5 +++++ include/uapi/drm/drm_mode.h | 26 ++++++++++++++++++++++++++ 8 files changed, 79 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 3ba996069d69..2f8c55668089 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -101,6 +101,7 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, state->planes_changed = false; state->connectors_changed = false; state->color_mgmt_changed = false; + state->bgcolor_changed = false; state->zpos_changed = false; state->commit = NULL; state->event = NULL; diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 86ac33922b09..b95a55a778e2 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -467,6 +467,9 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, return -EFAULT; set_out_fence_for_crtc(state->state, crtc, fence_ptr); + } else if (property == config->bgcolor_property) { + state->bgcolor = val; + state->bgcolor_changed = true; } else if (crtc->funcs->atomic_set_property) { return crtc->funcs->atomic_set_property(crtc, state, property, val); } else { @@ -499,6 +502,8 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc, *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0; else if (property == config->prop_out_fence_ptr) *val = 0; + else if (property == config->bgcolor_property) + *val = state->bgcolor; else if (crtc->funcs->atomic_get_property) return crtc->funcs->atomic_get_property(crtc, state, property, val); else diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c index 0c78ca386cbe..7c73cb83874a 100644 --- a/drivers/gpu/drm/drm_blend.c +++ b/drivers/gpu/drm/drm_blend.c @@ -175,9 +175,16 @@ * plane does not expose the "alpha" property, then this is * assumed to be 1.0 * - * Note that all the property extensions described here apply either to the - * plane or the CRTC (e.g. for the background color, which currently is not - * exposed and assumed to be black). + * The property extensions described above all apply to the plane. Drivers + * may also expose the following crtc property extension: + * + * bgcolor: + * Background color is setup with drm_crtc_add_bgcolor_property(). It + * controls the RGB color of a full-screen, fully-opaque layer that exists + * below all planes. This color will be used for pixels not covered by + * any plane and may also be blended with plane contents as allowed by a + * plane's alpha values. The background color defaults to black, and is + * assumed to be black for drivers that do not expose this property. */ /** @@ -593,3 +600,11 @@ int drm_plane_create_blend_mode_property(struct drm_plane *plane, return 0; } EXPORT_SYMBOL(drm_plane_create_blend_mode_property); + +void drm_crtc_add_bgcolor_property(struct drm_crtc *crtc) +{ + drm_object_attach_property(&crtc->base, + crtc->dev->mode_config.bgcolor_property, + drm_rgba(16, 0, 0, 0, 0xffff)); +} +EXPORT_SYMBOL(drm_crtc_add_bgcolor_property); diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index ee80788f2c40..75e376755176 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -352,6 +352,12 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.modifiers_property = prop; + prop = drm_property_create_range(dev, 0, "BACKGROUND_COLOR", + 0, GENMASK_ULL(63, 0)); + if (!prop) + return -ENOMEM; + dev->mode_config.bgcolor_property = prop; + return 0; } diff --git a/include/drm/drm_blend.h b/include/drm/drm_blend.h index 88bdfec3bd88..9e2538dd7b9a 100644 --- a/include/drm/drm_blend.h +++ b/include/drm/drm_blend.h @@ -58,4 +58,5 @@ int drm_atomic_normalize_zpos(struct drm_device *dev, struct drm_atomic_state *state); int drm_plane_create_blend_mode_property(struct drm_plane *plane, unsigned int supported_modes); +void drm_crtc_add_bgcolor_property(struct drm_crtc *crtc); #endif diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index b21437bc95bf..d78f82f954e4 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -168,6 +168,11 @@ struct drm_crtc_state { * drivers to steer the atomic commit control flow. */ bool color_mgmt_changed : 1; + /** + * @bgcolor_changed: Background color value has changed. Used by + * drivers to steer the atomic commit control flow. + */ + bool bgcolor_changed : 1; /** * @no_vblank: @@ -274,6 +279,18 @@ struct drm_crtc_state { */ struct drm_property_blob *gamma_lut; + /** + * @bgcolor: + * + * RGB value representing the pipe's background color. The background + * color (aka "canvas color") of a pipe is the color that will be used + * for pixels not covered by a plane, or covered by transparent pixels + * of a plane. The value here should be built via drm_rgba(); + * individual color components can be extracted with desired precision + * via the DRM_RGBA_*() macros. + */ + u64 bgcolor; + /** * @target_vblank: * diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 5dbeabdbaf91..8b686d228feb 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -813,6 +813,11 @@ struct drm_mode_config { */ struct drm_property *writeback_out_fence_ptr_property; + /** + * @bgcolor_property: RGBA background color for CRTC. + */ + struct drm_property *bgcolor_property; + /* dumb ioctl parameters */ uint32_t preferred_depth, prefer_shadow; diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index d3e0fe31efc5..7c4f902aa290 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -888,6 +888,32 @@ struct drm_mode_revoke_lease { __u32 lessee_id; }; +/* + * Put RGBA values into a standard 64-bit representation that can be used + * for ioctl parameters, inter-driver commmunication, etc. If the component + * values being provided contain less than 16 bits of precision, they'll + * be shifted into the most significant bits. + */ +static inline __u64 +drm_rgba(__u8 bpc, __u16 red, __u16 green, __u16 blue, __u16 alpha) +{ + int msb_shift = 16 - bpc; + + return (__u64)alpha << msb_shift << 48 | + (__u64)red << msb_shift << 32 | + (__u64)green << msb_shift << 16 | + (__u64)blue << msb_shift; +} + +/* + * Extract the specified number of bits of a specific color component from a + * standard 64-bit RGBA value. + */ +#define DRM_RGBA_BLUE(c, numbits) (__u16)((c & 0xFFFFull) >> (16-numbits)) +#define DRM_RGBA_GREEN(c, numbits) (__u16)((c & 0xFFFFull<<16) >> (32-numbits)) +#define DRM_RGBA_RED(c, numbits) (__u16)((c & 0xFFFFull<<32) >> (48-numbits)) +#define DRM_RGBA_ALPHA(c, numbits) (__u16)((c & 0xFFFFull<<48) >> (64-numbits)) + #if defined(__cplusplus) } #endif From patchwork Tue Nov 13 23:21:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 10681617 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D390139B for ; Tue, 13 Nov 2018 23:22:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 700C12B381 for ; Tue, 13 Nov 2018 23:22:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 64C2F2B38C; Tue, 13 Nov 2018 23:22:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 13B282B381 for ; Tue, 13 Nov 2018 23:22:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9782D6E3F7; Tue, 13 Nov 2018 23:22:15 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6AA856E3F3; Tue, 13 Nov 2018 23:22:13 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2018 15:22:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,230,1539673200"; d="scan'208";a="108007941" Received: from mdroper-desk.fm.intel.com ([10.105.128.10]) by orsmga001.jf.intel.com with ESMTP; 13 Nov 2018 15:22:11 -0800 From: Matt Roper To: intel-gfx@lists.freedesktop.org Subject: [PATCH v2 3/3] drm/i915/gen9+: Add support for pipe background color (v2) Date: Tue, 13 Nov 2018 15:21:49 -0800 Message-Id: <20181113232149.22753-4-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20181113232149.22753-1-matthew.d.roper@intel.com> References: <20181113232149.22753-1-matthew.d.roper@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wei.c.li@intel.com, dri-devel@lists.freedesktop.org, harish.krupo.kps@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Gen9+ platforms allow CRTC's to be programmed with a background/canvas color below the programmable planes. Let's expose this for use by compositors. v2: - Split out bgcolor sanitization and programming of csc/gamma bits to a separate patch that we can land before the ABI changes are ready to go in. (Ville) - Change a temporary variable name to be more consistent with other similar functions. (Ville) - Change register name to SKL_CANVAS for consistency with the CHV_CANVAS register. Cc: dri-devel@lists.freedesktop.org Cc: wei.c.li@intel.com Cc: harish.krupo.kps@intel.com Cc: Ville Syrjälä Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/i915_debugfs.c | 9 +++++++++ drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++++++++++------- 2 files changed, 37 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 670db5073d70..1f2a19e6ec79 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -3254,6 +3254,15 @@ static int i915_display_info(struct seq_file *m, void *unused) intel_plane_info(m, crtc); } + if (INTEL_GEN(dev_priv) >= 9 && pipe_config->base.active) { + uint64_t background = pipe_config->base.bgcolor; + + seq_printf(m, "\tbackground color (10bpc): r=%x g=%x b=%x\n", + DRM_RGBA_RED(background, 10), + DRM_RGBA_GREEN(background, 10), + DRM_RGBA_BLUE(background, 10)); + } + seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s \n", yesno(!crtc->cpu_fifo_underrun_disabled), yesno(!crtc->pch_fifo_underrun_disabled)); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1d089d93d88b..e7a759e0c021 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3834,6 +3834,27 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) clear_bit(I915_RESET_MODESET, &dev_priv->gpu_error.flags); } +static void skl_update_background_color(const struct intel_crtc_state *cstate) +{ + struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + uint64_t propval = cstate->base.bgcolor; + uint32_t tmp; + + /* Hardware is programmed with 10 bits of precision */ + tmp = DRM_RGBA_RED(propval, 10) << 20 + | DRM_RGBA_GREEN(propval, 10) << 10 + | DRM_RGBA_BLUE(propval, 10); + + /* + * Set CSC and gamma for bottom color to ensure background pixels + * receive the same color transformations as plane content. + */ + tmp |= SKL_CANVAS_CSC_ENABLE | SKL_CANVAS_GAMMA_ENABLE; + + I915_WRITE_FW(SKL_CANVAS(crtc->pipe), tmp); +} + static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_state, const struct intel_crtc_state *new_crtc_state) { @@ -3869,14 +3890,8 @@ static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_sta ironlake_pfit_disable(old_crtc_state); } - /* - * We don't (yet) allow userspace to control the pipe background color, - * so force it to black, but apply pipe gamma and CSC so that its - * handling will match how we program our planes. - */ if (INTEL_GEN(dev_priv) >= 9) - I915_WRITE(SKL_CANVAS(crtc->pipe), - SKL_CANVAS_GAMMA_ENABLE | SKL_CANVAS_CSC_ENABLE); + skl_update_background_color(new_crtc_state); } static void intel_fdi_normal_train(struct intel_crtc *crtc) @@ -10896,6 +10911,9 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc, crtc_state->planes_changed = true; } + if (crtc_state->bgcolor_changed) + pipe_config->update_pipe = true; + ret = 0; if (dev_priv->display.compute_pipe_wm) { ret = dev_priv->display.compute_pipe_wm(pipe_config); @@ -14035,6 +14053,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe) WARN_ON(drm_crtc_index(&intel_crtc->base) != intel_crtc->pipe); + if (INTEL_GEN(dev_priv) >= 9) + drm_crtc_add_bgcolor_property(&intel_crtc->base); + return 0; fail: