From patchwork Fri Feb 5 19:09:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Almahallawy, Khaled" X-Patchwork-Id: 12070791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93BF1C433E0 for ; Fri, 5 Feb 2021 19:07:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3565564DA8 for ; Fri, 5 Feb 2021 19:07:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3565564DA8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9000D6F4AA; Fri, 5 Feb 2021 19:07:48 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id A08B26F4AA for ; Fri, 5 Feb 2021 19:07:47 +0000 (UTC) IronPort-SDR: y7R4jc3QDIgIMJlCywIe9zZ3+QponFIS69C006OeuPy0GN+BnLqOs/RgeGXd5i6qwIDrg+MwP2 5wxbE9Mo5VdA== X-IronPort-AV: E=McAfee;i="6000,8403,9886"; a="177971280" X-IronPort-AV: E=Sophos;i="5.81,155,1610438400"; d="scan'208";a="177971280" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2021 11:07:47 -0800 IronPort-SDR: nKLDv/Q4RkhvHBc7O2+Jjjb862cgnPjeeW7LyfgO1KZ4ayZujoxvDwU9UFz3+cvxYl8AMu5+I6 Yb8ttAYskHUQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,155,1610438400"; d="scan'208";a="397581070" Received: from kialmah1-desk.jf.intel.com ([10.23.15.164]) by orsmga007.jf.intel.com with ESMTP; 05 Feb 2021 11:07:46 -0800 From: Khaled Almahallawy To: intel-gfx@lists.freedesktop.org Date: Fri, 5 Feb 2021 11:09:36 -0800 Message-Id: <20210205190936.3172458-1-khaled.almahallawy@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210205064531.3158292-1-khaled.almahallawy@intel.com> References: <20210205064531.3158292-1-khaled.almahallawy@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2] drm/i915: Add link rate and lane count to i915_display_info X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Link rate and lane count information are more easier and faster to check in i915_display_info than checking kernel logs for people not familiar with i915 in the following scenarios: * Debugging DP tunnel bandwidth usage in Thunderbolt driver. * In USB4 certification, it is a requirement to know which link rate used by monitor to prove that DP tunnel handle up to HBR3 * In PHY Compliance, when the connector propes are not mounted correctly, some display lanes will not show up in the DP Oscilloscope and will fail CTS. Just give the tester an easy way to identify where the problem is. v2(Ville): Uniform style for '=' and use 'port clock' instead of 'link rate' Cc: Imre Deak Cc: Ville Syrjälä CC: José Roberto de Souza Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index d62b18d5ecd8..cb088a0a26f3 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -990,9 +990,10 @@ static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) yesno(crtc_state->hw.active), DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); - seq_printf(m, "\tpipe src size=%dx%d, dither=%s, bpp=%d\n", + seq_printf(m, "\tpipe src size=%dx%d, dither=%s, bpp=%d, port clock=%d, lane count=%d\n", crtc_state->pipe_src_w, crtc_state->pipe_src_h, - yesno(crtc_state->dither), crtc_state->pipe_bpp); + yesno(crtc_state->dither), crtc_state->pipe_bpp, + crtc_state->port_clock, crtc_state->lane_count); intel_scaler_info(m, crtc); }