From patchwork Mon Feb 22 08:40:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 12098129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1ABBC433DB for ; Mon, 22 Feb 2021 08:53:35 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EDBA464DD3 for ; Mon, 22 Feb 2021 08:53:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EDBA464DD3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 4F19D1667; Mon, 22 Feb 2021 09:52:41 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 4F19D1667 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1613984011; bh=80XVqyS1GeDJKM+wRSyTCDPJS+poXNv6IjXaV89xGys=; h=From:To:Subject:Date:Cc:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=ZWSXXYlHXRM9bDaDbVC65YOLHzUzf1OiRdUgTbgaRM2l60P03ZMgcuwHgMPWrQJaM wGyMSn+WcmkYxYLO7jwaIaSOocNDZy3dkEAsOYNAoUYfBTuQs8IpmnQaoWmw+41Pej UaOs2yObCo3pERoHTQjSMLfvR2AkiBbQrj8rz0Kc= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id BAB08F80129; Mon, 22 Feb 2021 09:52:40 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 60F4CF8025E; Mon, 22 Feb 2021 09:52:38 +0100 (CET) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id BE421F80129 for ; Mon, 22 Feb 2021 09:52:31 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz BE421F80129 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id ABE4B20032D; Mon, 22 Feb 2021 09:52:30 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5B90E20028F; Mon, 22 Feb 2021 09:52:25 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id A070F40281; Mon, 22 Feb 2021 09:52:18 +0100 (CET) From: Shengjiu Wang To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org Subject: [PATCH] ASoC: fsl_sai: Add pm qos cpu latency support Date: Mon, 22 Feb 2021 16:40:20 +0800 Message-Id: <1613983220-5373-1-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On SoCs such as i.MX7ULP, cpuidle has some levels which may disable system/bus clocks, so need to add pm_qos to prevent cpuidle from entering low level idles and make sure system/bus clocks are enabled when sai is active. Signed-off-by: Shengjiu Wang --- sound/soc/fsl/fsl_sai.c | 12 ++++++++++++ sound/soc/fsl/fsl_sai.h | 4 ++++ 2 files changed, 16 insertions(+) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 5e65b456d3e2..a22679dea578 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -1177,6 +1178,7 @@ static const struct fsl_sai_soc_data fsl_sai_vf610_data = { .fifo_depth = 32, .reg_offset = 0, .mclk0_is_mclk1 = false, + .flags = 0, }; static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { @@ -1185,6 +1187,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { .fifo_depth = 32, .reg_offset = 0, .mclk0_is_mclk1 = true, + .flags = 0, }; static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { @@ -1193,6 +1196,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { .fifo_depth = 16, .reg_offset = 8, .mclk0_is_mclk1 = false, + .flags = PMQOS_CPU_LATENCY, }; static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { @@ -1201,6 +1205,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { .fifo_depth = 128, .reg_offset = 8, .mclk0_is_mclk1 = false, + .flags = 0, }; static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { @@ -1209,6 +1214,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { .fifo_depth = 64, .reg_offset = 0, .mclk0_is_mclk1 = false, + .flags = 0, }; static const struct of_device_id fsl_sai_ids[] = { @@ -1235,6 +1241,9 @@ static int fsl_sai_runtime_suspend(struct device *dev) clk_disable_unprepare(sai->bus_clk); + if (sai->soc_data->flags & PMQOS_CPU_LATENCY) + cpu_latency_qos_remove_request(&sai->pm_qos_req); + regcache_cache_only(sai->regmap, true); return 0; @@ -1264,6 +1273,9 @@ static int fsl_sai_runtime_resume(struct device *dev) goto disable_tx_clk; } + if (sai->soc_data->flags & PMQOS_CPU_LATENCY) + cpu_latency_qos_add_request(&sai->pm_qos_req, 0); + regcache_cache_only(sai->regmap, false); regcache_mark_dirty(sai->regmap); regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR); diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index ff2619f1b214..bc60030967dd 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -216,12 +216,15 @@ #define FSL_SAI_MAXBURST_TX 6 #define FSL_SAI_MAXBURST_RX 6 +#define PMQOS_CPU_LATENCY BIT(0) + struct fsl_sai_soc_data { bool use_imx_pcm; bool use_edma; bool mclk0_is_mclk1; unsigned int fifo_depth; unsigned int reg_offset; + unsigned int flags; }; /** @@ -273,6 +276,7 @@ struct fsl_sai { struct snd_dmaengine_dai_dma_data dma_params_tx; struct fsl_sai_verid verid; struct fsl_sai_param param; + struct pm_qos_request pm_qos_req; }; #define TX 1