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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id g190sm34634026pgc.28.2018.11.17.10.12.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Nov 2018 10:12:13 -0800 (PST) From: Andrey Smirnov To: linux-kernel@vger.kernel.org Subject: [PATCH 1/3] soc: imx: gpcv2: Remove static qualifier from domain_data Date: Sat, 17 Nov 2018 10:12:04 -0800 Message-Id: <20181117181206.10267-2-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181117181206.10267-1-andrew.smirnov@gmail.com> References: <20181117181206.10267-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181117_101225_362356_762A45C6 X-CRM114-Status: GOOD ( 12.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , Richard Zhu , linux-arm-kernel@lists.infradead.org, Andrey Smirnov , linux-imx@nxp.com, Fabio Estevam , Leonard Crestez , Shawn Guo , cphealy@gmail.com, l.stach@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Cc: Shawn Guo Cc: Fabio Estevam Cc: cphealy@gmail.com Cc: l.stach@pengutronix.de Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov --- drivers/soc/imx/gpcv2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index e7b5994fee9d..0835999f1ed0 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -265,7 +265,7 @@ builtin_platform_driver(imx_pgc_domain_driver) static int imx_gpcv2_probe(struct platform_device *pdev) { - static const struct imx_pgc_domain_data *domain_data; + const struct imx_pgc_domain_data *domain_data; static const struct regmap_range yes_ranges[] = { regmap_reg_range(GPC_LPCR_A_CORE_BSC, GPC_M4_PU_PDN_FLG), From patchwork Sat Nov 17 18:12:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10687577 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A47381709 for ; Sat, 17 Nov 2018 18:13:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 936AB2AB9E for ; Sat, 17 Nov 2018 18:13:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 807792ABA2; Sat, 17 Nov 2018 18:13:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 054DB2AB9E for ; Sat, 17 Nov 2018 18:13:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LFDRsL+x3LnJtIuslxAXNrruAD+IV0pARqQqhiS5BPQ=; b=l1R7lXFU5Mx23p dloECXVwiXMnD9JCOM2g2u4XdWRaaTzG2vFIKpDZJnDfZrP3Ynp8V8YsoUi4+4ljf2EY67S+WQAqh Rb5icsUxtef7ZRy4QigoAQ4qteCZVghxph3pVwGmTAubcaupWpcoODQXyHg3Oguwm/l3FwBcf4omk JnxGbcIm4IMo2GEUtb7jct6M5fd6Ge4fTlXsduXiAbBUFurly3Tng5p9EeUAZnu06ZjajgoUB2CRs NO0NV/W+1SblfmzpXNG5argUz+RJiOOCE0QTGT+jIGy+GxCK9Pgrkm2723LF9DNPgCUQyl2HoroRD QEjgyzj2MDrU9sYyJc8w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gO561-0007I2-9m; Sat, 17 Nov 2018 18:13:29 +0000 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gO54z-0006DU-95 for linux-arm-kernel@lists.infradead.org; Sat, 17 Nov 2018 18:12:27 +0000 Received: by mail-pl1-x644.google.com with SMTP id b5so6235754plr.4 for ; Sat, 17 Nov 2018 10:12:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tBG44qE+mHZDSdO1ECWplE3Hb6CD5oUqffewEpSqfwI=; b=jWVZh3/ng480jJY7G+Kizs8gz/X94qnr9nSlNQ3WF90/wJFT+C2wJvIIb3xBK05GQH uFmKZfm0ogZfGkiNAjJVyDfNOEwPA0Fu4bGLCkQprTk02jkK8fmPikcbZbXyEIlV0RHY Y8f2on6nw9pbbmp6pqgTant/MfkqWaaqRqwzrlxqmY3sIbQ7MEDxKBWD3MrdCehw/Eyr nVnr9aV08hmguQ2JPHLqJ6F3lQ+MibnzgoJetfP0LraKswMchYAawSpzF7cKKSp0aXnv Q0MQ894Pnmj0QVHwssr7Ja/TYrd1+iFLdFhoHSiiCnYqAMbWGIsFUQ1Iu+1veFSBR5R1 9dKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tBG44qE+mHZDSdO1ECWplE3Hb6CD5oUqffewEpSqfwI=; b=cRJnUqffneicX9LJDjqLDlI5SFdIiE63hDrDBPI5KqZ6E12NlwbERglMDGrIHWf4bN DOOCy9CV0HqQM/zJzbdWGcez79mxKSLGZCM04WXgkaXhST+gbbjqhKQbzc00TeYc2zds 7ie2IXW43shdx0u1EJjpUD4ua4OMBvuiVTf4tFwxAj927Eb8cR0a0qXwDl0vKL43a8cT WRQPjcM9rkGBHPMFaOLgFSN1f5d3bAhNFSB0Dyhzx1tLXvSXyc+fJJVTaVkC9Hym875H Hpzb03MpEBmEANEnM3rMYAKbP2IoKMCRHU/SiYulsT1d8w/Lhz6DlajAP+8pkleGXcYw 8QKQ== X-Gm-Message-State: AGRZ1gL6x3507Q8+Hcr9FIr5G5k1OM9qif9xy35rHBixmcey5S5kvX0J RF9sPpFoJi6eu+xjlbWySTY= X-Google-Smtp-Source: AJdET5caoviF2e3koOaZT9l2e0zXUOomxeaujWqccIAPhN3V/FQsAEt+hiQ5DKuwkAAmy94Cgr3ilA== X-Received: by 2002:a17:902:1c9:: with SMTP id b67-v6mr16256907plb.152.1542478336334; Sat, 17 Nov 2018 10:12:16 -0800 (PST) Received: from squirtle.lan (c-24-22-235-96.hsd1.wa.comcast.net. [24.22.235.96]) by smtp.gmail.com with ESMTPSA id g190sm34634026pgc.28.2018.11.17.10.12.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Nov 2018 10:12:15 -0800 (PST) From: Andrey Smirnov To: linux-kernel@vger.kernel.org Subject: [PATCH 2/3] soc: imx: gpcv2: Make regmap access table variant specific. Date: Sat, 17 Nov 2018 10:12:05 -0800 Message-Id: <20181117181206.10267-3-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181117181206.10267-1-andrew.smirnov@gmail.com> References: <20181117181206.10267-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181117_101225_329900_39000CD5 X-CRM114-Status: GOOD ( 13.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , Richard Zhu , linux-arm-kernel@lists.infradead.org, Andrey Smirnov , linux-imx@nxp.com, Fabio Estevam , Leonard Crestez , Shawn Guo , cphealy@gmail.com, l.stach@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Move regmap access table to be a part of struct imx_pgc_domain_data in order to allow supporting multiple GPCv2 variants. Cc: Shawn Guo Cc: Fabio Estevam Cc: cphealy@gmail.com Cc: l.stach@pengutronix.de Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov --- drivers/soc/imx/gpcv2.c | 43 +++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 21 deletions(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 0835999f1ed0..184ffd4cc9aa 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -67,6 +67,7 @@ struct imx_pgc_domain { struct imx_pgc_domain_data { const struct imx_pgc_domain *domains; size_t domains_num; + struct regmap_access_table access_table; }; static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, @@ -198,9 +199,24 @@ static const struct imx_pgc_domain imx7_pgc_domains[] = { }, }; +static const struct regmap_range imx7_yes_ranges[] = { + regmap_reg_range(GPC_LPCR_A_CORE_BSC, + GPC_M4_PU_PDN_FLG), + regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI), + GPC_PGC_SR(PGC_MIPI)), + regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE), + GPC_PGC_SR(PGC_PCIE)), + regmap_reg_range(GPC_PGC_CTRL(PGC_USB_HSIC), + GPC_PGC_SR(PGC_USB_HSIC)), +}; + static const struct imx_pgc_domain_data imx7_pgc_domain_data = { .domains = imx7_pgc_domains, .domains_num = ARRAY_SIZE(imx7_pgc_domains), + .access_table = { + .yes_ranges = yes_ranges, + .n_yes_ranges = ARRAY_SIZE(yes_ranges), + }, }; static int imx_pgc_domain_probe(struct platform_device *pdev) @@ -265,30 +281,17 @@ builtin_platform_driver(imx_pgc_domain_driver) static int imx_gpcv2_probe(struct platform_device *pdev) { - const struct imx_pgc_domain_data *domain_data; - static const struct regmap_range yes_ranges[] = { - regmap_reg_range(GPC_LPCR_A_CORE_BSC, - GPC_M4_PU_PDN_FLG), - regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI), - GPC_PGC_SR(PGC_MIPI)), - regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE), - GPC_PGC_SR(PGC_PCIE)), - regmap_reg_range(GPC_PGC_CTRL(PGC_USB_HSIC), - GPC_PGC_SR(PGC_USB_HSIC)), - }; - static const struct regmap_access_table access_table = { - .yes_ranges = yes_ranges, - .n_yes_ranges = ARRAY_SIZE(yes_ranges), - }; - static const struct regmap_config regmap_config = { + struct device *dev = &pdev->dev; + const struct imx_pgc_domain_data * + domain_data = of_device_get_match_data(dev); + const struct regmap_config regmap_config = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, - .rd_table = &access_table, - .wr_table = &access_table, + .rd_table = &domain_data->access_table, + .wr_table = &domain_data->access_table, .max_register = SZ_4K, }; - struct device *dev = &pdev->dev; struct device_node *pgc_np, *np; struct regmap *regmap; struct resource *res; @@ -313,8 +316,6 @@ static int imx_gpcv2_probe(struct platform_device *pdev) return ret; } - domain_data = of_device_get_match_data(&pdev->dev); - for_each_child_of_node(pgc_np, np) { struct platform_device *pd_pdev; struct imx_pgc_domain *domain; From patchwork Sat Nov 17 18:12:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10687573 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1F9CC109C for ; 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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id g190sm34634026pgc.28.2018.11.17.10.12.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Nov 2018 10:12:17 -0800 (PST) From: Andrey Smirnov To: linux-kernel@vger.kernel.org Subject: [PATCH 3/3] soc: imx: gpcv2: Add support for i.MX8MQ Date: Sat, 17 Nov 2018 10:12:06 -0800 Message-Id: <20181117181206.10267-4-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181117181206.10267-1-andrew.smirnov@gmail.com> References: <20181117181206.10267-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181117_101223_295774_06521F4E X-CRM114-Status: GOOD ( 16.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , Richard Zhu , linux-arm-kernel@lists.infradead.org, Andrey Smirnov , linux-imx@nxp.com, Fabio Estevam , Leonard Crestez , Shawn Guo , cphealy@gmail.com, l.stach@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP GPCv2 IP block found on i.MX7D can also be found on i.MX8MQ. Add the code needed to support the latter as well as the former. Cc: Shawn Guo Cc: Fabio Estevam Cc: cphealy@gmail.com Cc: l.stach@pengutronix.de Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov --- drivers/soc/imx/Kconfig | 4 +- drivers/soc/imx/gpcv2.c | 195 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 197 insertions(+), 2 deletions(-) diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig index a5b86a28f343..8d0072e7c359 100644 --- a/drivers/soc/imx/Kconfig +++ b/drivers/soc/imx/Kconfig @@ -2,9 +2,9 @@ menu "i.MX SoC drivers" config IMX7_PM_DOMAINS bool "i.MX7 PM domains" - depends on SOC_IMX7D || (COMPILE_TEST && OF) + depends on SOC_IMX8MQ || SOC_IMX7D || (COMPILE_TEST && OF) depends on PM select PM_GENERIC_DOMAINS - default y if SOC_IMX7D + default y if SOC_IMX7D || SOC_IMX8MQ endmenu diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 184ffd4cc9aa..b464f2caa76d 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -15,9 +15,28 @@ #include #include +#define IMX8M_POWER_DOMAIN_MIPI_DSI_PHY 0 +#define IMX8M_POWER_DOMAIN_PCIE1_PHY 1 +#define IMX8M_POWER_DOMAIN_USB_OTG1 2 +#define IMX8M_POWER_DOMAIN_USB_OTG2 3 +#define IMX8M_POWER_DOMAIN_GPU 4 +#define IMX8M_POWER_DOMAIN_VPU 5 +#define IMX8M_POWER_DOMAIN_HDMI 6 +#define IMX8M_POWER_DOMAIN_DISP 7 +#define IMX8M_POWER_DOMAIN_MIPI_CSI1_PHY 8 +#define IMX8M_POWER_DOMAIN_MIPI_CSI2_PHY 9 +#define IMX8M_POWER_DOMAIN_PCIE2_PHY 10 + #define GPC_LPCR_A_CORE_BSC 0x000 #define GPC_PGC_CPU_MAPPING 0x0ec +#define PCIE2_A_CORE_DOMAIN BIT(15) +#define MIPI_CSI2_A_CORE_DOMAIN BIT(14) +#define MIPI_CSI1_A_CORE_DOMAIN BIT(13) +#define DISP_A_CORE_DOMAIN BIT(12) +#define HDMI_A_CORE_DOMAIN BIT(11) +#define VPU_A_CORE_DOMAIN BIT(10) +#define GPU_A_CORE_DOMAIN BIT(9) #define USB_HSIC_PHY_A_CORE_DOMAIN BIT(6) #define USB_OTG2_PHY_A_CORE_DOMAIN BIT(5) #define USB_OTG1_PHY_A_CORE_DOMAIN BIT(4) @@ -26,6 +45,13 @@ #define GPC_PU_PGC_SW_PUP_REQ 0x0f8 #define GPC_PU_PGC_SW_PDN_REQ 0x104 +#define PCIE2_SW_Pxx_REQ BIT(13) +#define MIPI_CSI2_SW_Pxx_REQ BIT(12) +#define MIPI_CSI1_SW_Pxx_REQ BIT(11) +#define DISP_SW_Pxx_REQ BIT(10) +#define HDMI_SW_Pxx_REQ BIT(9) +#define VPU_SW_Pxx_REQ BIT(8) +#define GPU_SW_Pxx_REQ BIT(7) #define USB_HSIC_PHY_SW_Pxx_REQ BIT(4) #define USB_OTG2_PHY_SW_Pxx_REQ BIT(3) #define USB_OTG1_PHY_SW_Pxx_REQ BIT(2) @@ -42,7 +68,16 @@ */ #define PGC_MIPI 16 #define PGC_PCIE 17 +#define PGC_USB_OTG1 18 +#define PGC_USB_OTG2 19 #define PGC_USB_HSIC 20 +#define PGC_GPU 23 +#define PGC_VPU 24 +#define PGC_HDMI 25 +#define PGC_DISP 26 +#define PGC_MIPI_CSI1 27 +#define PGC_MIPI_CSI2 28 +#define PGC_PCIE2 29 #define GPC_PGC_CTRL(n) (0x800 + (n) * 0x40) #define GPC_PGC_SR(n) (GPC_PGC_CTRL(n) + 0xc) @@ -219,6 +254,165 @@ static const struct imx_pgc_domain_data imx7_pgc_domain_data = { }, }; +static const struct imx_pgc_domain imx8m_pgc_domains[] = { + [IMX8M_POWER_DOMAIN_MIPI_DSI_PHY] = { + .genpd = { + .name = "mipi-phy", + }, + .bits = { + .pxx = MIPI_PHY_SW_Pxx_REQ, + .map = MIPI_PHY_A_CORE_DOMAIN, + }, + .pgc = PGC_MIPI, + }, + + [IMX8M_POWER_DOMAIN_PCIE1_PHY] = { + .genpd = { + .name = "pcie1-phy", + }, + .bits = { + .pxx = PCIE_PHY_SW_Pxx_REQ, + .map = PCIE_PHY_A_CORE_DOMAIN, + }, + .pgc = PGC_PCIE, + }, + + [IMX8M_POWER_DOMAIN_USB_OTG1] = { + .genpd = { + .name = "usb-otg1", + }, + .bits = { + .pxx = USB_OTG1_PHY_SW_Pxx_REQ, + .map = USB_OTG1_PHY_A_CORE_DOMAIN, + }, + .pgc = PGC_USB_OTG1, + }, + + [IMX8M_POWER_DOMAIN_USB_OTG2] = { + .genpd = { + .name = "usb-otg2", + }, + .bits = { + .pxx = USB_OTG2_PHY_SW_Pxx_REQ, + .map = USB_OTG2_PHY_A_CORE_DOMAIN, + }, + .pgc = PGC_USB_OTG2, + }, + + [IMX8M_POWER_DOMAIN_GPU] = { + .genpd = { + .name = "gpu", + }, + .bits = { + .pxx = GPU_SW_Pxx_REQ, + .map = GPU_A_CORE_DOMAIN, + }, + .pgc = PGC_GPU, + }, + + [IMX8M_POWER_DOMAIN_VPU] = { + .genpd = { + .name = "vpu", + }, + .bits = { + .pxx = VPU_SW_Pxx_REQ, + .map = VPU_A_CORE_DOMAIN, + }, + .pgc = PGC_VPU, + }, + + [IMX8M_POWER_DOMAIN_HDMI] = { + .genpd = { + .name = "hdmi", + }, + .bits = { + .pxx = HDMI_SW_Pxx_REQ, + .map = HDMI_A_CORE_DOMAIN, + }, + .pgc = PGC_HDMI, + }, + + [IMX8M_POWER_DOMAIN_DISP] = { + .genpd = { + .name = "disp", + }, + .bits = { + .pxx = DISP_SW_Pxx_REQ, + .map = DISP_A_CORE_DOMAIN, + }, + .pgc = PGC_DISP, + }, + + [IMX8M_POWER_DOMAIN_MIPI_CSI1_PHY] = { + .genpd = { + .name = "mipi-csi1-phy", + }, + .bits = { + .pxx = MIPI_CSI1_SW_Pxx_REQ, + .map = MIPI_CSI1_A_CORE_DOMAIN, + }, + .pgc = PGC_MIPI_CSI1, + }, + + [IMX8M_POWER_DOMAIN_MIPI_CSI2_PHY] = { + .genpd = { + .name = "mipi-csi2-phy", + }, + .bits = { + .pxx = MIPI_CSI2_SW_Pxx_REQ, + .map = MIPI_CSI2_A_CORE_DOMAIN, + }, + .pgc = PGC_MIPI_CSI2, + }, + + [IMX8M_POWER_DOMAIN_PCIE2_PHY] = { + .genpd = { + .name = "pcie2-phy", + }, + .bits = { + .pxx = PCIE2_SW_Pxx_REQ, + .map = PCIE2_A_CORE_DOMAIN, + }, + .pgc = PGC_PCIE2, + }, +}; + +static const struct regmap_range imx8m_pgc_yes_ranges[] = { + regmap_reg_range(GPC_LPCR_A_CORE_BSC, + GPC_M4_PU_PDN_FLG), + regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI), + GPC_PGC_SR(PGC_MIPI)), + regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE), + GPC_PGC_SR(PGC_PCIE)), + regmap_reg_range(GPC_PGC_CTRL(PGC_USB_OTG1), + GPC_PGC_SR(PGC_USB_OTG1)), + regmap_reg_range(GPC_PGC_CTRL(PGC_USB_OTG2), + GPC_PGC_SR(PGC_USB_OTG2)), + regmap_reg_range(GPC_PGC_CTRL(PGC_GPU), + GPC_PGC_SR(PGC_GPU)), + regmap_reg_range(GPC_PGC_CTRL(PGC_VPU), + GPC_PGC_SR(PGC_VPU)), + regmap_reg_range(GPC_PGC_CTRL(PGC_HDMI), + GPC_PGC_SR(PGC_HDMI)), + regmap_reg_range(GPC_PGC_CTRL(PGC_DISP), + GPC_PGC_SR(PGC_DISP)), + regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI_CSI1), + GPC_PGC_SR(PGC_MIPI_CSI1)), + regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI_CSI2), + GPC_PGC_SR(PGC_MIPI_CSI2)), + regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE2), + GPC_PGC_SR(PGC_PCIE2)), +}; + +static const struct imx_pgc_domain_data imx8m_pgc_domain_data = { + .domains = imx8m_pgc_domains, + .domains_num = ARRAY_SIZE(imx8m_pgc_domains), + .access_table = { + .yes_ranges = imx8m_pgc_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(imx8m_pgc_yes_ranges), + }, +}; + static int imx_pgc_domain_probe(struct platform_device *pdev) { struct imx_pgc_domain *domain = pdev->dev.platform_data; @@ -373,6 +567,7 @@ static int imx_gpcv2_probe(struct platform_device *pdev) static const struct of_device_id imx_gpcv2_dt_ids[] = { { .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, }, + { .compatible = "fsl,imx8m-gpc", .data = &imx8m_pgc_domain_data, }, { } };